Added support for Qbus DMA.
This commit is contained in:
ragge
parent
64572c459a
commit
134b65fde3
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@ -0,0 +1,281 @@
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/* $NetBSD: uba_dma.c,v 1.1 1999/06/06 19:00:53 ragge Exp $ */
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/*-
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* Copyright (c) 1997, 1998 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
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* NASA Ames Research Center.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPEUBAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/device.h>
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#include <sys/malloc.h>
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#include <vm/vm.h>
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#define _VAX_BUS_DMA_PRIVATE
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#include <machine/bus.h>
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#include <machine/cpu.h>
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#include <machine/sgmap.h>
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#include <dev/qbus/ubavar.h>
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#include <arch/vax/uba/uba_common.h>
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int uba_bus_dmamap_create_sgmap __P((bus_dma_tag_t, bus_size_t, int,
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bus_size_t, bus_size_t, int, bus_dmamap_t *));
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void uba_bus_dmamap_destroy_sgmap __P((bus_dma_tag_t, bus_dmamap_t));
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int uba_bus_dmamap_load_sgmap __P((bus_dma_tag_t, bus_dmamap_t, void *,
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bus_size_t, struct proc *, int));
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int uba_bus_dmamap_load_mbuf_sgmap __P((bus_dma_tag_t, bus_dmamap_t,
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struct mbuf *, int));
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int uba_bus_dmamap_load_uio_sgmap __P((bus_dma_tag_t, bus_dmamap_t,
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struct uio *, int));
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int uba_bus_dmamap_load_raw_sgmap __P((bus_dma_tag_t, bus_dmamap_t,
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bus_dma_segment_t *, int, bus_size_t, int));
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void uba_bus_dmamap_unload_sgmap __P((bus_dma_tag_t, bus_dmamap_t));
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void uba_bus_dmamap_sync __P((bus_dma_tag_t, bus_dmamap_t, bus_addr_t,
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bus_size_t, int));
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void
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uba_dma_init(sc)
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struct uba_vsoftc *sc;
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{
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bus_dma_tag_t t;
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struct pte *pte;
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/*
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* Initialize the DMA tag used for sgmap-mapped DMA.
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*/
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t = &sc->uv_dmat;
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t->_cookie = sc;
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t->_wbase = 0;
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t->_wsize = sc->uv_size;
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t->_boundary = 0;
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t->_sgmap = &sc->uv_sgmap;
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t->_dmamap_create = uba_bus_dmamap_create_sgmap;
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t->_dmamap_destroy = uba_bus_dmamap_destroy_sgmap;
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t->_dmamap_load = uba_bus_dmamap_load_sgmap;
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t->_dmamap_load_mbuf = uba_bus_dmamap_load_mbuf_sgmap;
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t->_dmamap_load_uio = uba_bus_dmamap_load_uio_sgmap;
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t->_dmamap_load_raw = uba_bus_dmamap_load_raw_sgmap;
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t->_dmamap_unload = uba_bus_dmamap_unload_sgmap;
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t->_dmamap_sync = uba_bus_dmamap_sync;
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t->_dmamem_alloc = _bus_dmamem_alloc;
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t->_dmamem_free = _bus_dmamem_free;
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t->_dmamem_map = _bus_dmamem_map;
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t->_dmamem_unmap = _bus_dmamem_unmap;
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t->_dmamem_mmap = _bus_dmamem_mmap;
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/*
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* Map in Unibus map registers.
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*/
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pte = (struct pte *)vax_map_physmem(sc->uv_addr, sc->uv_size/VAX_NBPG);
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if (pte == 0)
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panic("uba_dma_init");
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/*
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* Initialize the SGMAP.
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*/
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vax_sgmap_init(t, &sc->uv_sgmap, "uba_sgmap", 0, sc->uv_size, pte, 0);
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}
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/*
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* Create a UBA SGMAP-mapped DMA map.
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*/
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int
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uba_bus_dmamap_create_sgmap(t, size, nsegments, maxsegsz, boundary,
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flags, dmamp)
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bus_dma_tag_t t;
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bus_size_t size;
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int nsegments;
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bus_size_t maxsegsz;
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bus_size_t boundary;
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int flags;
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bus_dmamap_t *dmamp;
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{
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bus_dmamap_t map;
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int error;
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error = _bus_dmamap_create(t, size, nsegments, maxsegsz,
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boundary, flags, dmamp);
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if (error)
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return (error);
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map = *dmamp;
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if (flags & BUS_DMA_ALLOCNOW) {
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error = vax_sgmap_alloc(map, round_page(size),
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t->_sgmap, flags);
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if (error)
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uba_bus_dmamap_destroy_sgmap(t, map);
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}
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return (error);
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}
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/*
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* Destroy a UBA SGMAP-mapped DMA map.
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*/
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void
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uba_bus_dmamap_destroy_sgmap(t, map)
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bus_dma_tag_t t;
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bus_dmamap_t map;
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{
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if (map->_dm_flags & DMAMAP_HAS_SGMAP)
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vax_sgmap_free(map, t->_sgmap);
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_bus_dmamap_destroy(t, map);
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}
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/*
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* Load a UBA SGMAP-mapped DMA map with a linear buffer.
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*/
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int
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uba_bus_dmamap_load_sgmap(t, map, buf, buflen, p, flags)
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bus_dma_tag_t t;
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bus_dmamap_t map;
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void *buf;
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bus_size_t buflen;
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struct proc *p;
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int flags;
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{
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int error;
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error = vax_sgmap_load(t, map, buf, buflen, p, flags, t->_sgmap);
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/*
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* XXX - Set up BDPs.
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*/
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return (error);
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}
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/*
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* Load a UBA SGMAP-mapped DMA map with an mbuf chain.
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*/
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int
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uba_bus_dmamap_load_mbuf_sgmap(t, map, m, flags)
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bus_dma_tag_t t;
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bus_dmamap_t map;
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struct mbuf *m;
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int flags;
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{
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int error;
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error = vax_sgmap_load_mbuf(t, map, m, flags, t->_sgmap);
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return (error);
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}
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/*
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* Load a UBA SGMAP-mapped DMA map with a uio.
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*/
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int
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uba_bus_dmamap_load_uio_sgmap(t, map, uio, flags)
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bus_dma_tag_t t;
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bus_dmamap_t map;
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struct uio *uio;
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int flags;
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{
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int error;
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error = vax_sgmap_load_uio(t, map, uio, flags, t->_sgmap);
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return (error);
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}
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/*
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* Load a UBA SGMAP-mapped DMA map with raw memory.
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*/
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int
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uba_bus_dmamap_load_raw_sgmap(t, map, segs, nsegs, size, flags)
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bus_dma_tag_t t;
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bus_dmamap_t map;
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bus_dma_segment_t *segs;
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int nsegs;
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bus_size_t size;
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int flags;
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{
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int error;
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error = vax_sgmap_load_raw(t, map, segs, nsegs, size, flags,
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t->_sgmap);
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return (error);
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}
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/*
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* Unload a UBA DMA map.
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*/
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void
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uba_bus_dmamap_unload_sgmap(t, map)
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bus_dma_tag_t t;
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bus_dmamap_t map;
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{
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/*
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* Invalidate any SGMAP page table entries used by this
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* mapping.
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*/
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vax_sgmap_unload(t, map, t->_sgmap);
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/*
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* Do the generic bits of the unload.
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*/
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_bus_dmamap_unload(t, map);
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}
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/*
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* Sync the bus map. This is only needed if BDP's are used.
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*/
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void
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uba_bus_dmamap_sync(tag, dmam, offset, len, ops)
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bus_dma_tag_t tag;
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bus_dmamap_t dmam;
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bus_addr_t offset;
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bus_size_t len;
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int ops;
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{
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/* Only BDP handling, but not yet. */
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}
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@ -1,4 +1,4 @@
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/* $NetBSD: uba_mainbus.c,v 1.1 1999/05/24 20:10:31 ragge Exp $ */
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/* $NetBSD: uba_mainbus.c,v 1.2 1999/06/06 19:00:53 ragge Exp $ */
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/*
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* Copyright (c) 1996 Jonathan Stone.
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* Copyright (c) 1994, 1996 Ludd, University of Lule}, Sweden.
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@ -41,27 +41,34 @@
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#include <sys/device.h>
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#include <sys/systm.h>
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#define _VAX_BUS_DMA_PRIVATE
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#include <machine/bus.h>
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#include <machine/pte.h>
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#include <machine/mtpr.h>
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#include <machine/nexus.h>
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#include <machine/cpu.h>
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#include <machine/sgmap.h>
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#include <dev/dec/uba/ubareg.h>
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#include <dev/dec/uba/ubavar.h>
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#include <dev/qbus/ubavar.h>
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#include <arch/vax/uba/uba_common.h>
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/* Some Qbus-specific defines */
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#define QBASIZE (8192 * VAX_NBPG)
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#define QBAMAP 0x20088000
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#define QIOPAGE 0x20000000
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/*
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* The Q22 bus is the main IO bus on MicroVAX II/MicroVAX III systems.
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* It has an address space of 4MB (22 address bits), therefore the name,
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* and is hardware compatible with all 16 and 18 bits Q-bus devices.
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*/
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int qba_match __P((struct device *, struct cfdata *, void *));
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void qba_attach __P((struct device *, struct device *, void *));
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void qba_beforescan __P((struct uba_softc*));
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void qba_init __P((struct uba_softc*));
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static int qba_match __P((struct device *, struct cfdata *, void *));
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static void qba_attach __P((struct device *, struct device *, void *));
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static void qba_beforescan __P((struct uba_softc*));
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static void qba_init __P((struct uba_softc*));
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struct cfattach uba_mainbus_ca = {
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sizeof(struct uba_softc), qba_match, qba_attach
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sizeof(struct uba_vsoftc), qba_match, qba_attach
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};
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extern struct vax_bus_space vax_mem_bus_space;
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struct device *parent, *self;
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void *aux;
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{
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struct uba_softc *sc = (void *)self;
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struct uba_vsoftc *sc = (void *)self;
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printf(": Q22\n");
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/*
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* Fill in bus specific data.
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*/
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/* sc->uh_uba not used; no regs */
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/* sc->uh_nbdp is 0; Qbus has no BDP's */
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/* sc->uh_nr is 0; there can be only one! */
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/* sc->uh_afterscan; not used */
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/* sc->uh_errchk; not used */
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sc->uh_beforescan = qba_beforescan;
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sc->uh_ubainit = qba_init;
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sc->uh_type = QBA;
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sc->uh_memsize = QBAPAGES;
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sc->uh_tag = &vax_mem_bus_space;
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/*
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* Map in the UBA page map into kernel space. On other UBAs,
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* the map registers are in the bus IO space.
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*/
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sc->uh_mr = (void *)vax_map_physmem(QBAMAP,
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(QBAPAGES * sizeof(struct pte)) / VAX_NBPG);
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sc->uv_sc.uh_beforescan = qba_beforescan;
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sc->uv_sc.uh_ubainit = qba_init;
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sc->uv_sc.uh_iot = &vax_mem_bus_space;
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sc->uv_sc.uh_dmat = &sc->uv_dmat;
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uba_attach(sc, QIOPAGE);
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/*
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* Fill in variables used by the sgmap system.
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*/
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sc->uv_size = QBASIZE; /* Size in bytes of Qbus space */
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sc->uv_addr = QBAMAP; /* Physical address of map registers */
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uba_dma_init(sc);
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uba_attach(&sc->uv_sc, QIOPAGE);
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}
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/*
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@ -119,6 +121,8 @@ void
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qba_beforescan(sc)
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struct uba_softc *sc;
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{
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#define QIPCR 0x1f40
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#define Q_LMEAE 0x20
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bus_space_write_2(sc->uh_tag, sc->uh_ioh, QIPCR, Q_LMEAE);
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}
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