Allow for choosing between 16 and 24bpp framebuffers. The default is now
16 instead of 24. Set 'fb.depth=16' or 'fb.depth=24' on kernel command-line to explicitly select a colour depth.
This commit is contained in:
jmcneill
parent
f058c67066
commit
12e9b90f9f
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@ -1,4 +1,4 @@
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/* $NetBSD: amlogic_genfb.c,v 1.4 2015/03/26 16:26:35 joerg Exp $ */
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/* $NetBSD: amlogic_genfb.c,v 1.5 2015/04/03 18:03:05 jmcneill Exp $ */
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/*-
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* Copyright (c) 2015 Jared D. McNeill <jmcneill@invisible.ca>
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@ -31,7 +31,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: amlogic_genfb.c,v 1.4 2015/03/26 16:26:35 joerg Exp $");
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__KERNEL_RCSID(0, "$NetBSD: amlogic_genfb.c,v 1.5 2015/04/03 18:03:05 jmcneill Exp $");
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#include <sys/param.h>
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#include <sys/types.h>
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@ -50,6 +50,8 @@ __KERNEL_RCSID(0, "$NetBSD: amlogic_genfb.c,v 1.4 2015/03/26 16:26:35 joerg Exp
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#include <dev/wsfb/genfbvar.h>
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#define AMLOGIC_GENFB_DEFAULT_DEPTH 16
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/* Map CEA-861-D video code (VIC) to framebuffer dimensions */
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static const struct amlogic_genfb_vic2mode {
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u_int vic;
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@ -268,12 +270,13 @@ amlogic_genfb_canvas_config(struct amlogic_genfb_softc *sc)
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prop_dictionary_t cfg = device_properties(sc->sc_gen.sc_dev);
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const paddr_t pa = sc->sc_dmamap->dm_segs[0].ds_addr;
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uint32_t datal, datah, addr;
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u_int width, height;
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u_int width, height, depth;
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prop_dictionary_get_uint32(cfg, "width", &width);
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prop_dictionary_get_uint32(cfg, "height", &height);
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prop_dictionary_get_uint32(cfg, "depth", &depth);
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const uint32_t w = (width * 3) >> 3;
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const uint32_t w = (width * (depth/8)) >> 3;
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const uint32_t h = height;
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datal = CAV_READ(sc, DC_CAV_LUT_DATAL_REG);
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@ -303,17 +306,56 @@ static void
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amlogic_genfb_osd_config(struct amlogic_genfb_softc *sc)
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{
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prop_dictionary_t cfg = device_properties(sc->sc_gen.sc_dev);
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uint32_t w0, w1, w2, w3, w4;
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u_int width, height;
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uint32_t cs, tc, w0, w1, w2, w3, w4;
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u_int width, height, depth;
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bool interlace_p;
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prop_dictionary_get_uint32(cfg, "width", &width);
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prop_dictionary_get_uint32(cfg, "height", &height);
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prop_dictionary_get_uint32(cfg, "depth", &depth);
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prop_dictionary_get_bool(cfg, "interlace", &interlace_p);
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cs = VPU_READ(sc, VIU_OSD2_CTRL_STAT_REG);
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cs |= VIU_OSD_CTRL_STAT_ENABLE;
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cs &= ~VIU_OSD_CTRL_STAT_GLOBAL_ALPHA;
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cs |= __SHIFTIN(0xff, VIU_OSD_CTRL_STAT_GLOBAL_ALPHA);
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cs |= VIU_OSD_CTRL_STAT_BLK0_ENABLE;
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cs &= ~VIU_OSD_CTRL_STAT_BLK1_ENABLE;
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cs &= ~VIU_OSD_CTRL_STAT_BLK2_ENABLE;
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cs &= ~VIU_OSD_CTRL_STAT_BLK3_ENABLE;
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VPU_WRITE(sc, VIU_OSD2_CTRL_STAT_REG, cs);
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tc = __SHIFTIN(0, VIU_OSD_TCOLOR_R) |
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__SHIFTIN(0, VIU_OSD_TCOLOR_G) |
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__SHIFTIN(0, VIU_OSD_TCOLOR_B) |
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__SHIFTIN(255, VIU_OSD_TCOLOR_A);
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VPU_WRITE(sc, VIU_OSD2_TCOLOR_AG0_REG, tc);
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w0 = VPU_READ(sc, VIU_OSD2_BLK0_CFG_W0_REG);
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w0 |= VIU_OSD_BLK_CFG_W0_RGB_EN;
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w0 &= ~VIU_OSD_BLK_CFG_W0_TC_ALPHA_EN;
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w0 &= ~VIU_OSD_BLK_CFG_W0_OSD_BLK_MODE;
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w0 |= __SHIFTIN(7, VIU_OSD_BLK_CFG_W0_OSD_BLK_MODE);
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w0 &= ~VIU_OSD_BLK_CFG_W0_COLOR_MATRIX;
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switch (depth) {
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case 32:
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w0 |= __SHIFTIN(VIU_OSD_BLK_CFG_W0_OSD_BLK_MODE_32BPP,
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VIU_OSD_BLK_CFG_W0_OSD_BLK_MODE);
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w0 |= __SHIFTIN(VIU_OSD_BLK_CFG_W0_COLOR_MATRIX_ARGB,
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VIU_OSD_BLK_CFG_W0_COLOR_MATRIX);
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break;
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case 24:
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w0 |= __SHIFTIN(VIU_OSD_BLK_CFG_W0_OSD_BLK_MODE_24BPP,
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VIU_OSD_BLK_CFG_W0_OSD_BLK_MODE);
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w0 |= __SHIFTIN(VIU_OSD_BLK_CFG_W0_COLOR_MATRIX_RGB,
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VIU_OSD_BLK_CFG_W0_COLOR_MATRIX);
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break;
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case 16:
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w0 |= __SHIFTIN(VIU_OSD_BLK_CFG_W0_OSD_BLK_MODE_16BPP,
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VIU_OSD_BLK_CFG_W0_OSD_BLK_MODE);
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w0 |= __SHIFTIN(VIU_OSD_BLK_CFG_W0_COLOR_MATRIX_RGB565,
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VIU_OSD_BLK_CFG_W0_COLOR_MATRIX);
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break;
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}
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w0 |= VIU_OSD_BLK_CFG_W0_LITTLE_ENDIAN;
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w0 &= ~VIU_OSD_BLK_CFG_W0_RPT_Y;
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w0 &= ~VIU_OSD_BLK_CFG_W0_INTERP_CTRL;
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@ -322,8 +364,6 @@ amlogic_genfb_osd_config(struct amlogic_genfb_softc *sc)
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} else {
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w0 &= ~VIU_OSD_BLK_CFG_W0_INTERLACE_EN;
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}
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w0 |= VIU_OSD_BLK_CFG_W0_RGB_EN;
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w0 &= ~VIU_OSD_BLK_CFG_W0_COLOR_MATRIX;
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VPU_WRITE(sc, VIU_OSD2_BLK0_CFG_W0_REG, w0);
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w1 = __SHIFTIN(width - 1, VIU_OSD_BLK_CFG_W1_X_END) |
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@ -456,7 +496,7 @@ amlogic_genfb_init(struct amlogic_genfb_softc *sc)
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{
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prop_dictionary_t cfg = device_properties(sc->sc_gen.sc_dev);
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const struct sysctlnode *node, *devnode;
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u_int width = 0, height = 0, flags, i, scale = 100;
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u_int width = 0, height = 0, depth, flags, i, scale = 100;
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int error;
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/*
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@ -479,7 +519,22 @@ amlogic_genfb_init(struct amlogic_genfb_softc *sc)
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return;
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}
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const uint32_t fbsize = width * height * 3;
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depth = AMLOGIC_GENFB_DEFAULT_DEPTH;
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prop_dictionary_get_uint32(cfg, "depth", &depth);
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switch (depth) {
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case 16:
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case 24:
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break;
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default:
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aprint_error_dev(sc->sc_gen.sc_dev,
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"unsupported depth %d, using %d\n", depth,
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AMLOGIC_GENFB_DEFAULT_DEPTH);
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depth = AMLOGIC_GENFB_DEFAULT_DEPTH;
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break;
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}
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prop_dictionary_set_uint8(cfg, "depth", depth);
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const uint32_t fbsize = width * height * (depth / 8);
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sc->sc_dmasize = (fbsize + 3) & ~3;
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error = amlogic_genfb_alloc_videomem(sc);
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@ -502,8 +557,7 @@ amlogic_genfb_init(struct amlogic_genfb_softc *sc)
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prop_dictionary_set_uint32(cfg, "height", height);
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prop_dictionary_set_bool(cfg, "dblscan", !!(flags & DBLSCAN));
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prop_dictionary_set_bool(cfg, "interlace", !!(flags & INTERLACE));
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prop_dictionary_set_uint8(cfg, "depth", 24);
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prop_dictionary_set_uint16(cfg, "linebytes", width * 3);
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prop_dictionary_set_uint16(cfg, "linebytes", width * (depth / 8));
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prop_dictionary_set_uint32(cfg, "address", 0);
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prop_dictionary_set_uint32(cfg, "virtual_address",
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(uintptr_t)sc->sc_dmap);
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@ -1,4 +1,4 @@
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/* $NetBSD: amlogic_vpureg.h,v 1.2 2015/03/22 13:53:33 jmcneill Exp $ */
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/* $NetBSD: amlogic_vpureg.h,v 1.3 2015/04/03 18:03:05 jmcneill Exp $ */
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/*-
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* Copyright (c) 2015 Jared D. McNeill <jmcneill@invisible.ca>
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@ -32,6 +32,10 @@
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#define VPU_REG(n) ((n) << 2)
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#define VIU_OSD2_CTRL_STAT_REG VPU_REG(0x1a30)
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#define VIU_OSD2_TCOLOR_AG0_REG VPU_REG(0x1a37)
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#define VIU_OSD2_TCOLOR_AG1_REG VPU_REG(0x1a38)
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#define VIU_OSD2_TCOLOR_AG2_REG VPU_REG(0x1a39)
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#define VIU_OSD2_TCOLOR_AG3_REG VPU_REG(0x1a3a)
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#define VIU_OSD2_BLK0_CFG_W0_REG VPU_REG(0x1a3b)
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#define VIU_OSD2_BLK0_CFG_W1_REG VPU_REG(0x1a3c)
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#define VIU_OSD2_BLK0_CFG_W2_REG VPU_REG(0x1a3d)
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@ -51,19 +55,38 @@
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#define VPP_OSD_SCO_V_REG VPU_REG(0x1dcb)
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#define VIU_OSD_CTRL_STAT_ENABLE __BIT(21)
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#define VIU_OSD_CTRL_STAT_GLOBAL_ALPHA __BITS(20,12)
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#define VIU_OSD_CTRL_STAT_BLK3_ENABLE __BIT(3)
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#define VIU_OSD_CTRL_STAT_BLK2_ENABLE __BIT(2)
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#define VIU_OSD_CTRL_STAT_BLK1_ENABLE __BIT(1)
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#define VIU_OSD_CTRL_STAT_BLK0_ENABLE __BIT(0)
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#define VIU_OSD_TCOLOR_R __BITS(31,24)
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#define VIU_OSD_TCOLOR_G __BITS(23,16)
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#define VIU_OSD_TCOLOR_B __BITS(15,8)
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#define VIU_OSD_TCOLOR_A __BITS(7,0)
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#define VIU_OSD_BLK_CFG_W0_TBL_ADDR __BITS(23,16)
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#define VIU_OSD_BLK_CFG_W0_LITTLE_ENDIAN __BIT(15)
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#define VIU_OSD_BLK_CFG_W0_RPT_Y __BIT(14)
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#define VIU_OSD_BLK_CFG_W0_INTERP_CTRL __BITS(13,12)
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#define VIU_OSD_BLK_CFG_W0_OSD_BLK_MODE __BITS(11,8)
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#define VIU_OSD_BLK_CFG_W0_OSD_BLK_MODE_PAL4 0
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#define VIU_OSD_BLK_CFG_W0_OSD_BLK_MODE_PAL16 1
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#define VIU_OSD_BLK_CFG_W0_OSD_BLK_MODE_PAL256 2
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#define VIU_OSD_BLK_CFG_W0_OSD_BLK_MODE_YUV 3
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#define VIU_OSD_BLK_CFG_W0_OSD_BLK_MODE_16BPP 4
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#define VIU_OSD_BLK_CFG_W0_OSD_BLK_MODE_32BPP 5
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#define VIU_OSD_BLK_CFG_W0_OSD_BLK_MODE_24BPP 7
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#define VIU_OSD_BLK_CFG_W0_RGB_EN __BIT(7)
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#define VIU_OSD_BLK_CFG_W0_TC_ALPHA_EN __BIT(6)
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#define VIU_OSD_BLK_CFG_W0_COLOR_MATRIX __BITS(5,2)
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#define VIU_OSD_BLK_CFG_W0_COLOR_MATRIX_RGB 0
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#define VIU_OSD_BLK_CFG_W0_COLOR_MATRIX_RGBA 0
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#define VIU_OSD_BLK_CFG_W0_COLOR_MATRIX_ARGB 1
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#define VIU_OSD_BLK_CFG_W0_COLOR_MATRIX_ABGR 2
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#define VIU_OSD_BLK_CFG_W0_COLOR_MATRIX_BGRA 3
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#define VIU_OSD_BLK_CFG_W0_COLOR_MATRIX_RGB565 4
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#define VIU_OSD_BLK_CFG_W0_INTERLACE_EN __BIT(1)
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#define VIU_OSD_BLK_CFG_W0_INTERLACE_SEL_ODD __BIT(0)
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@ -79,7 +102,12 @@
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#define VIU_OSD_BLK_CFG_W4_V_END __BITS(27,16)
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#define VIU_OSD_BLK_CFG_W4_V_START __BITS(11,0)
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#define VPP_MISC_OSD2_PREBLEND __BIT(17)
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#define VPP_MISC_OSD1_PREBLEND __BIT(16)
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#define VPP_MISC_OSD2_POSTBLEND __BIT(13)
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#define VPP_MISC_OSD1_POSTBLEND __BIT(12)
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#define VPP_MISC_POSTBLEND __BIT(7)
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#define VPP_MISC_PREBLEND __BIT(6)
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#define VPP_OSD_VSC_PHASE_STEP_FORMAT __BITS(27,0)
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@ -1,4 +1,4 @@
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/* $NetBSD: amlogic_machdep.c,v 1.19 2015/03/29 22:49:44 jmcneill Exp $ */
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/* $NetBSD: amlogic_machdep.c,v 1.20 2015/04/03 18:03:05 jmcneill Exp $ */
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/*
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* Machine dependent functions for kernel setup for TI OSK5912 board.
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@ -125,7 +125,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: amlogic_machdep.c,v 1.19 2015/03/29 22:49:44 jmcneill Exp $");
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__KERNEL_RCSID(0, "$NetBSD: amlogic_machdep.c,v 1.20 2015/04/03 18:03:05 jmcneill Exp $");
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#include "opt_machdep.h"
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#include "opt_ddb.h"
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@ -545,7 +545,7 @@ amlogic_device_register(device_t self, void *aux)
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#if NGENFB > 0
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if (device_is_a(self, "genfb")) {
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char *ptr;
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int scale;
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int scale, depth;
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amlogic_genfb_set_console_dev(self);
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#ifdef DDB
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db_trap_callback = amlogic_genfb_ddb_trap_callback;
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@ -563,6 +563,10 @@ amlogic_device_register(device_t self, void *aux)
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BOOTOPT_TYPE_INT, &scale) && scale > 0) {
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prop_dictionary_set_uint32(dict, "scale", scale);
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}
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if (get_bootconf_option(boot_args, "fb.depth",
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BOOTOPT_TYPE_INT, &depth)) {
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prop_dictionary_set_uint32(dict, "depth", depth);
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}
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}
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#endif
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}
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