Pull up following revision(s) (requested by mrg in ticket #682):
tools/gcc/gcc-version.mk: revision 1.10 (via patch) external/gpl3/gcc.old/dist/gcc/config/i386/i386.c: revision 1.10 external/gpl3/gcc.old/dist/gcc/config/i386/i386-protos.h: revision 1.6 external/gpl3/gcc.old/dist/gcc/config/i386/constraints.md: revision 1.6 external/gpl3/gcc.old/dist/gcc/doc/invoke.texi: revision 1.7 external/gpl3/gcc.old/dist/gcc/config/i386/i386.md: revision 1.7 external/gpl3/gcc.old/dist/gcc/doc/extend.texi: revision 1.7 external/gpl3/gcc.old/dist/gcc/config/i386/i386-opts.h: revision 1.4 external/gpl3/gcc.old/dist/gcc/config/i386/predicates.md: revision 1.6 external/gpl3/gcc.old/dist/gcc/config/i386/i386.h: revision 1.7 external/gpl3/gcc.old/dist/gcc/config/i386/i386.opt: revision 1.7 (with external/gpl3/gcc.old/ -> external/gpl3/gcc/) add the spectre mitigation options for x86: -mindirect-branch=<choice> -mfunction-return=<choice> -mindirect-branch-register the values for 'choice' are "keep" (default, existing behaviour), "thunk", "thunk-inline", and "thunk-extern". as taken from the Ubuntu port of these changes in their ubuntu:gcc-5_5.5.0-8ubuntu1.diff. i've also included the doc updates that are missing from ubuntu from gcc itself. i've tested both i386 and amd64 fairly heavily with these options enabled in both kernels and userland, atf runs and hundreds of package builds. bump the NetBSD GCC version. both GCC 5 and 6 got x86 spectre mitigation code, and both are now "nb2 20180327".
This commit is contained in:
martin
parent
0899705389
commit
12be5c4b38
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@ -157,12 +157,14 @@
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(define_constraint "Bs"
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"@internal Sibcall memory operand."
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(and (not (match_test "TARGET_X32"))
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(and (not (match_test "ix86_indirect_branch_register"))
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(not (match_test "TARGET_X32"))
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(match_operand 0 "sibcall_memory_operand")))
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(define_constraint "Bw"
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"@internal Call memory operand."
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(and (not (match_test "TARGET_X32"))
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(and (not (match_test "ix86_indirect_branch_register"))
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(not (match_test "TARGET_X32"))
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(match_operand 0 "memory_operand")))
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(define_constraint "Bz"
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@ -99,4 +99,17 @@ enum stack_protector_guard {
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SSP_GLOBAL /* global canary */
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};
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/* This is used to mitigate variant #2 of the speculative execution
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vulnerabilities on x86 processors identified by CVE-2017-5715, aka
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Spectre. They convert indirect branches and function returns to
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call and return thunks to avoid speculative execution via indirect
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call, jmp and ret. */
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enum indirect_branch {
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indirect_branch_unset = 0,
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indirect_branch_keep,
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indirect_branch_thunk,
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indirect_branch_thunk_inline,
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indirect_branch_thunk_extern
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};
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#endif
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@ -306,6 +306,8 @@ extern enum attr_cpu ix86_schedule;
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#endif
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extern const char * ix86_output_call_insn (rtx_insn *insn, rtx call_op);
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extern const char * ix86_output_indirect_jmp (rtx call_op, bool ret_p);
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extern const char * ix86_output_function_return (bool long_p);
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#ifdef RTX_CODE
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/* Target data for multipass lookahead scheduling.
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File diff suppressed because it is too large
Load Diff
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@ -1210,6 +1210,9 @@ extern const char *host_detect_local_cpu (int argc, const char **argv);
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/* Base register for access to local variables of the function. */
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#define FRAME_POINTER_REGNUM 20
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#define FIRST_INT_REG AX_REG
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#define LAST_INT_REG SP_REG
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/* First floating point reg */
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#define FIRST_FLOAT_REG 8
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@ -1446,6 +1449,8 @@ enum reg_class
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registers. */
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#define TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P hook_bool_mode_true
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#define LEGACY_INT_REGNO_P(N) (IN_RANGE ((N), FIRST_INT_REG, LAST_INT_REG))
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#define QI_REG_P(X) (REG_P (X) && QI_REGNO_P (REGNO (X)))
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#define QI_REGNO_P(N) IN_RANGE ((N), AX_REG, BX_REG)
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@ -2390,9 +2395,56 @@ enum avx_u128_state
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#define FASTCALL_PREFIX '@'
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#ifndef USED_FOR_TARGET
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/* Structure describing stack frame layout.
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Stack grows downward:
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[arguments]
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<- ARG_POINTER
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saved pc
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saved static chain if ix86_static_chain_on_stack
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saved frame pointer if frame_pointer_needed
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<- HARD_FRAME_POINTER
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[saved regs]
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<- regs_save_offset
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[padding0]
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[saved SSE regs]
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<- sse_regs_save_offset
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[padding1] |
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| <- FRAME_POINTER
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[va_arg registers] |
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[frame] |
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[padding2] | = to_allocate
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<- STACK_POINTER
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*/
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struct GTY(()) ix86_frame
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{
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int nsseregs;
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int nregs;
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int va_arg_size;
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int red_zone_size;
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int outgoing_arguments_size;
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/* The offsets relative to ARG_POINTER. */
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HOST_WIDE_INT frame_pointer_offset;
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HOST_WIDE_INT hard_frame_pointer_offset;
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HOST_WIDE_INT stack_pointer_offset;
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HOST_WIDE_INT hfp_save_offset;
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HOST_WIDE_INT reg_save_offset;
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HOST_WIDE_INT sse_reg_save_offset;
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/* When save_regs_using_mov is set, emit prologue using
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move instead of push instructions. */
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bool save_regs_using_mov;
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};
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/* Machine specific frame tracking during prologue/epilogue generation. */
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#ifndef USED_FOR_TARGET
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struct GTY(()) machine_frame_state
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{
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/* This pair tracks the currently active CFA as reg+offset. When reg
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@ -2438,6 +2490,9 @@ struct GTY(()) machine_function {
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int varargs_fpr_size;
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int optimize_mode_switching[MAX_386_ENTITIES];
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/* Cached initial frame layout for the current function. */
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struct ix86_frame frame;
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/* Number of saved registers USE_FAST_PROLOGUE_EPILOGUE
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has been computed for. */
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int use_fast_prologue_epilogue_nregs;
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@ -2481,6 +2536,16 @@ struct GTY(()) machine_function {
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/* If true, it is safe to not save/restore DRAP register. */
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BOOL_BITFIELD no_drap_save_restore : 1;
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/* How to generate indirec branch. */
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ENUM_BITFIELD(indirect_branch) indirect_branch_type : 3;
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/* If true, the current function has local indirect jumps, like
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"indirect_jump" or "tablejump". */
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BOOL_BITFIELD has_local_indirect_jump : 1;
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/* How to generate function return. */
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ENUM_BITFIELD(indirect_branch) function_return_type : 3;
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/* During prologue/epilogue generation, the current frame state.
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Otherwise, the frame state at the end of the prologue. */
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struct machine_frame_state fs;
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@ -2505,6 +2570,7 @@ struct GTY(()) machine_function {
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#define ix86_current_function_calls_tls_descriptor \
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(ix86_tls_descriptor_calls_expanded_in_cfun && df_regs_ever_live_p (SP_REG))
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#define ix86_static_chain_on_stack (cfun->machine->static_chain_on_stack)
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#define ix86_red_zone_size (cfun->machine->frame.red_zone_size)
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/* Control behavior of x86_file_start. */
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#define X86_FILE_START_VERSION_DIRECTIVE false
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@ -11585,15 +11585,20 @@
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[(set (pc) (match_operand 0 "indirect_branch_operand"))]
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""
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{
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if (TARGET_X32)
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if (TARGET_X32 || ix86_indirect_branch_register)
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operands[0] = convert_memory_address (word_mode, operands[0]);
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cfun->machine->has_local_indirect_jump = true;
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})
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(define_insn "*indirect_jump"
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[(set (pc) (match_operand:W 0 "indirect_branch_operand" "rBw"))]
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""
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"%!jmp\t%A0"
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[(set_attr "type" "ibr")
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"* return ix86_output_indirect_jmp (operands[0], false);"
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[(set (attr "type")
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(if_then_else (match_test "(cfun->machine->indirect_branch_type
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!= indirect_branch_keep)")
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(const_string "multi")
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(const_string "ibr")))
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(set_attr "length_immediate" "0")])
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(define_expand "tablejump"
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@ -11633,16 +11638,21 @@
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OPTAB_DIRECT);
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}
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if (TARGET_X32)
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if (TARGET_X32 || ix86_indirect_branch_register)
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operands[0] = convert_memory_address (word_mode, operands[0]);
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cfun->machine->has_local_indirect_jump = true;
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})
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(define_insn "*tablejump_1"
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[(set (pc) (match_operand:W 0 "indirect_branch_operand" "rBw"))
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(use (label_ref (match_operand 1)))]
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""
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"%!jmp\t%A0"
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[(set_attr "type" "ibr")
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"* return ix86_output_indirect_jmp (operands[0], false);"
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[(set (attr "type")
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(if_then_else (match_test "(cfun->machine->indirect_branch_type
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!= indirect_branch_keep)")
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(const_string "multi")
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(const_string "ibr")))
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(set_attr "length_immediate" "0")])
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;; Convert setcc + movzbl to xor + setcc if operands don't overlap.
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@ -11791,7 +11801,7 @@
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[(call (mem:QI (match_operand:W 0 "memory_operand" "m"))
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(match_operand 1))
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(unspec [(const_int 0)] UNSPEC_PEEPSIB)]
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"!TARGET_X32"
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"!TARGET_X32 && !ix86_indirect_branch_register"
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"* return ix86_output_call_insn (insn, operands[0]);"
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[(set_attr "type" "call")])
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@ -11800,7 +11810,9 @@
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(match_operand:W 1 "memory_operand"))
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(call (mem:QI (match_dup 0))
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(match_operand 3))]
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"!TARGET_X32 && SIBLING_CALL_P (peep2_next_insn (1))
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"!TARGET_X32
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&& !ix86_indirect_branch_register
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&& SIBLING_CALL_P (peep2_next_insn (1))
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&& peep2_reg_dead_p (2, operands[0])"
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[(parallel [(call (mem:QI (match_dup 1))
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(match_dup 3))
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@ -11812,7 +11824,9 @@
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(unspec_volatile [(const_int 0)] UNSPECV_BLOCKAGE)
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(call (mem:QI (match_dup 0))
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(match_operand 3))]
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"!TARGET_X32 && SIBLING_CALL_P (peep2_next_insn (2))
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"!TARGET_X32
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&& !ix86_indirect_branch_register
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&& SIBLING_CALL_P (peep2_next_insn (2))
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&& peep2_reg_dead_p (3, operands[0])"
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[(unspec_volatile [(const_int 0)] UNSPECV_BLOCKAGE)
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(parallel [(call (mem:QI (match_dup 1))
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@ -11833,7 +11847,7 @@
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})
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(define_insn "*call_pop"
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[(call (mem:QI (match_operand:SI 0 "call_insn_operand" "lmBz"))
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[(call (mem:QI (match_operand:SI 0 "call_insn_operand" "lBwBz"))
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(match_operand 1))
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(set (reg:SI SP_REG)
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(plus:SI (reg:SI SP_REG)
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@ -11853,7 +11867,7 @@
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[(set_attr "type" "call")])
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(define_insn "*sibcall_pop_memory"
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[(call (mem:QI (match_operand:SI 0 "memory_operand" "m"))
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[(call (mem:QI (match_operand:SI 0 "memory_operand" "Bs"))
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(match_operand 1))
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(set (reg:SI SP_REG)
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(plus:SI (reg:SI SP_REG)
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@ -11905,7 +11919,9 @@
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[(set (match_operand:W 0 "register_operand")
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(match_operand:W 1 "memory_operand"))
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(set (pc) (match_dup 0))]
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"!TARGET_X32 && peep2_reg_dead_p (2, operands[0])"
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"!TARGET_X32
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&& !ix86_indirect_branch_register
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&& peep2_reg_dead_p (2, operands[0])"
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[(set (pc) (match_dup 1))])
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;; Call subroutine, returning value in operand 0
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@ -11955,7 +11971,7 @@
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(call (mem:QI (match_operand:W 1 "memory_operand" "m"))
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(match_operand 2)))
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(unspec [(const_int 0)] UNSPEC_PEEPSIB)]
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"!TARGET_X32"
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"!TARGET_X32 && !ix86_indirect_branch_register"
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"* return ix86_output_call_insn (insn, operands[1]);"
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[(set_attr "type" "callv")])
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@ -11965,7 +11981,9 @@
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(set (match_operand 2)
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(call (mem:QI (match_dup 0))
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(match_operand 3)))]
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"!TARGET_X32 && SIBLING_CALL_P (peep2_next_insn (1))
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"!TARGET_X32
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&& !ix86_indirect_branch_register
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&& SIBLING_CALL_P (peep2_next_insn (1))
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&& peep2_reg_dead_p (2, operands[0])"
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[(parallel [(set (match_dup 2)
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(call (mem:QI (match_dup 1))
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@ -11979,7 +11997,9 @@
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(set (match_operand 2)
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(call (mem:QI (match_dup 0))
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(match_operand 3)))]
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"!TARGET_X32 && SIBLING_CALL_P (peep2_next_insn (2))
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"!TARGET_X32
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&& !ix86_indirect_branch_register
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&& SIBLING_CALL_P (peep2_next_insn (2))
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&& peep2_reg_dead_p (3, operands[0])"
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[(unspec_volatile [(const_int 0)] UNSPECV_BLOCKAGE)
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(parallel [(set (match_dup 2)
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@ -12003,7 +12023,7 @@
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(define_insn "*call_value_pop"
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[(set (match_operand 0)
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(call (mem:QI (match_operand:SI 1 "call_insn_operand" "lmBz"))
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(call (mem:QI (match_operand:SI 1 "call_insn_operand" "lBwBz"))
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(match_operand 2)))
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(set (reg:SI SP_REG)
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(plus:SI (reg:SI SP_REG)
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@ -12196,7 +12216,7 @@
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(define_insn "simple_return_internal"
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[(simple_return)]
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"reload_completed"
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"%!ret"
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"* return ix86_output_function_return (false);"
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[(set_attr "length_nobnd" "1")
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(set_attr "atom_unit" "jeu")
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(set_attr "length_immediate" "0")
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@ -12209,12 +12229,7 @@
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[(simple_return)
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(unspec [(const_int 0)] UNSPEC_REP)]
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"reload_completed"
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{
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if (ix86_bnd_prefixed_insn_p (insn))
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return "%!ret";
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return "rep%; ret";
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}
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"* return ix86_output_function_return (true);"
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[(set_attr "length" "2")
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(set_attr "atom_unit" "jeu")
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(set_attr "length_immediate" "0")
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@ -12235,8 +12250,12 @@
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[(simple_return)
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(use (match_operand:SI 0 "register_operand" "r"))]
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"reload_completed"
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"%!jmp\t%A0"
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[(set_attr "type" "ibr")
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"* return ix86_output_indirect_jmp (operands[0], true);"
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[(set (attr "type")
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(if_then_else (match_test "(cfun->machine->indirect_branch_type
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!= indirect_branch_keep)")
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(const_string "multi")
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(const_string "ibr")))
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(set_attr "length_immediate" "0")])
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(define_insn "nop"
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@ -876,3 +876,31 @@ Enum(stack_protector_guard) String(tls) Value(SSP_TLS)
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EnumValue
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Enum(stack_protector_guard) String(global) Value(SSP_GLOBAL)
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mindirect-branch=
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Target Report RejectNegative Joined Enum(indirect_branch) Var(ix86_indirect_branch) Init(indirect_branch_keep)
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Convert indirect call and jump to call and return thunks.
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mfunction-return=
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Target Report RejectNegative Joined Enum(indirect_branch) Var(ix86_function_return) Init(indirect_branch_keep)
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Convert function return to call and return thunk.
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Enum
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Name(indirect_branch) Type(enum indirect_branch)
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Known indirect branch choices (for use with the -mindirect-branch=/-mfunction-return= options):
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EnumValue
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Enum(indirect_branch) String(keep) Value(indirect_branch_keep)
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EnumValue
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Enum(indirect_branch) String(thunk) Value(indirect_branch_thunk)
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EnumValue
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Enum(indirect_branch) String(thunk-inline) Value(indirect_branch_thunk_inline)
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EnumValue
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Enum(indirect_branch) String(thunk-extern) Value(indirect_branch_thunk_extern)
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mindirect-branch-register
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Target Report Var(ix86_indirect_branch_register) Init(0)
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Force indirect call and jump via register.
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@ -607,7 +607,8 @@
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;; Test for a valid operand for indirect branch.
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(define_predicate "indirect_branch_operand"
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(ior (match_operand 0 "register_operand")
|
||||
(and (not (match_test "TARGET_X32"))
|
||||
(and (not (match_test "ix86_indirect_branch_register"))
|
||||
(not (match_test "TARGET_X32"))
|
||||
(match_operand 0 "memory_operand"))))
|
||||
|
||||
;; Test for a valid operand for a call instruction.
|
||||
|
|
@ -616,7 +617,8 @@
|
|||
(ior (match_test "constant_call_address_operand
|
||||
(op, mode == VOIDmode ? mode : Pmode)")
|
||||
(match_operand 0 "call_register_no_elim_operand")
|
||||
(and (not (match_test "TARGET_X32"))
|
||||
(and (not (match_test "ix86_indirect_branch_register"))
|
||||
(not (match_test "TARGET_X32"))
|
||||
(match_operand 0 "memory_operand"))))
|
||||
|
||||
;; Similarly, but for tail calls, in which we cannot allow memory references.
|
||||
|
|
@ -624,7 +626,8 @@
|
|||
(ior (match_test "constant_call_address_operand
|
||||
(op, mode == VOIDmode ? mode : Pmode)")
|
||||
(match_operand 0 "register_no_elim_operand")
|
||||
(and (not (match_test "TARGET_X32"))
|
||||
(and (not (match_test "ix86_indirect_branch_register"))
|
||||
(not (match_test "TARGET_X32"))
|
||||
(match_operand 0 "sibcall_memory_operand"))))
|
||||
|
||||
;; Match exactly zero.
|
||||
|
|
|
|||
|
|
@ -4119,6 +4119,25 @@ Specify which floating-point unit to use. The
|
|||
@code{target("fpmath=sse,387")} option must be specified as
|
||||
@code{target("fpmath=sse+387")} because the comma would separate
|
||||
different options.
|
||||
|
||||
@item indirect_branch("@var{choice}")
|
||||
@cindex @code{indirect_branch} function attribute, x86
|
||||
On x86 targets, the @code{indirect_branch} attribute causes the compiler
|
||||
to convert indirect call and jump with @var{choice}. @samp{keep}
|
||||
keeps indirect call and jump unmodified. @samp{thunk} converts indirect
|
||||
call and jump to call and return thunk. @samp{thunk-inline} converts
|
||||
indirect call and jump to inlined call and return thunk.
|
||||
@samp{thunk-extern} converts indirect call and jump to external call
|
||||
and return thunk provided in a separate object file.
|
||||
|
||||
@item function_return("@var{choice}")
|
||||
@cindex @code{function_return} function attribute, x86
|
||||
On x86 targets, the @code{function_return} attribute causes the compiler
|
||||
to convert function return with @var{choice}. @samp{keep} keeps function
|
||||
return unmodified. @samp{thunk} converts function return to call and
|
||||
return thunk. @samp{thunk-inline} converts function return to inlined
|
||||
call and return thunk. @samp{thunk-extern} converts function return to
|
||||
external call and return thunk provided in a separate object file.
|
||||
@end table
|
||||
|
||||
On the PowerPC, the following options are allowed:
|
||||
|
|
|
|||
|
|
@ -23214,6 +23214,42 @@ permits the correct alignment of COMMON variables should be
|
|||
used when generating code. It is enabled by default if
|
||||
GCC detects that the target assembler found during configuration
|
||||
supports the feature.
|
||||
|
||||
@item -mindirect-branch=@var{choice}
|
||||
@opindex -mindirect-branch
|
||||
Convert indirect call and jump with @var{choice}. The default is
|
||||
@samp{keep}, which keeps indirect call and jump unmodified.
|
||||
@samp{thunk} converts indirect call and jump to call and return thunk.
|
||||
@samp{thunk-inline} converts indirect call and jump to inlined call
|
||||
and return thunk. @samp{thunk-extern} converts indirect call and jump
|
||||
to external call and return thunk provided in a separate object file.
|
||||
You can control this behavior for a specific function by using the
|
||||
function attribute @code{indirect_branch}. @xref{Function Attributes}.
|
||||
|
||||
Note that @option{-mcmodel=large} is incompatible with
|
||||
@option{-mindirect-branch=thunk} nor
|
||||
@option{-mindirect-branch=thunk-extern} since the thunk function may
|
||||
not be reachable in large code model.
|
||||
|
||||
@item -mfunction-return=@var{choice}
|
||||
@opindex -mfunction-return
|
||||
Convert function return with @var{choice}. The default is @samp{keep},
|
||||
which keeps function return unmodified. @samp{thunk} converts function
|
||||
return to call and return thunk. @samp{thunk-inline} converts function
|
||||
return to inlined call and return thunk. @samp{thunk-extern} converts
|
||||
function return to external call and return thunk provided in a separate
|
||||
object file. You can control this behavior for a specific function by
|
||||
using the function attribute @code{function_return}.
|
||||
@xref{Function Attributes}.
|
||||
|
||||
Note that @option{-mcmodel=large} is incompatible with
|
||||
@option{-mfunction-return=thunk} nor
|
||||
@option{-mfunction-return=thunk-extern} since the thunk function may
|
||||
not be reachable in large code model.
|
||||
|
||||
@item -mindirect-branch-register
|
||||
@opindex -mindirect-branch-register
|
||||
Force indirect call and jump via register.
|
||||
@end table
|
||||
|
||||
See also under @ref{x86 Options} for standard options.
|
||||
|
|
|
|||
|
|
@ -1,5 +1,5 @@
|
|||
# $NetBSD: gcc-version.mk,v 1.7 2017/02/22 12:34:49 maya Exp $
|
||||
# $NetBSD: gcc-version.mk,v 1.7.4.1 2018/04/01 09:00:42 martin Exp $
|
||||
|
||||
# common location for tools and native build
|
||||
|
||||
NETBSD_GCC_VERSION=nb1 20160606
|
||||
NETBSD_GCC_VERSION=nb2 20180327
|
||||
|
|
|
|||
Loading…
Reference in New Issue