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Correct PCI interrput setup routine for Texas Instruments PCI113X. 

Now PCI113X is able to handle hot insertion and deletion properly.
This commit is contained in:
haya 2000-08-28 09:26:38 +00:00
parent 21ddff737c
commit 128fa6e8fb
1 changed files with 9 additions and 5 deletions
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14
sys/dev/pci/pccbb.c
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@ -1,4 +1,4 @@
/* $NetBSD: pccbb.c,v 1.44 2000/07/09 22:06:02 jhawk Exp $ */ /* $NetBSD: pccbb.c,v 1.45 2000/08/28 09:26:38 haya Exp $ */
/* /*
* Copyright (c) 1998, 1999 and 2000 * Copyright (c) 1998, 1999 and 2000
@ -755,8 +755,8 @@ pccbb_chipinit(sc)
reg |= PCI113X_CBCTRL_PCI_IRQ_ENA; reg |= PCI113X_CBCTRL_PCI_IRQ_ENA;
/* CSC intr enable */ /* CSC intr enable */
reg |= PCI113X_CBCTRL_PCI_CSC; reg |= PCI113X_CBCTRL_PCI_CSC;
/* functional intr prohibit */ /* functional intr prohibit | prohibit ISA routing */
reg &= ~PCI113X_CBCTRL_PCI_INTR; reg &= ~(PCI113X_CBCTRL_PCI_INTR | PCI113X_CBCTRL_INT_MASK);
pci_conf_write(pc, tag, PCI_CBCTRL, reg); pci_conf_write(pc, tag, PCI_CBCTRL, reg);
break; break;
@ -830,8 +830,12 @@ pccbb_pcmcia_attach_setup(sc, paa)
* 4) Clear any pending CSC interrupt. * 4) Clear any pending CSC interrupt.
*/ */
Pcic_write(ph, PCIC_INTR, PCIC_INTR_ENABLE | PCIC_INTR_RESET); Pcic_write(ph, PCIC_INTR, PCIC_INTR_ENABLE | PCIC_INTR_RESET);
Pcic_write(ph, PCIC_CSC_INTR, PCIC_CSC_INTR_CD_ENABLE); if (sc->sc_chipset == CB_TI113X) {
Pcic_read(ph, PCIC_CSC); Pcic_write(ph, PCIC_CSC_INTR, 0);
} else {
Pcic_write(ph, PCIC_CSC_INTR, PCIC_CSC_INTR_CD_ENABLE);
Pcic_read(ph, PCIC_CSC);
}
/* initialize pcmcia bus attachment */ /* initialize pcmcia bus attachment */
paa->paa_busname = "pcmcia"; paa->paa_busname = "pcmcia";