diff --git a/sys/arch/arc/conf/GENERIC b/sys/arch/arc/conf/GENERIC index bc7f260c992c..10bbfbcf702c 100644 --- a/sys/arch/arc/conf/GENERIC +++ b/sys/arch/arc/conf/GENERIC @@ -1,4 +1,4 @@ -# $NetBSD: GENERIC,v 1.30 2000/05/27 02:19:35 soren Exp $ +# $NetBSD: GENERIC,v 1.31 2000/06/09 05:33:02 soda Exp $ # $OpenBSD: GENERIC,v 1.29 1999/08/29 12:14:03 niklas Exp $ # # GENERIC -- everything that's currently supported @@ -6,7 +6,7 @@ include "arch/arc/conf/std.arc" -#ident "GENERIC-$Revision: 1.30 $" +#ident "GENERIC-$Revision: 1.31 $" maxusers 32 # estimated number of users @@ -114,7 +114,7 @@ options IPFILTER_LOG # ipmon(8) log support # These options enable verbose messages for several subsystems. # Warning, these may compile large string tables into the kernel! #options EISAVERBOSE # verbose EISA device autoconfig messages -#options PCIVERBOSE # verbose PCI device autoconfig messages +options PCIVERBOSE # verbose PCI device autoconfig messages #options PCI_CONFIG_DUMP # verbosely dump PCI config space options SCSIVERBOSE # human readable SCSI error messages @@ -194,13 +194,6 @@ com* at ast? slave ? # XXX - should be configured #atapibus* at wdc? channel ? -# ATAPI devices -# flags have the same meaning as for IDE drives. -# XXX - should be configured -#cd* at atapibus? drive ? flags 0x0000 # ATAPI CD-ROM drives -#sd* at atapibus? drive ? flags 0x0000 # ATAPI disk drives -#uk* at atapibus? drive ? flags 0x0000 # ATAPI unknown - # ISA parallel printer interfaces lpt0 at isa? port 0x378 irq 7 @@ -230,6 +223,9 @@ lpt0 at isa? port 0x378 irq 7 #### PCI bus devices +necpb* at mainbus0 # NEC RISCstation PCI host bridge. +pci* at necpb? + #pbcpcibr* at mainbus0 # Algorithmics PCI bus bridge. #pci* at pbcpcibr? @@ -238,6 +234,45 @@ lpt0 at isa? port 0x378 irq 7 #scsibus* at siop? #de* at pci? dev ? function ? +ex* at pci? dev ? function ? # 3Com 90x[B] +fxp* at pci? dev ? function ? # Intel EtherExpress PRO +le* at pci? dev ? function ? # PCnet-PCI +ne* at pci? dev ? function ? # NE2000-compatible +tlp* at pci? dev ? function ? # DECchip 21x4x (and clones) +#options TLP_MATCH_21040 +#options TLP_MATCH_21041 +#options TLP_MATCH_21140 +#options TLP_MATCH_21142 + +# IDE and related devices +# PCI IDE controllers - see pciide(4) for supported hardware. +# The 0x0001 flag force the driver to use DMA, even if the driver doesn't know +# how to set up DMA modes for this chip. This may work, or may cause +# a machine hang with some controllers. +pciide* at pci ? dev ? function ? flags 0x0000 +wd* at pciide? channel ? drive ? flags 0x0000 +atapibus* at pciide? channel ? + +tga* at pci? dev ? function ? # DEC ZLXp-E[123] Graphics +wsdisplay* at tga? +ahc* at pci? dev ? function ? # Adaptec [23]94x, aic78x0 SCSI +scsibus* at ahc? + +#### MII/PHY support + +exphy* at mii? phy ? # 3Com internal PHYs +icsphy* at mii? phy ? # Integrated Circuit Systems ICS1890 +inphy* at mii? phy ? # Intel 82555 PHYs +iophy* at mii? phy ? # Intel 82553 PHYs +lxtphy* at mii? phy ? # Level One LXT-970 PHYs +nsphy* at mii? phy ? # NS83840 PHYs +nsphyter* at mii? phy ? # NS83843 PHYs +qsphy* at mii? phy ? # Quality Semiconductor QS6612 PHYs +sqphy* at mii? phy ? # Seeq 80220/80221/80223 PHYs +tlphy* at mii? phy ? # ThunderLAN PHYs +tqphy* at mii? phy ? # TDK Semiconductor PHYs +ukphy* at mii? phy ? # generic unknown PHYs + #### SCSI bus devices sd* at scsibus? target ? lun ? @@ -247,6 +282,13 @@ ch* at scsibus? target ? lun ? ss* at scsibus? target ? lun ? uk* at scsibus? target ? lun ? +#### ATAPI bus devices + +# flags have the same meaning as for IDE drives. +cd* at atapibus? drive ? flags 0x0000 # ATAPI CD-ROM drives +sd* at atapibus? drive ? flags 0x0000 # ATAPI disk drives +uk* at atapibus? drive ? flags 0x0000 # ATAPI unknown + #### Pseudo devices # disk/mass storage pseudo-devices diff --git a/sys/arch/arc/conf/M403 b/sys/arch/arc/conf/M403 index 2bd423088ad5..4b3bd334cd75 100644 --- a/sys/arch/arc/conf/M403 +++ b/sys/arch/arc/conf/M403 @@ -1,4 +1,4 @@ -# $NetBSD: M403,v 1.5 2000/03/22 00:58:18 cgd Exp $ +# $NetBSD: M403,v 1.6 2000/06/09 05:33:02 soda Exp $ # # configuration file for MIPS Magnum 4000 system # @@ -135,6 +135,7 @@ pica* at mainbus0 # ACER Pica systems local bus. aclock0 at pica? #pc0 at pica? #opms0 at pica? +options COM_FREQ_MAGNUM=8192000 # 8.192 MHz - NEC M403 com0 at pica? com1 at pica? lpt0 at pica? diff --git a/sys/arch/arc/conf/files.arc b/sys/arch/arc/conf/files.arc index 166d4648bb5c..c3c78ba116a8 100644 --- a/sys/arch/arc/conf/files.arc +++ b/sys/arch/arc/conf/files.arc @@ -1,4 +1,4 @@ -# $NetBSD: files.arc,v 1.20 2000/05/29 10:17:44 soda Exp $ +# $NetBSD: files.arc,v 1.21 2000/06/09 05:33:03 soda Exp $ # $OpenBSD: files.arc,v 1.21 1999/09/11 10:20:20 niklas Exp $ # # maxpartitions must be first item in files.${ARCH} @@ -16,6 +16,11 @@ file arch/arc/dev/dma.c file arch/arc/arc/machdep.c #file arch/arc/arc/minidebug.c file arch/arc/arc/arc_trap.c +file arch/arc/arc/bus_space.c +file arch/arc/arc/bus_space_sparse.c +file arch/arc/arc/bus_space_large.c +file arch/arc/arc/bus_dma.c +file arch/arc/arc/wired_map.c file arch/arc/arc/arcbios.c @@ -25,11 +30,17 @@ file arch/arc/arc/arcbios.c include "dev/ata/files.ata" major { wd = 4 } +# Raster operations +include "dev/rasops/files.rasops" +include "dev/wsfont/files.wsfont" + # # "Workstation Console" glue. # include "dev/wscons/files.wscons" +include "dev/pckbc/files.pckbc" + # # System BUS types # @@ -48,6 +59,8 @@ file arch/arc/arc/cpu.c cpu device pica {} attach pica at mainbus # optional file arch/arc/pica/picabus.c pica +file arch/arc/jazz/jazzdmatlb.c # XXX pica +file arch/arc/jazz/bus_dma_jazz.c # XXX pica # # ALGOR bus autoconfiguration devices @@ -70,11 +83,23 @@ device pbcpcibr {} : pcibus attach pbcpcibr at mainbus # optional file arch/arc/pci/pbcpcibus.c pbcpcibr +# +# NEC RISCstation PCI host bridge +# +device necpb: pcibus +attach necpb at mainbus # optional +file arch/arc/pci/necpb.c necpb + # Ethernet chip on PICA bus device sn: ifnet, ether, arp attach sn at pica file arch/arc/dev/if_sn.c sn +# +# Machine-independent MII/PHY drivers. +# +include "dev/mii/files.mii" + # Use machine independent SCSI driver routines include "dev/scsipi/files.scsipi" major {sd = 0} @@ -101,6 +126,8 @@ define pcmcia {} # XXX dummy decl... include "dev/pci/files.pci" include "dev/isa/files.isa" +file arch/arc/pci/pciide_machdep.c pciide + # Real time clock, must have one.. device aclock attach aclock at pica with aclock_pica diff --git a/sys/arch/arc/include/pci_machdep.h b/sys/arch/arc/include/pci_machdep.h new file mode 100644 index 000000000000..c10ef7961767 --- /dev/null +++ b/sys/arch/arc/include/pci_machdep.h @@ -0,0 +1,85 @@ +/* $NetBSD: pci_machdep.h,v 1.1 2000/06/09 05:33:04 soda Exp $ */ +/* NetBSD: pci_machdep.h,v 1.3 1999/03/19 03:40:46 cgd Exp */ + +/* + * Copyright (c) 1996 Carnegie-Mellon University. + * All rights reserved. + * + * Author: Chris G. Demetriou + * + * Permission to use, copy, modify and distribute this software and + * its documentation is hereby granted, provided that both the copyright + * notice and this permission notice appear in all copies of the + * software, derivative works or modified versions, and any portions + * thereof, and that both notices appear in supporting documentation. + * + * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" + * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND + * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. + * + * Carnegie Mellon requests users of this software to return to + * + * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU + * School of Computer Science + * Carnegie Mellon University + * Pittsburgh PA 15213-3890 + * + * any improvements or extensions that they make and grant Carnegie the + * rights to redistribute these changes. + */ + +/* + * Machine-specific definitions for PCI autoconfiguration. + */ + +/* + * Types provided to machine-independent PCI code + */ +typedef struct arc_pci_chipset *pci_chipset_tag_t; +typedef u_long pcitag_t; +typedef u_long pci_intr_handle_t; + +/* + * arc-specific PCI structure and type definitions. + * NOT TO BE USED DIRECTLY BY MACHINE INDEPENDENT CODE. + */ +struct arc_pci_chipset { + void (*pc_attach_hook) __P((struct device *, + struct device *, struct pcibus_attach_args *)); + int (*pc_bus_maxdevs) __P((pci_chipset_tag_t, int)); + pcitag_t (*pc_make_tag) __P((pci_chipset_tag_t, int, int, int)); + pcireg_t (*pc_conf_read) __P((pci_chipset_tag_t, pcitag_t, + int)); + void (*pc_conf_write) __P((pci_chipset_tag_t, pcitag_t, int, + pcireg_t)); + int (*pc_intr_map) __P((pci_chipset_tag_t, pcitag_t, int, + int, pci_intr_handle_t *)); + const char *(*pc_intr_string) __P((pci_chipset_tag_t, + pci_intr_handle_t)); + void *(*pc_intr_establish) __P((pci_chipset_tag_t, + pci_intr_handle_t, int, int (*)(void *), void *)); + void (*pc_intr_disestablish) __P((pci_chipset_tag_t, + void *)); +}; + +/* + * Functions provided to machine-independent PCI code. + */ +#define pci_attach_hook(p, s, pba) \ + (*(pba)->pba_pc->pc_attach_hook)((p), (s), (pba)) +#define pci_bus_maxdevs(c, b) \ + (*(c)->pc_bus_maxdevs)((c), (b)) +#define pci_make_tag(c, b, d, f) \ + (*(c)->pc_make_tag)((c), (b), (d), (f)) +#define pci_conf_read(c, t, r) \ + (*(c)->pc_conf_read)((c), (t), (r)) +#define pci_conf_write(c, t, r, v) \ + (*(c)->pc_conf_write)((c), (t), (r), (v)) +#define pci_intr_map(c, it, ip, il, ihp) \ + (*(c)->pc_intr_map)((c), (it), (ip), (il), (ihp)) +#define pci_intr_string(c, ih) \ + (*(c)->pc_intr_string)((c), (ih)) +#define pci_intr_establish(c, ih, l, h, a) \ + (*(c)->pc_intr_establish)((c), (ih), (l), (h), (a)) +#define pci_intr_disestablish(c, iv) \ + (*(c)->pc_intr_disestablish)((c), (iv)) diff --git a/sys/arch/arc/include/vmparam.h b/sys/arch/arc/include/vmparam.h index 749164ef8275..fae123b9fbee 100644 --- a/sys/arch/arc/include/vmparam.h +++ b/sys/arch/arc/include/vmparam.h @@ -1,4 +1,4 @@ -/* $NetBSD: vmparam.h,v 1.5 2000/01/23 21:01:59 soda Exp $ */ +/* $NetBSD: vmparam.h,v 1.6 2000/06/09 05:33:04 soda Exp $ */ /* $OpenBSD: vmparam.h,v 1.3 1997/04/19 17:19:59 pefo Exp $ */ /* NetBSD: vmparam.h,v 1.5 1994/10/26 21:10:10 cgd Exp */ @@ -16,14 +16,8 @@ #define USRTEXT 0x00400000 #endif -#if 0 /* defined in in NetBSD, but not defined in OpenBSD */ -#define BTOPUSRSTACK 0x80000 /* btop(USRSTACK) */ -#define LOWPAGES 0x00001 -#define HIGHPAGES 0 +#ifndef KSEG2IOBUFSIZE +#define KSEG2IOBUFSIZE kseg2iobufsize /* reserve PTEs for KSEG2 I/O space */ -#define mapin(pte, v, pfnum, prot) \ - (*(int *)(pte) = ((pfnum) << PG_SHIFT) | (prot), MachTLBFlushAddr(v)) +extern vsize_t kseg2iobufsize; #endif - -/* pcb base */ -/*#define pcbb(p) ((u_int)(p)->p_addr) */ diff --git a/sys/arch/arc/pci/necpb.c b/sys/arch/arc/pci/necpb.c new file mode 100644 index 000000000000..bd09e358bc04 --- /dev/null +++ b/sys/arch/arc/pci/necpb.c @@ -0,0 +1,469 @@ +/* $NetBSD: necpb.c,v 1.1 2000/06/09 05:33:05 soda Exp $ */ + +/*- + * Copyright (c) 1997, 1998 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, + * NASA Ames Research Center. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by the NetBSD + * Foundation, Inc. and its contributors. + * 4. Neither the name of The NetBSD Foundation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * Copyright (c) 1996 Christopher G. Demetriou. All rights reserved. + * Copyright (c) 1994 Charles M. Hannum. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by Charles M. Hannum. + * 4. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#define _ARC_BUS_DMA_PRIVATE +#include + +#include + +#include +#include + +#include +#include + +#include +#include + +int necpbmatch __P((struct device *, struct cfdata *, void *)); +void necpbattach __P((struct device *, struct device *, void *)); + +static int necpbprint __P((void *, const char *)); + +void necpb_attach_hook __P((struct device *, struct device *, + struct pcibus_attach_args *)); +int necpb_bus_maxdevs __P((pci_chipset_tag_t, int)); +pcitag_t necpb_make_tag __P((pci_chipset_tag_t, int, int, int)); +void necpb_decompose_tag __P((pci_chipset_tag_t, pcitag_t, int *, + int *, int *)); +pcireg_t necpb_conf_read __P((pci_chipset_tag_t, pcitag_t, int)); +void necpb_conf_write __P((pci_chipset_tag_t, pcitag_t, int, + pcireg_t)); +int necpb_intr_map __P((pci_chipset_tag_t, pcitag_t, int, int, + pci_intr_handle_t *)); +const char * necpb_intr_string __P((pci_chipset_tag_t, pci_intr_handle_t)); +void * necpb_intr_establish __P((pci_chipset_tag_t, pci_intr_handle_t, + int, int (*func)(void *), void *)); +void necpb_intr_disestablish __P((pci_chipset_tag_t, void *)); + +int necpb_intr(unsigned, struct clockframe *); + + +struct cfattach necpb_ca = { + sizeof(struct necpb_softc), necpbmatch, necpbattach, +}; + +extern struct cfdriver necpb_cd; + +static struct necpb_intrhand *necpb_inttbl[4]; + +int +necpbmatch(parent, match, aux) + struct device *parent; + struct cfdata *match; + void *aux; +{ + struct confargs *ca = aux; + + if (strcmp(ca->ca_name, necpb_cd.cd_name) != 0) + return (0); + + return (1); +} + +void +necpbattach(parent, self, aux) + struct device *parent, *self; + void *aux; +{ + struct necpb_softc *sc = (struct necpb_softc *)self; + struct pcibus_attach_args pba; + int i; + + printf("\n"); + + arc_large_bus_space_init(&sc->sc_memt, "necpcimem", + RD94_P_PCI_MEM, 0, RD94_S_PCI_MEM); + arc_bus_space_init_extent(&sc->sc_memt, NULL, 0); + + arc_bus_space_init(&sc->sc_iot, "necpciio", + RD94_P_PCI_IO, RD94_V_PCI_IO, 0, RD94_S_PCI_IO); + arc_bus_space_init_extent(&sc->sc_iot, NULL, 0); + + jazz_bus_dma_tag_init(&sc->sc_dmat); + + sc->sc_pc.pc_attach_hook = necpb_attach_hook; + sc->sc_pc.pc_bus_maxdevs = necpb_bus_maxdevs; + sc->sc_pc.pc_make_tag = necpb_make_tag; + sc->sc_pc.pc_conf_read = necpb_conf_read; + sc->sc_pc.pc_conf_write = necpb_conf_write; + sc->sc_pc.pc_intr_map = necpb_intr_map; + sc->sc_pc.pc_intr_string = necpb_intr_string; + sc->sc_pc.pc_intr_establish = necpb_intr_establish; + sc->sc_pc.pc_intr_disestablish = necpb_intr_disestablish; + + out32(RD94_SYS_PCI_INTMASK, 0xf); + + for (i = 0; i < 4; i++) + necpb_inttbl[i] = NULL; + + set_intr(MIPS_INT_MASK_2, necpb_intr, 3); + + pba.pba_busname = "pci"; + pba.pba_iot = &sc->sc_iot; + pba.pba_memt = &sc->sc_memt; + pba.pba_dmat = &sc->sc_dmat; + pba.pba_pc = &sc->sc_pc; + pba.pba_flags = PCI_FLAGS_IO_ENABLED | PCI_FLAGS_MEM_ENABLED; + pba.pba_bus = 0; + + config_found(self, &pba, necpbprint); +} + +static int +necpbprint(aux, pnp) + void *aux; + const char *pnp; +{ + struct pcibus_attach_args *pba = aux; + + if (pnp) + printf("%s at %s", pba->pba_busname, pnp); + printf(" bus %d", pba->pba_bus); + return (UNCONF); +} + +void +necpb_attach_hook(parent, self, pba) + struct device *parent, *self; + struct pcibus_attach_args *pba; +{ + pci_chipset_tag_t pc = pba->pba_pc; + pcitag_t tag; + pcireg_t csr; + + /* XXX: enable all mem/io/busmaster */ + tag = necpb_make_tag(pc, 0, 3, 0); + csr = necpb_conf_read(pc, tag, PCI_COMMAND_STATUS_REG); + csr |= PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE | + PCI_COMMAND_MASTER_ENABLE; + necpb_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, csr); + + tag = necpb_make_tag(pc, 0, 4, 0); + csr = necpb_conf_read(pc, tag, PCI_COMMAND_STATUS_REG); + csr |= PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE | + PCI_COMMAND_MASTER_ENABLE; + necpb_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, csr); + + tag = necpb_make_tag(pc, 0, 5, 0); + csr = necpb_conf_read(pc, tag, PCI_COMMAND_STATUS_REG); + csr |= PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE | + PCI_COMMAND_MASTER_ENABLE; + necpb_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, csr); +} + +int +necpb_bus_maxdevs(pc, busno) + pci_chipset_tag_t pc; + int busno; +{ + return (32); +} + +pcitag_t +necpb_make_tag(pc, bus, device, function) + pci_chipset_tag_t pc; + int bus, device, function; +{ + pcitag_t tag; + + if (bus >= 256 || device >= 32 || function >= 8) + panic("necpb_make_tag: bad request"); + + tag = 0x80000000 | (bus << 16) | (device << 11) | (function << 8); + return (tag); +} + +void +necpb_decompose_tag(pc, tag, bp, dp, fp) + pci_chipset_tag_t pc; + pcitag_t tag; + int *bp, *dp, *fp; +{ + if (bp != NULL) + *bp = (tag >> 16) & 0xff; + if (dp != NULL) + *dp = (tag >> 11) & 0x1f; + if (fp != NULL) + *fp = (tag >> 8) & 0x07; +} + +pcireg_t +necpb_conf_read(pc, tag, reg) + pci_chipset_tag_t pc; + pcitag_t tag; + int reg; +{ + pcireg_t data; + int s; + + s = splhigh(); + out32(RD94_SYS_PCI_CONFADDR, tag | reg); + data = in32(RD94_SYS_PCI_CONFDATA); + out32(RD94_SYS_PCI_CONFADDR, 0); + splx(s); + + return (data); +} + +void +necpb_conf_write(pc, tag, reg, data) + pci_chipset_tag_t pc; + pcitag_t tag; + int reg; + pcireg_t data; +{ + int s; + + s = splhigh(); + out32(RD94_SYS_PCI_CONFADDR, tag | reg); + out32(RD94_SYS_PCI_CONFDATA, data); + out32(RD94_SYS_PCI_CONFADDR, 0); + splx(s); +} + +int +necpb_intr_map(pc, intrtag, pin, line, ihp) + pci_chipset_tag_t pc; + pcitag_t intrtag; + int pin, line; + pci_intr_handle_t *ihp; +{ + int bus, dev; + + if (pin == 0) { + /* No IRQ used. */ + *ihp = -1; + return (1); + } + + if (pin > 4) { + printf("necpb_intr_map: bad interrupt pin %d\n", pin); + *ihp = -1; + return (1); + } + + necpb_decompose_tag(pc, intrtag, &bus, &dev, NULL); + if (bus != 0) { + *ihp = -1; + return (1); + } + + switch (dev) { + case 3: + *ihp = (pin+2) % 4; + break; + case 4: + *ihp = (pin+1) % 4; + break; + case 5: + *ihp = (pin) % 4; + break; + default: + *ihp = -1; + return (1); + } + + return (0); +} + +const char * +necpb_intr_string(pc, ih) + pci_chipset_tag_t pc; + pci_intr_handle_t ih; +{ + static char str[8]; + + if (ih >= 4) + panic("necpb_intr_string: bogus handle %d", ih); + sprintf(str, "int %c", 'A' + (int)ih); + return (str); +} + +void * +necpb_intr_establish(pc, ih, level, func, arg) + pci_chipset_tag_t pc; + pci_intr_handle_t ih; + int level, (*func) __P((void *)); + void *arg; +{ + struct necpb_intrhand *n, *p; + u_int32_t mask; + + if (ih >= 4) + panic("necpb_intr_establish: bogus handle"); + + n = malloc(sizeof(struct necpb_intrhand), M_DEVBUF, M_NOWAIT); + if (n == NULL) + panic("necpb_intr_establish: can't malloc interrupt handle"); + + n->ih_func = func; + n->ih_arg = arg; + n->ih_next = NULL; + n->ih_intn = ih; + + if (necpb_inttbl[ih] == NULL) { + necpb_inttbl[ih] = n; + mask = in32(RD94_SYS_PCI_INTMASK); + mask |= 1 << ih; + out32(RD94_SYS_PCI_INTMASK, mask); + } else { + p = necpb_inttbl[ih]; + while (p->ih_next != NULL) + p = p->ih_next; + p->ih_next = n; + } + + return n; +} + +void +necpb_intr_disestablish(pc, cookie) + pci_chipset_tag_t pc; + void *cookie; +{ + struct necpb_intrhand *n, *p, *q; + u_int32_t mask; + + n = cookie; + + q = NULL; + p = necpb_inttbl[n->ih_intn]; + while (p != n) { + if (p == NULL) + panic("necpb_intr_disestablish: broken intr table"); + q = p; + p = p->ih_next; + } + + if (q == NULL) { + necpb_inttbl[n->ih_intn] = n->ih_next; + if (n->ih_next == NULL) { + mask = in32(RD94_SYS_PCI_INTMASK); + mask &= ~(1 << n->ih_intn); + out32(RD94_SYS_PCI_INTMASK, mask); + } + } else + q->ih_next = n->ih_next; + + free(n, M_DEVBUF); +} + +/* + * Handle PCI/EISA interrupt. + */ +int +necpb_intr(mask, cf) + unsigned mask; + struct clockframe *cf; +{ + u_int32_t vector, stat; + struct necpb_intrhand *p; + int a; + + vector = in32(RD94_SYS_INTSTAT2) & 0xffff; + + if (vector == 0x4000) { + stat = in32(RD94_SYS_PCI_INTSTAT); + stat &= in32(RD94_SYS_PCI_INTMASK); + for (a=0; a<4; a++) { + if (stat & (1 << a)) { +#if 0 + printf("pint %d\n", a); +#endif + p = necpb_inttbl[a]; + while (p != NULL) { + (*p->ih_func)(p->ih_arg); + p = p->ih_next; + } + } + } + } else if (vector == 0x8000) { + printf("eisa_nmi\n"); + } else { + printf("eint %d\n", vector & 0xff); +#if 0 + eisa_intr(vector & 0xff); +#endif + } + + return (~0); +} diff --git a/sys/arch/arc/pci/necpbvar.h b/sys/arch/arc/pci/necpbvar.h new file mode 100644 index 000000000000..61397b95c9e8 --- /dev/null +++ b/sys/arch/arc/pci/necpbvar.h @@ -0,0 +1,42 @@ +/* $NetBSD: necpbvar.h,v 1.1 2000/06/09 05:33:06 soda Exp $ */ + +/*- + * Copyright (C) 2000 Shuichiro URATA. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +struct necpb_softc { + struct device sc_dev; + struct arc_bus_space sc_memt; + struct arc_bus_space sc_iot; + struct arc_bus_dma_tag sc_dmat; + struct arc_pci_chipset sc_pc; +}; + +struct necpb_intrhand { + int (*ih_func) __P((void *)); + void *ih_arg; + struct necpb_intrhand *ih_next; + int ih_intn; +}; diff --git a/sys/arch/arc/pica/rd94.h b/sys/arch/arc/pica/rd94.h index 34e8f7d90283..ba3c748c6672 100644 --- a/sys/arch/arc/pica/rd94.h +++ b/sys/arch/arc/pica/rd94.h @@ -1,4 +1,4 @@ -/* $NetBSD: rd94.h,v 1.1 2000/03/03 13:08:42 soda Exp $ */ +/* $NetBSD: rd94.h,v 1.2 2000/06/09 05:33:06 soda Exp $ */ /* $OpenBSD: pica.h,v 1.4 1996/09/14 15:58:28 pefo Exp $ */ /* @@ -107,6 +107,6 @@ #define RD94_P_PCI_MEM 0x100000000LL /* PCI Memory control */ #define RD94_V_PCI_MEM 0xe3000000 -#define RD94_S_PCI_MEM 0x01000000 +#define RD94_S_PCI_MEM 0x40000000 #endif /* _RD94_H_ */