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Move these SBus drivers here from arch/sparc.

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This commit is contained in:
pk 2000-08-20 22:27:07 +00:00
parent d9426e06b6
commit 124d256269
3 changed files with 1163 additions and 0 deletions
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525
sys/dev/sbus/p9100.c Normal file
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/* $NetBSD: p9100.c,v 1.1 2000/08/20 22:27:07 pk Exp $ */
/*-
* Copyright (c) 1998 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Matt Thomas.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the NetBSD
* Foundation, Inc. and its contributors.
* 4. Neither the name of The NetBSD Foundation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/*
* color display (p9100) driver.
*
* Does not handle interrupts, even though they can occur.
*
* XXX should defer colormap updates to vertical retrace interrupts
*/
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/buf.h>
#include <sys/device.h>
#include <sys/ioctl.h>
#include <sys/malloc.h>
#include <sys/mman.h>
#include <sys/tty.h>
#include <sys/conf.h>
#include <machine/bus.h>
#include <machine/autoconf.h>
#include <dev/sun/fbio.h>
#include <dev/sun/fbvar.h>
#include <dev/sun/btreg.h>
#include <dev/sun/btvar.h>
#if 0
#include <dev/sbus/p9100reg.h>
#endif
#include <dev/sbus/sbusvar.h>
#include "tctrl.h"
#if NTCTRL > 0
#include <machine/tctrl.h>
#include <sparc/dev/tctrlvar.h>/*XXX*/
#endif
#include <machine/conf.h>
/* per-display variables */
struct p9100_softc {
struct device sc_dev; /* base device */
struct sbusdev sc_sd; /* sbus device */
struct fbdevice sc_fb; /* frame buffer device */
bus_space_tag_t sc_bustag;
bus_type_t sc_ctl_btype; /* phys address description */
bus_addr_t sc_ctl_paddr; /* for device mmap() */
bus_size_t sc_ctl_psize; /* for device mmap() */
bus_space_handle_t sc_ctl_memh; /* bus space handle */
bus_type_t sc_cmd_btype; /* phys address description */
bus_addr_t sc_cmd_paddr; /* for device mmap() */
bus_size_t sc_cmd_psize; /* for device mmap() */
bus_space_handle_t sc_cmd_memh; /* bus space handle */
bus_type_t sc_fb_btype; /* phys address description */
bus_addr_t sc_fb_paddr; /* for device mmap() */
bus_size_t sc_fb_psize; /* for device mmap() */
bus_space_handle_t sc_fb_memh; /* bus space handle */
uint32_t sc_junk;
union bt_cmap sc_cmap; /* Brooktree color map */
};
/* The Tadpole 3GX Technical Reference Manual lies. The ramdac registers
* are map in 4 byte increments, not 8.
*/
#define SCRN_RPNT_CTL_1 0x0138 /* Screen Respaint Timing Control 1 */
#define VIDEO_ENABLED 0x00000020
#define PWRUP_CNFG 0x0194 /* Power Up Configuration */
#define DAC_CMAP_WRIDX 0x0200 /* IBM RGB528 Palette Address (Write) */
#define DAC_CMAP_DATA 0x0204 /* IBM RGB528 Palette Data */
#define DAC_PXL_MASK 0x0208 /* IBM RGB528 Pixel Mask */
#define DAC_CMAP_RDIDX 0x020c /* IBM RGB528 Palette Address (Read) */
#define DAC_INDX_LO 0x0210 /* IBM RGB528 Index Low */
#define DAC_INDX_HI 0x0214 /* IBM RGB528 Index High */
#define DAC_INDX_DATA 0x0218 /* IBM RGB528 Index Data (Indexed Registers) */
#define DAC_INDX_CTL 0x021c /* IBM RGB528 Index Control */
/* autoconfiguration driver */
static int p9100_sbus_match(struct device *, struct cfdata *, void *);
static void p9100_sbus_attach(struct device *, struct device *, void *);
static void p9100unblank(struct device *);
static void p9100_shutdown(void *);
/* cdevsw prototypes */
cdev_decl(p9100);
struct cfattach pnozz_ca = {
sizeof(struct p9100_softc), p9100_sbus_match, p9100_sbus_attach
};
extern struct cfdriver pnozz_cd;
/* frame buffer generic driver */
static struct fbdriver p9100fbdriver = {
p9100unblank, p9100open, p9100close, p9100ioctl, p9100poll,
p9100mmap
};
static void p9100loadcmap(struct p9100_softc *, int, int);
static void p9100_set_video(struct p9100_softc *, int);
static int p9100_get_video(struct p9100_softc *);
static uint32_t p9100_ctl_read_4(struct p9100_softc *, bus_size_t);
static void p9100_ctl_write_4(struct p9100_softc *, bus_size_t, uint32_t);
#if 0
static uint8_t p9100_ramdac_read(struct p9100_softc *, bus_size_t);
#endif
static void p9100_ramdac_write(struct p9100_softc *, bus_size_t, uint8_t);
/*
* Match a p9100.
*/
static int
p9100_sbus_match(struct device *parent, struct cfdata *cf, void *aux)
{
struct sbus_attach_args *sa = aux;
return (strcmp("p9100", sa->sa_name) == 0);
}
/*
* Attach a display. We need to notice if it is the console, too.
*/
static void
p9100_sbus_attach(struct device *parent, struct device *self, void *args)
{
struct p9100_softc *sc = (struct p9100_softc *)self;
struct sbus_attach_args *sa = args;
struct fbdevice *fb = &sc->sc_fb;
int isconsole;
int node;
int i;
/* Remember cookies for p9100_mmap() */
sc->sc_bustag = sa->sa_bustag;
sc->sc_ctl_btype = (bus_type_t)sa->sa_reg[0].sbr_slot;
sc->sc_ctl_paddr = (bus_addr_t)sa->sa_reg[0].sbr_offset;
sc->sc_ctl_psize = (bus_size_t)sa->sa_reg[0].sbr_size;
sc->sc_cmd_btype = (bus_type_t)sa->sa_reg[1].sbr_slot;
sc->sc_cmd_paddr = (bus_addr_t)sa->sa_reg[1].sbr_offset;
sc->sc_cmd_psize = (bus_size_t)sa->sa_reg[1].sbr_size;
sc->sc_fb_btype = (bus_type_t)sa->sa_reg[2].sbr_slot;
sc->sc_fb_paddr = (bus_addr_t)sa->sa_reg[2].sbr_offset;
sc->sc_fb_psize = (bus_size_t)sa->sa_reg[2].sbr_size;
fb->fb_driver = &p9100fbdriver;
fb->fb_device = &sc->sc_dev;
fb->fb_flags = sc->sc_dev.dv_cfdata->cf_flags & FB_USERMASK;
fb->fb_type.fb_type = FBTYPE_SUN3COLOR;
node = sa->sa_node;
/*
* When the ROM has mapped in a p9100 display, the address
* maps only the video RAM, so in any case we have to map the
* registers ourselves. We only need the video RAM if we are
* going to print characters via rconsole.
*/
if (sbus_bus_map(sc->sc_bustag, sc->sc_ctl_btype,
sc->sc_ctl_paddr, sc->sc_ctl_psize,
BUS_SPACE_MAP_LINEAR, 0,
&sc->sc_ctl_memh) != 0) {
printf("%s: cannot map control registers\n", self->dv_xname);
return;
}
if (sbus_bus_map(sc->sc_bustag, sc->sc_cmd_btype,
sc->sc_cmd_paddr, sc->sc_cmd_psize,
BUS_SPACE_MAP_LINEAR, 0,
&sc->sc_cmd_memh) != 0) {
printf("%s: cannot map command registers\n", self->dv_xname);
return;
}
isconsole = fb_is_console(node);
if (sa->sa_npromvaddrs != 0)
fb->fb_pixels = (caddr_t)sa->sa_promvaddrs[0];
if (isconsole && fb->fb_pixels == NULL) {
if (sbus_bus_map(sc->sc_bustag, sc->sc_fb_btype,
sc->sc_fb_paddr, sc->sc_fb_psize,
BUS_SPACE_MAP_LINEAR, 0,
&sc->sc_fb_memh) != 0) {
printf("%s: cannot map framebuffer\n", self->dv_xname);
return;
}
fb->fb_pixels = (char *)sc->sc_fb_memh;
} else {
sc->sc_fb_memh = (bus_space_handle_t) fb->fb_pixels;
}
i = p9100_ctl_read_4(sc, 0x0004);
switch ((i >> 26) & 7) {
case 5: fb->fb_type.fb_depth = 32; break;
case 7: fb->fb_type.fb_depth = 24; break;
case 3: fb->fb_type.fb_depth = 16; break;
case 2: fb->fb_type.fb_depth = 8; break;
default: {
panic("pnozz: can't determine screen depth (0x%02x)", i);
}
}
fb_setsize_obp(fb, fb->fb_type.fb_depth, 800, 600, node);
sbus_establish(&sc->sc_sd, &sc->sc_dev);
fb->fb_type.fb_size = fb->fb_type.fb_height * fb->fb_linebytes;
printf(": rev %d, %dx%d, depth %d",
(i & 7), fb->fb_type.fb_width, fb->fb_type.fb_height,
fb->fb_type.fb_depth);
fb->fb_type.fb_cmsize = getpropint(node, "cmsize", 256);
if ((1 << fb->fb_type.fb_depth) != fb->fb_type.fb_cmsize)
printf(", %d entry colormap", fb->fb_type.fb_cmsize);
/* Initialize the default color map. */
bt_initcmap(&sc->sc_cmap, 256);
p9100loadcmap(sc, 0, 256);
/* make sure we are not blanked */
p9100_set_video(sc, 1);
if (shutdownhook_establish(p9100_shutdown, sc) == NULL) {
panic("%s: could not establish shutdown hook",
sc->sc_dev.dv_xname);
}
if (isconsole) {
printf(" (console)\n");
#ifdef RASTERCONSOLE
for (i = 0; i < fb->fb_type.fb_size; i++) {
if (fb->fb_pixels[i] == 0) {
fb->fb_pixels[i] = 1;
} else if (fb->fb_pixels[i] == (char) 255) {
fb->fb_pixels[i] = 0;
}
}
p9100loadcmap(sc, 255, 1);
fbrcons_init(fb);
#endif
} else
printf("\n");
fb_attach(fb, isconsole);
}
static void
p9100_shutdown(arg)
void *arg;
{
struct p9100_softc *sc = arg;
struct fbdevice *fb = &sc->sc_fb;
int i;
#ifdef RASTERCONSOLE
for (i = 0; i < fb->fb_type.fb_size; i++) {
if (fb->fb_pixels[i] == 1) {
fb->fb_pixels[i] = 0;
} else if (fb->fb_pixels[i] == 0) {
fb->fb_pixels[i] = 255;
}
}
sc->sc_cmap.cm_map[0][0] = 0xff;
sc->sc_cmap.cm_map[0][1] = 0xff;
sc->sc_cmap.cm_map[0][2] = 0xff;
sc->sc_cmap.cm_map[1][0] = 0;
sc->sc_cmap.cm_map[1][1] = 0;
sc->sc_cmap.cm_map[1][2] = 0x80;
p9100loadcmap(sc, 0, 2);
sc->sc_cmap.cm_map[255][0] = 0;
sc->sc_cmap.cm_map[255][1] = 0;
sc->sc_cmap.cm_map[255][2] = 0;
p9100loadcmap(sc, 255, 1);
#endif
p9100_set_video(sc, 1);
}
int
p9100open(dev_t dev, int flags, int mode, struct proc *p)
{
int unit = minor(dev);
if (unit >= pnozz_cd.cd_ndevs || pnozz_cd.cd_devs[unit] == NULL)
return (ENXIO);
return (0);
}
int
p9100close(dev_t dev, int flags, int mode, struct proc *p)
{
return (0);
}
int
p9100ioctl(dev_t dev, u_long cmd, caddr_t data, int flags, struct proc *p)
{
struct p9100_softc *sc = pnozz_cd.cd_devs[minor(dev)];
struct fbgattr *fba;
int error;
switch (cmd) {
case FBIOGTYPE:
*(struct fbtype *)data = sc->sc_fb.fb_type;
break;
case FBIOGATTR:
fba = (struct fbgattr *)data;
fba->real_type = sc->sc_fb.fb_type.fb_type;
fba->owner = 0; /* XXX ??? */
fba->fbtype = sc->sc_fb.fb_type;
fba->sattr.flags = 0;
fba->sattr.emu_type = sc->sc_fb.fb_type.fb_type;
fba->sattr.dev_specific[0] = -1;
fba->emu_types[0] = sc->sc_fb.fb_type.fb_type;
fba->emu_types[1] = -1;
break;
case FBIOGETCMAP:
#define p ((struct fbcmap *)data)
return (bt_getcmap(p, &sc->sc_cmap, 256, 1));
case FBIOPUTCMAP:
/* copy to software map */
error = bt_putcmap(p, &sc->sc_cmap, 256, 1);
if (error)
return (error);
/* now blast them into the chip */
/* XXX should use retrace interrupt */
p9100loadcmap(sc, p->index, p->count);
#undef p
break;
case FBIOGVIDEO:
*(int *)data = p9100_get_video(sc);
break;
case FBIOSVIDEO:
p9100_set_video(sc, *(int *)data);
break;
default:
return (ENOTTY);
}
return (0);
}
int
p9100poll(dev_t dev, int events, struct proc *p)
{
return seltrue(dev, events, p);
}
static uint32_t
p9100_ctl_read_4(struct p9100_softc *sc, bus_size_t off)
{
sc->sc_junk = bus_space_read_4(sc->sc_bustag, sc->sc_fb_memh, off);
return bus_space_read_4(sc->sc_bustag, sc->sc_ctl_memh, off);
}
static void
p9100_ctl_write_4(struct p9100_softc *sc, bus_size_t off, uint32_t v)
{
sc->sc_junk = bus_space_read_4(sc->sc_bustag, sc->sc_fb_memh, off);
bus_space_write_4(sc->sc_bustag, sc->sc_ctl_memh, off, v);
}
#if 0
static uint8_t
p9100_ramdac_read(struct p9100_softc *sc, bus_size_t off)
{
sc->sc_junk = p9100_ctl_read_4(sc, PWRUP_CNFG);
return p9100_ctl_read_4(sc, off) >> 16;
}
#endif
static void
p9100_ramdac_write(struct p9100_softc *sc, bus_size_t off, uint8_t v)
{
sc->sc_junk = p9100_ctl_read_4(sc, PWRUP_CNFG);
p9100_ctl_write_4(sc, off, v << 16);
}
/*
* Undo the effect of an FBIOSVIDEO that turns the video off.
*/
static void
p9100unblank(struct device *dev)
{
p9100_set_video((struct p9100_softc *)dev, 1);
}
static void
p9100_set_video(struct p9100_softc *sc, int enable)
{
u_int32_t v = p9100_ctl_read_4(sc, SCRN_RPNT_CTL_1);
if (enable)
v |= VIDEO_ENABLED;
else
v &= ~VIDEO_ENABLED;
p9100_ctl_write_4(sc, SCRN_RPNT_CTL_1, v);
#if NTCTRL > 0
/* Turn On/Off the TFT if we know how.
*/
tadpole_set_video(enable);
#endif
}
static int
p9100_get_video(struct p9100_softc *sc)
{
return (p9100_ctl_read_4(sc, SCRN_RPNT_CTL_1) & VIDEO_ENABLED) != 0;
}
/*
* Load a subset of the current (new) colormap into the IBM RAMDAC.
*/
static void
p9100loadcmap(struct p9100_softc *sc, int start, int ncolors)
{
u_char *p;
p9100_ramdac_write(sc, DAC_CMAP_WRIDX, start);
for (p = sc->sc_cmap.cm_map[start], ncolors *= 3; ncolors-- > 0; p++) {
p9100_ramdac_write(sc, DAC_CMAP_DATA, *p);
}
}
/*
* Return the address that would map the given device at the given
* offset, allowing for the given protection, or return -1 for error.
*/
paddr_t
p9100mmap(dev_t dev, off_t off, int prot)
{
struct p9100_softc *sc = pnozz_cd.cd_devs[minor(dev)];
bus_space_handle_t bh;
if (off & PGOFSET)
panic("p9100mmap");
if (off < 0)
return (-1);
#define CG3_MMAP_OFFSET 0x04000000
/* Make Xsun think we are a CG3 (SUN3COLOR)
*/
if (off >= CG3_MMAP_OFFSET && off < CG3_MMAP_OFFSET + sc->sc_fb_psize) {
off -= CG3_MMAP_OFFSET;
if (bus_space_mmap(sc->sc_bustag,
sc->sc_fb_btype,
sc->sc_fb_paddr + off,
BUS_SPACE_MAP_LINEAR, &bh))
return (-1);
return ((paddr_t)bh);
}
if (off >= sc->sc_fb_psize + sc->sc_ctl_psize + sc->sc_cmd_psize)
return (-1);
if (off < sc->sc_fb_psize) {
if (bus_space_mmap(sc->sc_bustag,
sc->sc_fb_btype,
sc->sc_fb_paddr + off,
BUS_SPACE_MAP_LINEAR, &bh))
return (-1);
return ((paddr_t)bh);
}
off -= sc->sc_fb_psize;
if (off < sc->sc_ctl_psize) {
if (bus_space_mmap(sc->sc_bustag,
sc->sc_ctl_btype,
sc->sc_ctl_paddr + off,
BUS_SPACE_MAP_LINEAR, &bh))
return (-1);
return ((paddr_t)bh);
}
off -= sc->sc_ctl_psize;
if (bus_space_mmap(sc->sc_bustag,
sc->sc_cmd_btype,
sc->sc_cmd_paddr + off,
BUS_SPACE_MAP_LINEAR, &bh))
return (-1);
return ((paddr_t)bh);
}

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/* $NetBSD: tcx.c,v 1.1 2000/08/20 22:27:07 pk Exp $ */
/*
* Copyright (c) 1996,1998 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Paul Kranenburg.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the NetBSD
* Foundation, Inc. and its contributors.
* 4. Neither the name of The NetBSD Foundation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/*
* color display (TCX) driver.
*
* Does not handle interrupts, even though they can occur.
*
* XXX should defer colormap updates to vertical retrace interrupts
*/
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/buf.h>
#include <sys/device.h>
#include <sys/ioctl.h>
#include <sys/malloc.h>
#include <sys/mman.h>
#include <sys/tty.h>
#include <sys/conf.h>
#ifdef DEBUG
#include <sys/proc.h>
#include <sys/syslog.h>
#endif
#include <machine/bus.h>
#include <machine/autoconf.h>
#include <dev/sbus/sbusvar.h>
#include <dev/sun/fbio.h>
#include <dev/sun/fbvar.h>
#include <dev/sun/btreg.h>
#include <dev/sun/btvar.h>
#include <dev/sun/tcxreg.h>
#include <machine/conf.h>
/* per-display variables */
struct tcx_softc {
struct device sc_dev; /* base device */
struct sbusdev sc_sd; /* sbus device */
struct fbdevice sc_fb; /* frame buffer device */
bus_space_tag_t sc_bustag;
struct sbus_reg sc_physadr[TCX_NREG]; /* phys addr of h/w */
volatile struct bt_regs *sc_bt; /* Brooktree registers */
volatile struct tcx_thc *sc_thc;/* THC registers */
short sc_blanked; /* true if blanked */
union bt_cmap sc_cmap; /* Brooktree color map */
};
/* autoconfiguration driver */
static void tcxattach __P((struct device *, struct device *, void *));
static int tcxmatch __P((struct device *, struct cfdata *, void *));
static void tcx_unblank __P((struct device *));
/* cdevsw prototypes */
cdev_decl(tcx);
struct cfattach tcx_ca = {
sizeof(struct tcx_softc), tcxmatch, tcxattach
};
extern struct cfdriver tcx_cd;
/* frame buffer generic driver */
static struct fbdriver tcx_fbdriver = {
tcx_unblank, tcxopen, tcxclose, tcxioctl, tcxpoll, tcxmmap
};
static void tcx_reset __P((struct tcx_softc *));
static void tcx_loadcmap __P((struct tcx_softc *, int, int));
#define OBPNAME "SUNW,tcx"
/*
* Match a tcx.
*/
int
tcxmatch(parent, cf, aux)
struct device *parent;
struct cfdata *cf;
void *aux;
{
struct sbus_attach_args *sa = aux;
return (strcmp(sa->sa_name, OBPNAME) == 0);
}
/*
* Attach a display.
*/
void
tcxattach(parent, self, args)
struct device *parent, *self;
void *args;
{
struct tcx_softc *sc = (struct tcx_softc *)self;
struct sbus_attach_args *sa = args;
int node, ramsize;
volatile struct bt_regs *bt;
struct fbdevice *fb = &sc->sc_fb;
bus_space_handle_t bh;
int isconsole;
sc->sc_bustag = sa->sa_bustag;
node = sa->sa_node;
fb->fb_driver = &tcx_fbdriver;
fb->fb_device = &sc->sc_dev;
/* Mask out invalid flags from the user. */
fb->fb_flags = sc->sc_dev.dv_cfdata->cf_flags & FB_USERMASK;
fb->fb_type.fb_depth = node_has_property(node, "tcx-24-bit")
? 24
: (node_has_property(node, "tcx-8-bit")
? 8
: 8);
fb_setsize_obp(fb, fb->fb_type.fb_depth, 1152, 900, node);
ramsize = fb->fb_type.fb_height * fb->fb_linebytes;
fb->fb_type.fb_cmsize = 256;
fb->fb_type.fb_size = ramsize;
printf(": %s, %d x %d", OBPNAME,
fb->fb_type.fb_width,
fb->fb_type.fb_height);
/*
* XXX - should be set to FBTYPE_TCX.
* XXX For CG3 emulation to work in current (96/6) X11 servers,
* XXX `fbtype' must point to an "unregocnised" entry.
*/
fb->fb_type.fb_type = FBTYPE_RESERVED3;
if (sa->sa_nreg != TCX_NREG) {
printf("%s: only %d register sets\n",
self->dv_xname, sa->sa_nreg);
return;
}
bcopy(sa->sa_reg, sc->sc_physadr,
sa->sa_nreg * sizeof(struct sbus_reg));
/* XXX - fix THC and TEC offsets */
sc->sc_physadr[TCX_REG_TEC].sbr_offset += 0x1000;
sc->sc_physadr[TCX_REG_THC].sbr_offset += 0x1000;
/* Map the register banks we care about */
if (sbus_bus_map(sa->sa_bustag,
(bus_type_t)sc->sc_physadr[TCX_REG_THC].sbr_slot,
(bus_addr_t)sc->sc_physadr[TCX_REG_THC].sbr_offset,
sizeof (struct tcx_thc),
BUS_SPACE_MAP_LINEAR,
0, &bh) != 0) {
printf("tcxattach: cannot map thc registers\n");
return;
}
sc->sc_thc = (volatile struct tcx_thc *)bh;
if (sbus_bus_map(sa->sa_bustag,
(bus_type_t)sc->sc_physadr[TCX_REG_CMAP].sbr_slot,
(bus_addr_t)sc->sc_physadr[TCX_REG_CMAP].sbr_offset,
sizeof (struct bt_regs),
BUS_SPACE_MAP_LINEAR,
0, &bh) != 0) {
printf("tcxattach: cannot map bt registers\n");
return;
}
sc->sc_bt = bt = (volatile struct bt_regs *)bh;
isconsole = fb_is_console(node);
printf(", id %d, rev %d, sense %d",
(sc->sc_thc->thc_config & THC_CFG_FBID) >> THC_CFG_FBID_SHIFT,
(sc->sc_thc->thc_config & THC_CFG_REV) >> THC_CFG_REV_SHIFT,
(sc->sc_thc->thc_config & THC_CFG_SENSE) >> THC_CFG_SENSE_SHIFT
);
/* reset cursor & frame buffer controls */
tcx_reset(sc);
/* Initialize the default color map. */
bt_initcmap(&sc->sc_cmap, 256);
tcx_loadcmap(sc, 0, 256);
/* enable video */
sc->sc_thc->thc_hcmisc |= THC_MISC_VIDEN;
if (isconsole) {
printf(" (console)\n");
} else
printf("\n");
sbus_establish(&sc->sc_sd, &sc->sc_dev);
fb_attach(&sc->sc_fb, isconsole);
}
int
tcxopen(dev, flags, mode, p)
dev_t dev;
int flags, mode;
struct proc *p;
{
int unit = minor(dev);
if (unit >= tcx_cd.cd_ndevs || tcx_cd.cd_devs[unit] == NULL)
return (ENXIO);
return (0);
}
int
tcxclose(dev, flags, mode, p)
dev_t dev;
int flags, mode;
struct proc *p;
{
struct tcx_softc *sc = tcx_cd.cd_devs[minor(dev)];
tcx_reset(sc);
return (0);
}
int
tcxioctl(dev, cmd, data, flags, p)
dev_t dev;
u_long cmd;
caddr_t data;
int flags;
struct proc *p;
{
struct tcx_softc *sc = tcx_cd.cd_devs[minor(dev)];
int error;
switch (cmd) {
case FBIOGTYPE:
*(struct fbtype *)data = sc->sc_fb.fb_type;
break;
case FBIOGATTR:
#define fba ((struct fbgattr *)data)
fba->real_type = sc->sc_fb.fb_type.fb_type;
fba->owner = 0; /* XXX ??? */
fba->fbtype = sc->sc_fb.fb_type;
fba->sattr.flags = 0;
fba->sattr.emu_type = sc->sc_fb.fb_type.fb_type;
fba->sattr.dev_specific[0] = -1;
fba->emu_types[0] = sc->sc_fb.fb_type.fb_type;
fba->emu_types[1] = FBTYPE_SUN3COLOR;
fba->emu_types[2] = -1;
#undef fba
break;
case FBIOGETCMAP:
#define p ((struct fbcmap *)data)
return (bt_getcmap(p, &sc->sc_cmap, 256, 1));
case FBIOPUTCMAP:
/* copy to software map */
error = bt_putcmap(p, &sc->sc_cmap, 256, 1);
if (error)
return (error);
/* now blast them into the chip */
/* XXX should use retrace interrupt */
tcx_loadcmap(sc, p->index, p->count);
#undef p
break;
case FBIOGVIDEO:
*(int *)data = sc->sc_blanked;
break;
case FBIOSVIDEO:
if (*(int *)data)
tcx_unblank(&sc->sc_dev);
else if (!sc->sc_blanked) {
sc->sc_blanked = 1;
sc->sc_thc->thc_hcmisc &= ~THC_MISC_VIDEN;
/* Put monitor in `power-saving mode' */
sc->sc_thc->thc_hcmisc |= THC_MISC_VSYNC_DISABLE;
sc->sc_thc->thc_hcmisc |= THC_MISC_HSYNC_DISABLE;
}
break;
default:
#ifdef DEBUG
log(LOG_NOTICE, "tcxioctl(0x%lx) (%s[%d])\n", cmd,
p->p_comm, p->p_pid);
#endif
return (ENOTTY);
}
return (0);
}
int
tcxpoll(dev, events, p)
dev_t dev;
int events;
struct proc *p;
{
return (seltrue(dev, events, p));
}
/*
* Clean up hardware state (e.g., after bootup or after X crashes).
*/
static void
tcx_reset(sc)
struct tcx_softc *sc;
{
volatile struct bt_regs *bt;
/* Enable cursor in Brooktree DAC. */
bt = sc->sc_bt;
bt->bt_addr = 0x06 << 24;
bt->bt_ctrl |= 0x03 << 24;
}
/*
* Load a subset of the current (new) colormap into the color DAC.
*/
static void
tcx_loadcmap(sc, start, ncolors)
struct tcx_softc *sc;
int start, ncolors;
{
volatile struct bt_regs *bt;
u_int *ip, i;
int count;
ip = &sc->sc_cmap.cm_chip[BT_D4M3(start)]; /* start/4 * 3 */
count = BT_D4M3(start + ncolors - 1) - BT_D4M3(start) + 3;
bt = sc->sc_bt;
bt->bt_addr = BT_D4M4(start) << 24;
while (--count >= 0) {
i = *ip++;
/* hardware that makes one want to pound boards with hammers */
bt->bt_cmap = i;
bt->bt_cmap = i << 8;
bt->bt_cmap = i << 16;
bt->bt_cmap = i << 24;
}
}
static void
tcx_unblank(dev)
struct device *dev;
{
struct tcx_softc *sc = (struct tcx_softc *)dev;
if (sc->sc_blanked) {
sc->sc_blanked = 0;
sc->sc_thc->thc_hcmisc &= ~THC_MISC_VSYNC_DISABLE;
sc->sc_thc->thc_hcmisc &= ~THC_MISC_HSYNC_DISABLE;
sc->sc_thc->thc_hcmisc |= THC_MISC_VIDEN;
}
}
/*
* Base addresses at which users can mmap() the various pieces of a tcx.
*/
#define TCX_USER_RAM 0x00000000
#define TCX_USER_RAM24 0x01000000
#define TCX_USER_RAM_COMPAT 0x04000000 /* cg3 emulation */
#define TCX_USER_STIP 0x10000000
#define TCX_USER_BLIT 0x20000000
#define TCX_USER_RDFB32 0x28000000
#define TCX_USER_RSTIP 0x30000000
#define TCX_USER_RBLIT 0x38000000
#define TCX_USER_TEC 0x70001000
#define TCX_USER_BTREGS 0x70002000
#define TCX_USER_THC 0x70004000
#define TCX_USER_DHC 0x70008000
#define TCX_USER_ALT 0x7000a000
#define TCX_USER_UART 0x7000c000
#define TCX_USER_VRT 0x7000e000
#define TCX_USER_ROM 0x70010000
struct mmo {
u_int mo_uaddr; /* user (virtual) address */
u_int mo_size; /* size, or 0 for video ram size */
u_int mo_bank; /* register bank number */
};
/*
* Return the address that would map the given device at the given
* offset, allowing for the given protection, or return -1 for error.
*
* XXX needs testing against `demanding' applications (e.g., aviator)
*/
paddr_t
tcxmmap(dev, off, prot)
dev_t dev;
off_t off;
int prot;
{
struct tcx_softc *sc = tcx_cd.cd_devs[minor(dev)];
bus_space_handle_t bh;
struct sbus_reg *rr = sc->sc_physadr;
struct mmo *mo;
u_int u, sz;
static struct mmo mmo[] = {
{ TCX_USER_RAM, 0, TCX_REG_DFB8 },
{ TCX_USER_RAM24, 0, TCX_REG_DFB24 },
{ TCX_USER_RAM_COMPAT, 0, TCX_REG_DFB8 },
{ TCX_USER_STIP, 1, TCX_REG_STIP },
{ TCX_USER_BLIT, 1, TCX_REG_BLIT },
{ TCX_USER_RDFB32, 1, TCX_REG_RDFB32 },
{ TCX_USER_RSTIP, 1, TCX_REG_RSTIP },
{ TCX_USER_RBLIT, 1, TCX_REG_RBLIT },
{ TCX_USER_TEC, 1, TCX_REG_TEC },
{ TCX_USER_BTREGS, 8192 /* XXX */, TCX_REG_CMAP },
{ TCX_USER_THC, sizeof(struct tcx_thc), TCX_REG_THC },
{ TCX_USER_DHC, 1, TCX_REG_DHC },
{ TCX_USER_ALT, 1, TCX_REG_ALT },
{ TCX_USER_ROM, 65536, TCX_REG_ROM },
};
#define NMMO (sizeof mmo / sizeof *mmo)
if (off & PGOFSET)
panic("tcxmmap");
/*
* Entries with size 0 map video RAM (i.e., the size in fb data).
*
* Since we work in pages, the fact that the map offset table's
* sizes are sometimes bizarre (e.g., 1) is effectively ignored:
* one byte is as good as one page.
*/
for (mo = mmo; mo < &mmo[NMMO]; mo++) {
if ((u_int)off < mo->mo_uaddr)
continue;
u = off - mo->mo_uaddr;
sz = mo->mo_size ? mo->mo_size : sc->sc_fb.fb_type.fb_size;
if (u < sz) {
bus_type_t t = (bus_type_t)rr[mo->mo_bank].sbr_slot;
bus_addr_t a = (bus_addr_t)rr[mo->mo_bank].sbr_offset;
if (bus_space_mmap(sc->sc_bustag,
t,
a + u,
BUS_SPACE_MAP_LINEAR, &bh))
return (-1);
return ((paddr_t)bh);
}
}
return (-1); /* not a user-map offset */
}

150
sys/dev/sbus/tcxreg.h Normal file
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@ -0,0 +1,150 @@
/* $NetBSD: tcxreg.h,v 1.1 2000/08/20 22:27:07 pk Exp $ */
/*
* Copyright (c) 1996 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Paul Kranenburg.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the NetBSD
* Foundation, Inc. and its contributors.
* 4. Neither the name of The NetBSD Foundation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/*
* A TCX is composed of numerous groups of control registers, all with TLAs:
* DHC - ???
* TEC - transform engine control?
* THC - TEC Hardware Configuration
* ROM - a 128Kbyte ROM with who knows what in it.
* STIP - ???
* RSTIP - Raw ???
* BLIT - ???
* RBLIT - Raw ???
* ALT - ???
* colormap - see below
* frame buffer memory (video RAM)
* possible other stuff
*
*/
#define TCX_REG_DFB8 0
#define TCX_REG_DFB24 1
#define TCX_REG_STIP 2
#define TCX_REG_BLIT 3
#define TCX_REG_RDFB32 4
#define TCX_REG_RSTIP 5
#define TCX_REG_RBLIT 6
#define TCX_REG_TEC 7
#define TCX_REG_CMAP 8
#define TCX_REG_THC 9
#define TCX_REG_ROM 10
#define TCX_REG_DHC 11
#define TCX_REG_ALT 12
#define TCX_NREG 13
/*
* The layout of the THC.
*/
struct tcx_thc {
u_int thc_config;
u_int thc_xxx1[31];
u_int thc_sensebus;
u_int thc_xxx2[3];
u_int thc_delay;
u_int thc_strapping;
u_int thc_xxx3[1];
u_int thc_linecount;
u_int thc_xxx4[478];
u_int thc_hcmisc;
u_int thc_xxx5[56];
u_int thc_cursoraddr;
u_int thc_cursorAdata[32];
u_int thc_cursorBdata[32];
};
/* bits in thc_config ??? */
#define THC_CFG_FBID 0xf0000000 /* id mask */
#define THC_CFG_FBID_SHIFT 28
#define THC_CFG_SENSE 0x07000000 /* sense mask */
#define THC_CFG_SENSE_SHIFT 24
#define THC_CFG_REV 0x00f00000 /* revision mask */
#define THC_CFG_REV_SHIFT 20
#define THC_CFG_RST 0x00008000 /* reset */
/* bits in thc_hcmisc */
#define THC_MISC_OPENFLG 0x80000000 /* open flag (what's that?) */
#define THC_MISC_SWERR_EN 0x20000000 /* enable SW error interrupt */
#define THC_MISC_VSYNC_LEVEL 0x08000000 /* vsync level when disabled */
#define THC_MISC_HSYNC_LEVEL 0x04000000 /* hsync level when disabled */
#define THC_MISC_VSYNC_DISABLE 0x02000000 /* vsync disable */
#define THC_MISC_HSYNC_DISABLE 0x01000000 /* hsync disable */
#define THC_MISC_XXX1 0x00ffe000 /* unused */
#define THC_MISC_RESET 0x00001000 /* ??? */
#define THC_MISC_XXX2 0x00000800 /* unused */
#define THC_MISC_VIDEN 0x00000400 /* video enable */
#define THC_MISC_SYNC 0x00000200 /* not sure what ... */
#define THC_MISC_VSYNC 0x00000100 /* ... these really are */
#define THC_MISC_SYNCEN 0x00000080 /* sync enable */
#define THC_MISC_CURSRES 0x00000040 /* cursor resolution */
#define THC_MISC_INTEN 0x00000020 /* v.retrace intr enable */
#define THC_MISC_INTR 0x00000010 /* intr pending / ack bit */
#define THC_MISC_DACWAIT 0x0000000f /* ??? */
/*
* Partial description of TEC.
*/
struct tcx_tec {
u_int tec_config; /* what's in it? */
u_int tec_xxx0[35];
u_int tec_delay; /* */
#define TEC_DELAY_SYNC 0x00000f00
#define TEC_DELAY_WR_F 0x000000c0
#define TEC_DELAY_WR_R 0x00000030
#define TEC_DELAY_SOE_F 0x0000000c
#define TEC_DELAY_SOE_S 0x00000003
u_int tec_strapping; /* */
#define TEC_STRAP_FIFO_LIMIT 0x00f00000
#define TEC_STRAP_CACHE_EN 0x00010000
#define TEC_STRAP_ZERO_OFFSET 0x00008000
#define TEC_STRAP_REFRSH_DIS 0x00004000
#define TEC_STRAP_REF_LOAD 0x00001000
#define TEC_STRAP_REFRSH_PERIOD 0x000003ff
u_int tec_hcmisc; /* */
u_int tec_linecount; /* */
u_int tec_hss; /* */
u_int tec_hse; /* */
u_int tec_hds; /* */
u_int tec_hsedvs; /* */
u_int tec_hde; /* */
u_int tec_vss; /* */
u_int tec_vse; /* */
u_int tec_vds; /* */
u_int tec_vde; /* */
};