Provide a common implementation for ports that use the MIPS CP0 counter
based clock interrupt. This provides common implementations of: delay(), cpu_initclocks(), and a timecounter based on the MIPS3 CP0. It also provides a new function, mips3_clockintr(), that is intended to be called from a port's cpu_intr() routine when INT5 is raised. Hopefully many MIPS3 based machines can adopt this common interrupt framework. The evbmips conversion will be committed separately, shortly.
This commit is contained in:
gdamore
parent
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39
sys/arch/mips/include/mips3_clock.h
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39
sys/arch/mips/include/mips3_clock.h
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/* $NetBSD: mips3_clock.h,v 1.1 2006/09/02 22:20:57 gdamore Exp $ */
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/*
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* Copyright (c) 2006 Garrett D'Amore.
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* All rights reserved.
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*
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* Written by Garrett D'Amore for the NetBSD Project.
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*
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* Redistribution and use in source and binary forms, with or
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* without modification, are permitted provided that the following
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* conditions are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials provided
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* with the distribution.
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* 3. Garrett D'Amore's name may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY GARRETT D'AMORE ``AS IS'' AND ANY EXPRESS
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* OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL GARRETT D'AMORE BE LIABLE FOR ANY
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* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
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* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _MIPS3_CLOCK_H
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#define _MIPS3_CLOCK_H
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extern void mips3_clockintr(uint32_t, uint32_t);
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#endif /* _MIPS3_CLOCK_H */
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225
sys/arch/mips/mips/mips3_clock.c
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225
sys/arch/mips/mips/mips3_clock.c
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/* $NetBSD: mips3_clock.c,v 1.1 2006/09/02 22:20:57 gdamore Exp $ */
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/*
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* Copyright (c) 1992, 1993
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* The Regents of the University of California. All rights reserved.
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*
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* This code is derived from software contributed to Berkeley by
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* the Systems Programming Group of the University of Utah Computer
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* Science Department and Ralph Campbell.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* from: Utah Hdr: clock.c 1.18 91/01/21
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*
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* @(#)clock.c 8.1 (Berkeley) 6/10/93
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*/
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/*
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* Copyright (c) 1988 University of Utah.
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*
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* This code is derived from software contributed to Berkeley by
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* the Systems Programming Group of the University of Utah Computer
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* Science Department and Ralph Campbell.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* from: Utah Hdr: clock.c 1.18 91/01/21
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*
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* @(#)clock.c 8.1 (Berkeley) 6/10/93
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*/
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#include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
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__KERNEL_RCSID(0, "$NetBSD: mips3_clock.c,v 1.1 2006/09/02 22:20:57 gdamore Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/timetc.h>
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#include <mips/mips3_clock.h>
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#include <machine/intr.h>
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#include <machine/locore.h>
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#ifdef __HAVE_TIMECOUNTER
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static void init_mips3_tc(void);
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#endif
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struct evcnt mips_int5_evcnt =
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EVCNT_INITIALIZER(EVCNT_TYPE_INTR, NULL, "mips", "int 5 (clock)");
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uint32_t next_cp0_clk_intr; /* used to schedule hard clock interrupts */
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/*
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* Handling to be done upon receipt of a MIPS 3 clock interrupt. This
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* routine is to be called from the master interrupt routine
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* (e.g. cpu_intr), if MIPS INT5 is pending. The caller is
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* responsible for blocking and renabling the interrupt in the
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* cpu_intr() routine.
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*/
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void
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mips3_clockintr(uint32_t status, uint32_t pc)
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{
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uint32_t new_cnt;
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struct clockframe cf;
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next_cp0_clk_intr += curcpu()->ci_cycles_per_hz;
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mips3_cp0_compare_write(next_cp0_clk_intr);
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/* Check for lost clock interrupts */
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new_cnt = mips3_cp0_count_read();
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/*
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* Missed one or more clock interrupts, so let's start
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* counting again from the current value.
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*/
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if ((next_cp0_clk_intr - new_cnt) & 0x80000000) {
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#if 0 /* XXX - should add an event counter for this */
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missed_clk_intrs++;
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#endif
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next_cp0_clk_intr = new_cnt + curcpu()->ci_cycles_per_hz;
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mips3_cp0_compare_write(next_cp0_clk_intr);
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}
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cf.pc = pc;
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cf.sr = status;
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hardclock(&cf);
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mips_int5_evcnt.ev_count++;
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/* caller should renable clock interrupts */
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}
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/*
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* Start the real-time and statistics clocks. Leave stathz 0 since there
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* are no other timers available.
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*/
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void
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cpu_initclocks(void)
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{
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evcnt_attach_static(&mips_int5_evcnt);
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next_cp0_clk_intr = mips3_cp0_count_read() + curcpu()->ci_cycles_per_hz;
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mips3_cp0_compare_write(next_cp0_clk_intr);
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#ifdef __HAVE_TIMECOUNTER
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init_mips3_tc();
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#endif
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}
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/*
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* We assume newhz is either stathz or profhz, and that neither will
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* change after being set up above. Could recalculate intervals here
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* but that would be a drag.
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*/
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void
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setstatclockrate(int newhz)
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{
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/* nothing we can do */
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}
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/*
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* Wait for at least "n" microseconds.
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*/
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void
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delay(int n)
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{
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uint32_t cur, last, delta, usecs;
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last = mips3_cp0_count_read();
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delta = usecs = 0;
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while (n > usecs) {
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cur = mips3_cp0_count_read();
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/* Check to see if the timer has wrapped around. */
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if (cur < last)
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delta += ((curcpu()->ci_cycles_per_hz - last) + cur);
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else
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delta += (cur - last);
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last = cur;
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if (delta >= curcpu()->ci_divisor_delay) {
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usecs += delta / curcpu()->ci_divisor_delay;
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delta %= curcpu()->ci_divisor_delay;
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}
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}
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}
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/*
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* Support for using the MIPS 3 clock as a timecounter.
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*/
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#ifdef __HAVE_TIMECOUNTER
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void
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init_mips3_tc(void)
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{
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#if !defined(MULTIPROCESSOR)
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static struct timecounter tc = {
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(timecounter_get_t *)mips3_cp0_count_read, /* get_timecount */
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0, /* no poll_pps */
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~0u, /* counter_mask */
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0, /* frequency */
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"mips3_cp0_counter", /* name */
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0, /* quality */
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};
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tc.tc_frequency = curcpu()->ci_cpu_freq;
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if (mips_cpu_flags & CPU_MIPS_DOUBLE_COUNT) {
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tc.tc_frequency /= 2;
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}
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tc_init(&tc);
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#endif
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}
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#endif /* __HAVE_TIMECOUNTER */
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