Separate DesignWare watchdog driver and FDT glue.
This commit is contained in:
jmcneill
parent
4def9d8bab
commit
10f5d8578a
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@ -1,4 +1,4 @@
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# $NetBSD: files,v 1.1306 2022/12/28 18:19:44 jakllsch Exp $
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# $NetBSD: files,v 1.1307 2023/04/16 16:51:38 jmcneill Exp $
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# @(#)files.newconf 7.5 (Berkeley) 5/10/93
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version 20171118
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@ -799,6 +799,10 @@ file dev/ic/dwc_gmac.c awge
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device eqos: arp, ether, ifnet, mii
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file dev/ic/dwc_eqos.c eqos
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# Synopsys DesignWare Watchdog
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device dwcwdt: sysmon_wdog
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file dev/ic/dwc_wdt.c dwcwdt
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# 8390-family Ethernet controllers
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#
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define dp8390nic
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@ -1,7 +1,7 @@
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/* $NetBSD: dwcwdt_fdt.c,v 1.5 2021/01/27 03:10:21 thorpej Exp $ */
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/* $NetBSD: dwcwdt_fdt.c,v 1.6 2023/04/16 16:51:38 jmcneill Exp $ */
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/*-
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* Copyright (c) 2018 Jared McNeill <jmcneill@invisible.ca>
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* Copyright (c) 2018, 2023 Jared McNeill <jmcneill@invisible.ca>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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@ -27,7 +27,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: dwcwdt_fdt.c,v 1.5 2021/01/27 03:10:21 thorpej Exp $");
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__KERNEL_RCSID(0, "$NetBSD: dwcwdt_fdt.c,v 1.6 2023/04/16 16:51:38 jmcneill Exp $");
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#include <sys/param.h>
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#include <sys/bus.h>
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@ -38,133 +38,17 @@ __KERNEL_RCSID(0, "$NetBSD: dwcwdt_fdt.c,v 1.5 2021/01/27 03:10:21 thorpej Exp $
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#include <sys/wdog.h>
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#include <dev/sysmon/sysmonvar.h>
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#include <dev/ic/dwc_wdt_var.h>
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#include <dev/fdt/fdtvar.h>
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#define WDT_CR 0x00
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#define WDT_CR_RST_PULSE_LENGTH __BITS(4,2)
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#define WDT_CR_RESP_MODE __BIT(1)
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#define WDT_CR_WDT_EN __BIT(0)
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#define WDT_TORR 0x04
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#define WDT_TORR_TIMEOUT_PERIOD __BITS(3,0)
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#define WDT_CCVR 0x08
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#define WDT_CRR 0x0c
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#define WDT_CRR_CNT_RESTART __BITS(7,0)
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#define WDT_CRR_CNT_RESTART_MAGIC 0x76
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#define WDT_STAT 0x10
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#define WDT_STAT_WDT_STATUS __BIT(0)
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#define WDT_EOI 0x14
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#define WDT_EOI_WDT_INT_CLR __BIT(0)
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static const uint32_t wdt_torr[] = {
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0x0000ffff,
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0x0001ffff,
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0x0003ffff,
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0x0007ffff,
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0x000fffff,
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0x001fffff,
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0x003fffff,
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0x007fffff,
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0x00ffffff,
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0x01ffffff,
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0x03ffffff,
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0x07ffffff,
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0x0fffffff,
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0x1fffffff,
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0x3fffffff,
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0x7fffffff,
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};
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#define DWCWDT_PERIOD_DEFAULT 15
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static const struct device_compatible_entry compat_data[] = {
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{ .compat = "snps,dw-wdt" },
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DEVICE_COMPAT_EOL
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};
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struct dwcwdt_softc {
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device_t sc_dev;
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bus_space_tag_t sc_bst;
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bus_space_handle_t sc_bsh;
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struct sysmon_wdog sc_smw;
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u_int sc_clkrate;
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};
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#define RD4(sc, reg) \
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bus_space_read_4((sc)->sc_bst, (sc)->sc_bsh, (reg))
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#define WR4(sc, reg, val) \
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bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))
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static int
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dwcwdt_map_period(struct dwcwdt_softc *sc, u_int period,
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u_int *aperiod)
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{
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int i;
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if (period == 0)
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return -1;
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for (i = 0; i < __arraycount(wdt_torr); i++) {
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const u_int ms = (u_int)((((uint64_t)wdt_torr[i] + 1) * 1000) / sc->sc_clkrate);
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if (ms >= period * 1000) {
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*aperiod = ms / 1000;
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return i;
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}
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}
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return -1;
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}
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static int
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dwcwdt_tickle(struct sysmon_wdog *smw)
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{
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struct dwcwdt_softc * const sc = smw->smw_cookie;
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const uint32_t crr =
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__SHIFTIN(WDT_CRR_CNT_RESTART_MAGIC, WDT_CRR_CNT_RESTART);
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WR4(sc, WDT_CRR, crr);
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return 0;
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}
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static int
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dwcwdt_setmode(struct sysmon_wdog *smw)
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{
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struct dwcwdt_softc * const sc = smw->smw_cookie;
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uint32_t cr, torr;
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int intv;
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if ((smw->smw_mode & WDOG_MODE_MASK) == WDOG_MODE_DISARMED) {
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/* Watchdog can only be disarmed by a reset */
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return EIO;
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}
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if (smw->smw_period == WDOG_PERIOD_DEFAULT)
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smw->smw_period = DWCWDT_PERIOD_DEFAULT;
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intv = dwcwdt_map_period(sc, smw->smw_period,
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&sc->sc_smw.smw_period);
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if (intv == -1)
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return EINVAL;
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torr = __SHIFTIN(intv, WDT_TORR_TIMEOUT_PERIOD);
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WR4(sc, WDT_TORR, torr);
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dwcwdt_tickle(smw);
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cr = RD4(sc, WDT_CR);
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cr &= ~WDT_CR_RESP_MODE;
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cr |= WDT_CR_WDT_EN;
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WR4(sc, WDT_CR, cr);
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return 0;
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}
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static int
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dwcwdt_match(device_t parent, cfdata_t cf, void *aux)
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dwcwdt_fdt_match(device_t parent, cfdata_t cf, void *aux)
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{
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struct fdt_attach_args * const faa = aux;
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@ -172,7 +56,7 @@ dwcwdt_match(device_t parent, cfdata_t cf, void *aux)
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}
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static void
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dwcwdt_attach(device_t parent, device_t self, void *aux)
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dwcwdt_fdt_attach(device_t parent, device_t self, void *aux)
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{
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struct dwcwdt_softc * const sc = device_private(self);
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struct fdt_attach_args * const faa = aux;
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@ -213,19 +97,8 @@ dwcwdt_attach(device_t parent, device_t self, void *aux)
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aprint_naive("\n");
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aprint_normal(": DesignWare Watchdog Timer\n");
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sc->sc_smw.smw_name = device_xname(self);
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sc->sc_smw.smw_cookie = sc;
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sc->sc_smw.smw_period = DWCWDT_PERIOD_DEFAULT;
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sc->sc_smw.smw_setmode = dwcwdt_setmode;
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sc->sc_smw.smw_tickle = dwcwdt_tickle;
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aprint_normal_dev(self,
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"default watchdog period is %u seconds\n",
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sc->sc_smw.smw_period);
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if (sysmon_wdog_register(&sc->sc_smw) != 0)
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aprint_error_dev(self, "couldn't register with sysmon\n");
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dwcwdt_init(sc);
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}
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CFATTACH_DECL_NEW(dwcwdt_fdt, sizeof(struct dwcwdt_softc),
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dwcwdt_match, dwcwdt_attach, NULL, NULL);
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dwcwdt_fdt_match, dwcwdt_fdt_attach, NULL, NULL);
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@ -1,4 +1,4 @@
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# $NetBSD: files.fdt,v 1.67 2023/04/07 08:55:31 skrll Exp $
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# $NetBSD: files.fdt,v 1.68 2023/04/16 16:51:38 jmcneill Exp $
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include "external/bsd/libfdt/conf/files.libfdt"
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@ -162,7 +162,6 @@ attach dwcmmc at fdt with dwcmmc_fdt
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file dev/fdt/dwcmmc_fdt.c dwcmmc_fdt
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# Designware Watchdog Timer
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device dwcwdt: sysmon_wdog
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attach dwcwdt at fdt with dwcwdt_fdt
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file dev/fdt/dwcwdt_fdt.c dwcwdt_fdt
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@ -0,0 +1,173 @@
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/* $NetBSD: dwc_wdt.c,v 1.1 2023/04/16 16:51:38 jmcneill Exp $ */
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/*-
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* Copyright (c) 2018, 2023 Jared McNeill <jmcneill@invisible.ca>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: dwc_wdt.c,v 1.1 2023/04/16 16:51:38 jmcneill Exp $");
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#include <sys/param.h>
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#include <sys/bus.h>
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#include <sys/device.h>
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#include <sys/intr.h>
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#include <sys/systm.h>
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#include <sys/mutex.h>
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#include <sys/wdog.h>
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#include <dev/sysmon/sysmonvar.h>
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#include <dev/ic/dwc_wdt_var.h>
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#define WDT_CR 0x00
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#define WDT_CR_RST_PULSE_LENGTH __BITS(4,2)
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#define WDT_CR_RESP_MODE __BIT(1)
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#define WDT_CR_WDT_EN __BIT(0)
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#define WDT_TORR 0x04
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#define WDT_TORR_TIMEOUT_PERIOD __BITS(3,0)
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#define WDT_CCVR 0x08
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#define WDT_CRR 0x0c
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#define WDT_CRR_CNT_RESTART __BITS(7,0)
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#define WDT_CRR_CNT_RESTART_MAGIC 0x76
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#define WDT_STAT 0x10
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#define WDT_STAT_WDT_STATUS __BIT(0)
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#define WDT_EOI 0x14
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#define WDT_EOI_WDT_INT_CLR __BIT(0)
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static const uint32_t wdt_torr[] = {
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0x0000ffff,
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0x0001ffff,
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0x0003ffff,
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0x0007ffff,
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0x000fffff,
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0x001fffff,
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0x003fffff,
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0x007fffff,
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0x00ffffff,
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0x01ffffff,
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0x03ffffff,
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0x07ffffff,
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0x0fffffff,
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0x1fffffff,
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0x3fffffff,
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0x7fffffff,
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};
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#define DWCWDT_PERIOD_DEFAULT 15
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#define RD4(sc, reg) \
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bus_space_read_4((sc)->sc_bst, (sc)->sc_bsh, (reg))
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#define WR4(sc, reg, val) \
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bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))
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static int
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dwcwdt_map_period(struct dwcwdt_softc *sc, u_int period,
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u_int *aperiod)
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{
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int i;
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if (period == 0)
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return -1;
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for (i = 0; i < __arraycount(wdt_torr); i++) {
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const u_int ms = (u_int)((((uint64_t)wdt_torr[i] + 1) * 1000) / sc->sc_clkrate);
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if (ms >= period * 1000) {
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*aperiod = ms / 1000;
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return i;
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}
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}
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return -1;
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}
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static int
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dwcwdt_tickle(struct sysmon_wdog *smw)
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{
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struct dwcwdt_softc * const sc = smw->smw_cookie;
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const uint32_t crr =
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__SHIFTIN(WDT_CRR_CNT_RESTART_MAGIC, WDT_CRR_CNT_RESTART);
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WR4(sc, WDT_CRR, crr);
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return 0;
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}
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static int
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dwcwdt_setmode(struct sysmon_wdog *smw)
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{
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struct dwcwdt_softc * const sc = smw->smw_cookie;
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uint32_t cr, torr;
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int intv;
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if ((smw->smw_mode & WDOG_MODE_MASK) == WDOG_MODE_DISARMED) {
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/* Watchdog can only be disarmed by a reset */
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return EIO;
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}
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if (smw->smw_period == WDOG_PERIOD_DEFAULT)
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smw->smw_period = DWCWDT_PERIOD_DEFAULT;
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intv = dwcwdt_map_period(sc, smw->smw_period,
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&sc->sc_smw.smw_period);
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if (intv == -1)
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return EINVAL;
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torr = __SHIFTIN(intv, WDT_TORR_TIMEOUT_PERIOD);
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WR4(sc, WDT_TORR, torr);
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dwcwdt_tickle(smw);
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cr = RD4(sc, WDT_CR);
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cr &= ~WDT_CR_RESP_MODE;
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cr |= WDT_CR_WDT_EN;
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WR4(sc, WDT_CR, cr);
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return 0;
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}
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void
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dwcwdt_init(struct dwcwdt_softc *sc)
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{
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if (sc->sc_clkrate == 0) {
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aprint_error_dev(sc->sc_dev, "clock rate not specified\n");
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return;
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}
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sc->sc_smw.smw_name = device_xname(sc->sc_dev);
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sc->sc_smw.smw_cookie = sc;
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sc->sc_smw.smw_period = DWCWDT_PERIOD_DEFAULT;
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sc->sc_smw.smw_setmode = dwcwdt_setmode;
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sc->sc_smw.smw_tickle = dwcwdt_tickle;
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aprint_normal_dev(sc->sc_dev,
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"default watchdog period is %u seconds\n",
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sc->sc_smw.smw_period);
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if (sysmon_wdog_register(&sc->sc_smw) != 0) {
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aprint_error_dev(sc->sc_dev, "couldn't register with sysmon\n");
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}
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}
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@ -0,0 +1,42 @@
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/* $NetBSD: dwc_wdt_var.h,v 1.1 2023/04/16 16:51:38 jmcneill Exp $ */
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/*-
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* Copyright (c) 2018, 2023 Jared McNeill <jmcneill@invisible.ca>
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* All rights reserved.
|
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*
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* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
|
||||
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
|
||||
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
|
||||
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
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* SUCH DAMAGE.
|
||||
*/
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#ifndef _DWC_WDT_VAR_H
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#define _DWC_WDT_VAR_H
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struct dwcwdt_softc {
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device_t sc_dev;
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bus_space_tag_t sc_bst;
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bus_space_handle_t sc_bsh;
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struct sysmon_wdog sc_smw;
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u_int sc_clkrate;
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};
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void dwcwdt_init(struct dwcwdt_softc *);
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||||
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#endif /* !_DWC_WDT_VAR_H */
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||||
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Reference in New Issue