BUGFIX: Xhpc dumps core on SigmarionII.
Attached MQ200 video controller at PCI bus.
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b86c56a0b6
commit
108ae8567c
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# $NetBSD: GENERIC,v 1.125 2002/05/11 08:56:39 takemura Exp $
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# $NetBSD: GENERIC,v 1.126 2002/05/11 14:10:04 takemura Exp $
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#
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# GENERIC machine description file
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#
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@ -24,7 +24,7 @@ include "arch/hpcmips/conf/std.hpcmips.tx39"
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options INCLUDE_CONFIG_FILE # embed config file in kernel binary
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#ident "GENERIC-$Revision: 1.125 $"
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#ident "GENERIC-$Revision: 1.126 $"
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maxusers 16
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@ -138,10 +138,10 @@ apmdev0 at hpcapm0 # APM
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options MQ200_DEBUG
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#options MQ200_USECRT
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mqvideo0 at vr4102ip? addr 0x0a000000 size 0x800000 # MQ200 video
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mqvideo* at vr4102ip? addr 0x0a000000 size 0x800000 # MQ200 video
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hpcfb* at mqvideo?
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ite8181video0 at vr4102ip? addr 0x0a000000 size 0x800000 # ITE8181 video
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ite8181video* at vr4102ip? addr 0x0a000000 size 0x800000 # ITE8181 video
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hpcfb* at ite8181video?
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vrc4172pwm* at vr4102ip? addr 0x15003880 size 0x6 platform NEC_MCR_430
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@ -452,6 +452,9 @@ vrpiu* at vrc4173bcu? addr 0x0a0 size 0x20 addr2 0x0c0 size2 0x20 unit VRPIU # V
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ohci* at pci? dev ? function ? # Open Host Controller
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#options OHCI_DEBUG, USB_DEBUG, UHUB_DEBUG
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# miscellaneous PCI devices
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mqvideo* at pci? dev ? function ? # MQ200 video
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# PCMCIA bus support
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pcmcia* at plumpcmcia? controller ? socket ?
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pcmcia* at pcic? controller 0 socket ?
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@ -1,4 +1,4 @@
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# $NetBSD: files.hpcmips,v 1.84 2002/05/03 11:45:04 takemura Exp $
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# $NetBSD: files.hpcmips,v 1.85 2002/05/11 14:10:05 takemura Exp $
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# maxpartitions must be first item in files.${ARCH}.
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maxpartitions 8
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@ -178,7 +178,7 @@ file arch/hpcmips/dev/mq200debug.c mqvideo
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file arch/hpcmips/dev/mq200machdep.c mqvideo
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attach mqvideo at pci with mqvideo_pci
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file arch/hpcmips/pci/mq200_pci.c mqvideo_pci
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file arch/hpcmips/dev/mq200_pci.c mqvideo_pci
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device ite8181video: hpcfbif, hpccmap
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attach ite8181video at vripif with ite8181video_vrip
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@ -0,0 +1,117 @@
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/* $NetBSD: mq200_pci.c,v 1.1 2002/05/11 14:10:06 takemura Exp $ */
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/*-
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* Copyright (c) 2002 TAKEMURA Shin
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: mq200_pci.c,v 1.1 2002/05/11 14:10:06 takemura Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/device.h>
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#include <sys/malloc.h>
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcidevs.h>
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#include <dev/pci/pciio.h>
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#include <hpcmips/dev/mq200var.h>
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struct mq200_pci_softc {
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struct mq200_softc sc_mq200;
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pci_chipset_tag_t sc_pc;
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pcitag_t sc_pcitag;
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};
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int mq200_pci_match(struct device *, struct cfdata *, void *);
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void mq200_pci_attach(struct device *, struct device *, void *);
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struct cfattach mqvideo_pci_ca = {
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sizeof(struct mq200_pci_softc),
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mq200_pci_match,
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mq200_pci_attach,
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};
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int
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mq200_pci_match(struct device *parent, struct cfdata *match, void *aux)
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{
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struct pci_attach_args *pa = aux;
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/* check vendor id and product id */
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if (pa->pa_id !=
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PCI_ID_CODE(PCI_VENDOR_MEDIAQ, PCI_PRODUCT_MEDIAQ_MQ200))
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return (0);
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return (1);
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}
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void
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mq200_pci_attach(struct device *parent, struct device *self, void *aux)
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{
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struct mq200_pci_softc *psc = (void *) self;
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struct mq200_softc *sc = &psc->sc_mq200;
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struct pci_attach_args *pa = aux;
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// char devinfo[256];
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int res;
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psc->sc_pc = pa->pa_pc;
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psc->sc_pcitag = pa->pa_tag;
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#if 0
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pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo);
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printf(": %s (rev. 0x%02x)\n", devinfo,
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PCI_REVISION(pa->pa_class));
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#endif
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/* check whether it is disabled by firmware */
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if (!(pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG) &
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PCI_COMMAND_MEM_ENABLE)) {
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printf("%s: disabled\n", sc->sc_dev.dv_xname);
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return;
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}
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/* Base Address Register 0: base address of control registers */
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res = pci_mapreg_map(pa, PCI_MAPREG_START, PCI_MAPREG_TYPE_MEM,
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0, &sc->sc_iot, &sc->sc_ioh, NULL, NULL);
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if (res != 0) {
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printf("%s: can't map registers\n", sc->sc_dev.dv_xname);
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return;
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}
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/* Base Address Register 1: base address of frame buffer */
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res = pci_mapreg_info(psc->sc_pc, psc->sc_pcitag, PCI_MAPREG_START+4,
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PCI_MAPREG_TYPE_MEM, &sc->sc_baseaddr, NULL, NULL);
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if (res != 0) {
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printf("%s: can't map frame buffer\n", sc->sc_dev.dv_xname);
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return;
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}
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mq200_attach(sc);
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}
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@ -1,4 +1,4 @@
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/* $NetBSD: mq200reg.h,v 1.6 2001/03/25 13:06:53 takemura Exp $ */
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/* $NetBSD: mq200reg.h,v 1.7 2002/05/11 14:10:06 takemura Exp $ */
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/*-
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* Copyright (c) 2000, 2001 TAKEMURA Shin
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#define MQ200_CLOCK_PLL2 2
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#define MQ200_CLOCK_PLL3 3
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#define MQ200_FRAMEBUFFER 0x000000 /* frame buffer base address */
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#define MQ200_PM 0x600000 /* power management */
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#define MQ200_CC 0x602000 /* CPU interface */
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#define MQ200_MM 0x604000 /* memory interface unit */
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#define MQ200_IN 0x608000 /* interrupt controller */
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#define MQ200_GC(n) (0x60a000+0x80*(n))
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#define MQ200_GE 0x60c000 /* graphics engine */
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#define MQ200_FP 0x60e000 /* flat panel controller*/
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#define MQ200_CP1 0x610000 /* color palette 1 */
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#define MQ200_DC 0x614000 /* device configration */
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#define MQ200_PC 0x616000 /* PCI configration */
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#define MQ200_REGADDR 0x600000 /* register base address */
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#define MQ200_PM 0x000000 /* power management */
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#define MQ200_CC 0x002000 /* CPU interface */
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#define MQ200_MM 0x004000 /* memory interface unit */
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#define MQ200_IN 0x008000 /* interrupt controller */
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#define MQ200_GC(n) (0x00a000+0x80*(n))
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#define MQ200_GE 0x00c000 /* graphics engine */
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#define MQ200_FP 0x00e000 /* flat panel controller*/
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#define MQ200_CP1 0x010000 /* color palette 1 */
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#define MQ200_DC 0x014000 /* device configration */
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#define MQ200_PC 0x016000 /* PCI configration */
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/*
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* Power Management
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/* $NetBSD: mq200subr.c,v 1.1 2001/03/25 13:06:53 takemura Exp $ */
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/* $NetBSD: mq200subr.c,v 1.2 2002/05/11 14:10:06 takemura Exp $ */
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/*-
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* Copyright (c) 2001 TAKEMURA Shin
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for (i = 0; i < sizeof(offsets)/sizeof(*offsets); i++) {
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if (offsets[i] == 0)
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#ifdef MQ200_DEBUG
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panic("%s(%d): register context %d is empty\n",
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__FILE__, __LINE__, i);
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if (i != MQ200_I_PMC)
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panic("%s(%d): register context %d is empty\n",
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__FILE__, __LINE__, i);
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#endif
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sc->sc_regctxs[i].offset = offsets[i];
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}
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/* $NetBSD: mq200_vrip.c,v 1.6 2002/01/27 14:18:12 takemura Exp $ */
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/* $NetBSD: mq200_vrip.c,v 1.7 2002/05/11 14:10:06 takemura Exp $ */
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/*-
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* Copyright (c) 2000 Takemura Shin
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#include <hpcmips/vr/vrcpudef.h>
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#include <hpcmips/vr/vripif.h>
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#include <hpcmips/dev/mq200var.h>
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#include <hpcmips/dev/mq200reg.h>
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#include "bivideo.h"
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#if NBIVIDEO > 0
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#include <dev/hpc/bivideovar.h>
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sc->sc_baseaddr = va->va_addr;
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sc->sc_iot = va->va_iot;
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if (bus_space_map(va->va_iot, va->va_addr, va->va_size, 0,
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&sc->sc_ioh)) {
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if (bus_space_map(va->va_iot, va->va_addr + MQ200_REGADDR,
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va->va_size - MQ200_REGADDR, 0, &sc->sc_ioh)) {
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printf(": can't map bus space\n");
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return;
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}
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