Aren/NetBSD
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

Add "bool txr_no_space" for TX descriptor shortage. Use it like IFF_OACTIVE.

Browse Source
This commit is contained in:
msaitoh 2018-05-23 10:11:07 +00:00
parent 81afe21fce
commit 0eb334e05a
4 changed files with 16 additions and 5 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

10
sys/dev/pci/ixgbe/ix_txrx.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: ix_txrx.c,v 1.46 2018/05/23 04:45:24 msaitoh Exp $ */
/* $NetBSD: ix_txrx.c,v 1.47 2018/05/23 10:11:07 msaitoh Exp $ */
/******************************************************************************
@ -146,7 +146,9 @@ ixgbe_legacy_start_locked(struct ifnet *ifp, struct tx_ring *txr)
}
if ((ifp->if_flags & IFF_RUNNING) == 0)
return (ENETDOWN);
if (txr->txr_no_space)
return (ENETDOWN);
while (!IFQ_IS_EMPTY(&ifp->if_snd)) {
if (txr->tx_avail <= IXGBE_QUEUE_MIN_FREE)
break;
@ -291,6 +293,8 @@ ixgbe_mq_start_locked(struct ifnet *ifp, struct tx_ring *txr)
}
if ((ifp->if_flags & IFF_RUNNING) == 0)
return (ENETDOWN);
if (txr->txr_no_space)
return (ENETDOWN);
/* Process the queue */
while ((next = pcq_get(txr->txr_interq)) != NULL) {
@ -461,6 +465,7 @@ retry:
/* Make certain there are enough descriptors */
if (txr->tx_avail < (map->dm_nsegs + 2)) {
txr->txr_no_space = true;
txr->no_desc_avail.ev_count++;
ixgbe_dmamap_unload(txr->txtag, txbuf->map);
return EAGAIN;
@ -1159,6 +1164,7 @@ ixgbe_txeof(struct tx_ring *txr)
buf->m_head = NULL;
}
buf->eop = NULL;
txr->txr_no_space = false;
++txr->tx_avail;
/* We clean the range if multi segment */

4
sys/dev/pci/ixgbe/ixgbe.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: ixgbe.c,v 1.154 2018/05/23 04:37:13 msaitoh Exp $ */
/* $NetBSD: ixgbe.c,v 1.155 2018/05/23 10:11:07 msaitoh Exp $ */
/******************************************************************************
@ -703,6 +703,8 @@ ixgbe_initialize_transmit_units(struct adapter *adapter)
/* Cache the tail address */
txr->tail = IXGBE_TDT(j);
txr->txr_no_space = false;
/* Disable Head Writeback */
/*
* Note: for X550 series devices, these registers are actually

3
sys/dev/pci/ixgbe/ixgbe.h
View File

@ -1,4 +1,4 @@
/* $NetBSD: ixgbe.h,v 1.48 2018/05/18 10:09:02 msaitoh Exp $ */
/* $NetBSD: ixgbe.h,v 1.49 2018/05/23 10:11:07 msaitoh Exp $ */
/******************************************************************************
SPDX-License-Identifier: BSD-3-Clause
@ -368,6 +368,7 @@ struct tx_ring {
pcq_t *txr_interq;
struct work wq_cookie;
void *txr_si;
bool txr_no_space; /* Like IFF_OACTIVE */
/* Flow Director */
u16 atr_sample;

4
sys/dev/pci/ixgbe/ixv.c
View File

@ -1,4 +1,4 @@
/*$NetBSD: ixv.c,v 1.99 2018/05/23 04:37:13 msaitoh Exp $*/
/*$NetBSD: ixv.c,v 1.100 2018/05/23 10:11:07 msaitoh Exp $*/
/******************************************************************************
@ -1589,6 +1589,8 @@ ixv_initialize_transmit_units(struct adapter *adapter)
/* Set Tx Tail register */
txr->tail = IXGBE_VFTDT(j);
txr->txr_no_space = false;
/* Set Ring parameters */
IXGBE_WRITE_REG(hw, IXGBE_VFTDBAL(j),
(tdba & 0x00000000ffffffffULL));