Access on ELINK_W3_INTERNAL_CONFIG register with 32-bit mode. Remove
16-bit access code. This register is 32-bit. 16-bit access with the register causes data inconsistency (especially for CardBus cards).
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@ -1,4 +1,4 @@
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/* $NetBSD: elinkxl.c,v 1.36 2000/06/28 17:12:56 mrg Exp $ */
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/* $NetBSD: elinkxl.c,v 1.37 2000/08/25 09:01:59 haya Exp $ */
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/*-
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* Copyright (c) 1998 The NetBSD Foundation, Inc.
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@ -771,7 +771,7 @@ ex_set_media(sc)
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{
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bus_space_tag_t iot = sc->sc_iot;
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bus_space_handle_t ioh = sc->sc_ioh;
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int config0, config1;
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u_int32_t configreg;
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if (((sc->ex_conf & EX_CONF_MII) &&
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(sc->ex_mii.mii_media_active & IFM_FDX))
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@ -790,16 +790,12 @@ ex_set_media(sc)
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if (sc->ex_conf & EX_CONF_MII) {
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GO_WINDOW(3);
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config0 = (u_int)bus_space_read_2(iot, ioh,
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ELINK_W3_INTERNAL_CONFIG);
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config1 = (u_int)bus_space_read_2(iot, ioh,
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ELINK_W3_INTERNAL_CONFIG + 2);
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configreg = bus_space_read_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG);
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config1 = config1 & ~CONFIG_MEDIAMASK;
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config1 |= (ELINKMEDIA_MII << CONFIG_MEDIAMASK_SHIFT);
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configreg &= ~(CONFIG_MEDIAMASK << 16);
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configreg |= (ELINKMEDIA_MII << (CONFIG_MEDIAMASK_SHIFT + 16));
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bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG, config0);
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bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG + 2, config1);
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bus_space_write_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG, configreg);
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mii_mediachg(&sc->ex_mii);
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return;
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}
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@ -847,15 +843,13 @@ ex_set_media(sc)
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}
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GO_WINDOW(3);
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config0 = (u_int)bus_space_read_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG);
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config1 = (u_int)bus_space_read_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG + 2);
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configreg = bus_space_read_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG);
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config1 = config1 & ~CONFIG_MEDIAMASK;
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config1 |= (sc->ex_mii.mii_media.ifm_cur->ifm_data <<
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CONFIG_MEDIAMASK_SHIFT);
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configreg &= ~(CONFIG_MEDIAMASK << 16);
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configreg |= (sc->ex_mii.mii_media.ifm_cur->ifm_data <<
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(CONFIG_MEDIAMASK_SHIFT + 16));
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bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG, config0);
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bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG + 2, config1);
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bus_space_write_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG, configreg);
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}
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/*
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