diff --git a/sys/dev/pci/com_puc.c b/sys/dev/pci/com_puc.c index 638d67fbcaf8..eb09374ff0af 100644 --- a/sys/dev/pci/com_puc.c +++ b/sys/dev/pci/com_puc.c @@ -1,4 +1,4 @@ -/* $NetBSD: com_puc.c,v 1.8 2003/01/31 00:07:41 thorpej Exp $ */ +/* $NetBSD: com_puc.c,v 1.9 2004/02/03 19:51:39 fredb Exp $ */ /* * Copyright (c) 1998 Christopher G. Demetriou. All rights reserved. @@ -38,7 +38,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: com_puc.c,v 1.8 2003/01/31 00:07:41 thorpej Exp $"); +__KERNEL_RCSID(0, "$NetBSD: com_puc.c,v 1.9 2004/02/03 19:51:39 fredb Exp $"); #include #include @@ -51,6 +51,7 @@ __KERNEL_RCSID(0, "$NetBSD: com_puc.c,v 1.8 2003/01/31 00:07:41 thorpej Exp $"); #include #include #include +#include struct com_puc_softc { struct com_softc sc_com; /* real "com" softc */ @@ -113,6 +114,21 @@ com_puc_attach(parent, self, aux) sc->sc_ioh = aa->h; sc->sc_frequency = aa->flags & PUC_COM_CLOCKMASK; + /* Enable Cyberserial 8X clock. */ + if (aa->flags & (PUC_COM_SIIG10x|PUC_COM_SIIG20x)) { + int usrregno; + + if (aa->flags & PUC_PORT_USR0) usrregno = 0; + else if (aa->flags & PUC_PORT_USR1) usrregno = 1; + else if (aa->flags & PUC_PORT_USR2) usrregno = 2; + else if (aa->flags & PUC_PORT_USR3) usrregno = 3; + + if (aa->flags & PUC_COM_SIIG10x) + write_siig10x_usrreg(aa->pc, aa->tag, usrregno, 1); + else + write_siig20x_usrreg(aa->pc, aa->tag, usrregno, 1); + } + intrstr = pci_intr_string(aa->pc, aa->intrhandle); psc->sc_ih = pci_intr_establish(aa->pc, aa->intrhandle, IPL_SERIAL, comintr, sc); diff --git a/sys/dev/pci/cyber.c b/sys/dev/pci/cyber.c new file mode 100644 index 000000000000..e8733382f10d --- /dev/null +++ b/sys/dev/pci/cyber.c @@ -0,0 +1,121 @@ +/* $NetBSD: cyber.c,v 1.1 2004/02/03 19:51:39 fredb Exp $ */ + +/*- + * Copyright (c) 2004 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Frederick S. Bruckman. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by the NetBSD + * Foundation, Inc. and its contributors. + * 4. Neither the name of The NetBSD Foundation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +/* Store one "Usr" register on an SIIG Cyberserial multiport PCI card. */ + +#include +__KERNEL_RCSID(0, "$NetBSD: cyber.c,v 1.1 2004/02/03 19:51:39 fredb Exp $"); + +#include +#include +#include /* XXX for tcflag_t in comvar.h */ + +#include + +#include +#include + +void +write_siig10x_usrreg(pci_chipset_tag_t pc, pcitag_t tag, int usrregno, + int high_speed) +{ + volatile pcireg_t curregs, newregs; + + newregs = curregs = pci_conf_read(pc, tag, SIIG10x_USR_BASE); + + if (high_speed) /* Clear bit. */ + switch (usrregno) { + case 0: + newregs &= ~SIIG10x_USR0_MASK; + break; + case 1: + newregs &= ~SIIG10x_USR1_MASK; + break; + case 2: + newregs &= ~SIIG10x_USR2_MASK; + break; + case 3: + newregs &= ~SIIG10x_USR3_MASK; + } + else /* if (!high_speed) */ /* Set bit. */ + switch (usrregno) { + case 0: + newregs |= SIIG10x_USR0_MASK; + break; + case 1: + newregs |= SIIG10x_USR1_MASK; + break; + case 2: + newregs |= SIIG10x_USR2_MASK; + break; + case 3: + newregs |= SIIG10x_USR3_MASK; + } + + if (newregs != curregs) + pci_conf_write(pc, tag, SIIG10x_USR_BASE, newregs); +} + +void +write_siig20x_usrreg(pci_chipset_tag_t pc, pcitag_t tag, int usrregno, + int high_speed) +{ + volatile pcireg_t curreg, newreg; + int offset; + + switch (usrregno) { + case 0: + offset = SIIG20x_USR0; + break; + case 1: + offset = SIIG20x_USR1; + break; + default: + return; + } + + newreg = curreg = pci_conf_read(pc, tag, offset); + + if (high_speed) /* Clear bit. */ + newreg &= ~SIIG20x_USR_MASK; + else /* if (!high_speed) */ /* Set bit. */ + newreg |= SIIG20x_USR_MASK; + + if (newreg != curreg) + pci_conf_write(pc, tag, offset, newreg); +} diff --git a/sys/dev/pci/cyberreg.h b/sys/dev/pci/cyberreg.h new file mode 100644 index 000000000000..4016268c38db --- /dev/null +++ b/sys/dev/pci/cyberreg.h @@ -0,0 +1,69 @@ +/* $NetBSD: cyberreg.h,v 1.1 2004/02/03 19:51:39 fredb Exp $ */ + +/*- + * Copyright (c) 2004 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Frederick S. Bruckman. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by the NetBSD + * Foundation, Inc. and its contributors. + * 4. Neither the name of The NetBSD Foundation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * These cards have various combinations of serial and parallel ports. All + * varieties have up to 6 1-bit registers for extended capabilities, named + * "Usr0, ..., Usr5". The functional registers are mapped to the proper + * "Usr" register at attachment time. The only functional registers the + * kernel currently deals with are the registers to enable or disable the + * alternate clock, which permits speeds of the serial port all the way to + * 960Kbps. (In the documentation, those registers are called "Clks0" and + * "Clks1" on the "10x" series, and * "K0" and "K1" on the 20x series.) + */ + +#ifndef _PCI_CYBERREG_H_ +#define _PCI_CYBERREG_H_ + +/* The "10x" series cards have 4 1-bit registers, spaced 3 bits apart. */ +#define SIIG10x_USR_BASE 0x50 +#define SIIG10x_USR0_MASK (1 << 2 << 16) +#define SIIG10x_USR1_MASK (1 << 5 << 16) +#define SIIG10x_USR2_MASK (1 << 8 << 16) +#define SIIG10x_USR3_MASK (1 << 11 << 16) + +/* The "20x" series cards have 6 1-bit registers, spaced 32 bits apart. */ +#define SIIG20x_USR0 0x6c +#define SIIG20x_USR1 0x70 +#define SIIG20x_USR2 0x74 +#define SIIG20x_USR3 0x78 +#define SIIG20x_USR4 0x7c +#define SIIG20x_USR5 0x80 +#define SIIG20x_USR_MASK (1 << 28) + +#endif /* !_PCI_CYBERREG_H_ */ diff --git a/sys/dev/pci/cybervar.h b/sys/dev/pci/cybervar.h new file mode 100644 index 000000000000..3a3907e224a5 --- /dev/null +++ b/sys/dev/pci/cybervar.h @@ -0,0 +1,47 @@ +/* $NetBSD: cybervar.h,v 1.1 2004/02/03 19:51:39 fredb Exp $ */ + +/*- + * Copyright (c) 2004 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Frederick S. Bruckman. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by the NetBSD + * Foundation, Inc. and its contributors. + * 4. Neither the name of The NetBSD Foundation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _PCI_CYBERVAR_H_ +#define _PCI_CYBERVAR_H_ + +#include + +void write_siig10x_usrreg(pci_chipset_tag_t, pcitag_t, int, int); +void write_siig20x_usrreg(pci_chipset_tag_t, pcitag_t, int, int); + +#endif /* !_PCI_CYBERVAR_H_ */ diff --git a/sys/dev/pci/files.pci b/sys/dev/pci/files.pci index afb3f789a500..b07be5343c05 100644 --- a/sys/dev/pci/files.pci +++ b/sys/dev/pci/files.pci @@ -1,4 +1,4 @@ -# $NetBSD: files.pci,v 1.207 2004/01/25 11:50:51 jdolecek Exp $ +# $NetBSD: files.pci,v 1.208 2004/02/03 19:51:39 fredb Exp $ # # Config file and device description for machine-independent PCI code. # Included by ports that need it. Requires that the SCSI files be @@ -484,6 +484,7 @@ file dev/pci/pucdata.c puc attach com at puc with com_puc file dev/pci/com_puc.c com_puc +file dev/pci/cyber.c com_puc attach lpt at puc with lpt_puc file dev/pci/lpt_puc.c lpt_puc & !ppbus diff --git a/sys/dev/pci/puc.c b/sys/dev/pci/puc.c index 5c4867b7c36e..94ab7c1adfe0 100644 --- a/sys/dev/pci/puc.c +++ b/sys/dev/pci/puc.c @@ -1,4 +1,4 @@ -/* $NetBSD: puc.c,v 1.19 2004/01/25 11:57:52 jdolecek Exp $ */ +/* $NetBSD: puc.c,v 1.20 2004/02/03 19:51:39 fredb Exp $ */ /* * Copyright (c) 1996, 1998, 1999 @@ -53,7 +53,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: puc.c,v 1.19 2004/01/25 11:57:52 jdolecek Exp $"); +__KERNEL_RCSID(0, "$NetBSD: puc.c,v 1.20 2004/02/03 19:51:39 fredb Exp $"); #include #include @@ -279,6 +279,7 @@ puc_attach(parent, self, aux) paa.type = sc->sc_desc->ports[i].type; paa.flags = sc->sc_desc->ports[i].flags; paa.pc = pa->pa_pc; + paa.tag = pa->pa_tag; paa.intrhandle = intrhandle; paa.a = sc->sc_bar_mappings[barindex].a; paa.t = sc->sc_bar_mappings[barindex].t; diff --git a/sys/dev/pci/pucdata.c b/sys/dev/pci/pucdata.c index 53ba72476ec6..a2c2b1f908da 100644 --- a/sys/dev/pci/pucdata.c +++ b/sys/dev/pci/pucdata.c @@ -1,4 +1,4 @@ -/* $NetBSD: pucdata.c,v 1.35 2004/01/25 11:48:27 jdolecek Exp $ */ +/* $NetBSD: pucdata.c,v 1.36 2004/02/03 19:51:39 fredb Exp $ */ /* * Copyright (c) 1998, 1999 Christopher G. Demetriou. All rights reserved. @@ -36,7 +36,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: pucdata.c,v 1.35 2004/01/25 11:48:27 jdolecek Exp $"); +__KERNEL_RCSID(0, "$NetBSD: pucdata.c,v 1.36 2004/02/03 19:51:39 fredb Exp $"); #include #include @@ -224,7 +224,8 @@ const struct puc_device_description puc_devices[] = { { 0x131f, 0x1000, 0, 0 }, { 0xffff, 0xffff, 0, 0 }, { - { PUC_PORT_TYPE_COM, 0x18, 0x00, COM_FREQ }, + { PUC_PORT_TYPE_COM, 0x18, 0x00, + (COM_FREQ * 8)|PUC_COM_SIIG10x|PUC_PORT_USR1 }, }, }, @@ -233,7 +234,8 @@ const struct puc_device_description puc_devices[] = { { 0x131f, 0x1001, 0, 0 }, { 0xffff, 0xffff, 0, 0 }, { - { PUC_PORT_TYPE_COM, 0x18, 0x00, COM_FREQ }, + { PUC_PORT_TYPE_COM, 0x18, 0x00, + (COM_FREQ * 8)|PUC_COM_SIIG10x|PUC_PORT_USR1 }, }, }, @@ -242,7 +244,8 @@ const struct puc_device_description puc_devices[] = { { 0x131f, 0x1002, 0, 0 }, { 0xffff, 0xffff, 0, 0 }, { - { PUC_PORT_TYPE_COM, 0x18, 0x00, COM_FREQ }, + { PUC_PORT_TYPE_COM, 0x18, 0x00, + (COM_FREQ * 8)|PUC_COM_SIIG10x|PUC_PORT_USR1 }, }, }, @@ -251,7 +254,8 @@ const struct puc_device_description puc_devices[] = { { 0x131f, 0x1010, 0, 0 }, { 0xffff, 0xffff, 0, 0 }, { - { PUC_PORT_TYPE_COM, 0x18, 0x00, COM_FREQ }, + { PUC_PORT_TYPE_COM, 0x18, 0x00, + (COM_FREQ * 8)|PUC_COM_SIIG10x|PUC_PORT_USR0 }, { PUC_PORT_TYPE_LPT, 0x1c, 0x00, 0x00 }, }, }, @@ -261,7 +265,8 @@ const struct puc_device_description puc_devices[] = { { 0x131f, 0x1011, 0, 0 }, { 0xffff, 0xffff, 0, 0 }, { - { PUC_PORT_TYPE_COM, 0x18, 0x00, COM_FREQ }, + { PUC_PORT_TYPE_COM, 0x18, 0x00, + (COM_FREQ * 8)|PUC_COM_SIIG10x|PUC_PORT_USR0 }, { PUC_PORT_TYPE_LPT, 0x1c, 0x00, 0x00 }, }, }, @@ -271,7 +276,8 @@ const struct puc_device_description puc_devices[] = { { 0x131f, 0x1012, 0, 0 }, { 0xffff, 0xffff, 0, 0 }, { - { PUC_PORT_TYPE_COM, 0x18, 0x00, COM_FREQ }, + { PUC_PORT_TYPE_COM, 0x18, 0x00, + (COM_FREQ * 8)|PUC_COM_SIIG10x|PUC_PORT_USR0 }, { PUC_PORT_TYPE_LPT, 0x1c, 0x00, 0x00 }, }, }, @@ -300,8 +306,10 @@ const struct puc_device_description puc_devices[] = { { 0x131f, 0x1030, 0, 0 }, { 0xffff, 0xffff, 0, 0 }, { - { PUC_PORT_TYPE_COM, 0x18, 0x00, COM_FREQ }, - { PUC_PORT_TYPE_COM, 0x1c, 0x00, COM_FREQ }, + { PUC_PORT_TYPE_COM, 0x18, 0x00, + (COM_FREQ * 8)|PUC_COM_SIIG10x|PUC_PORT_USR2 }, + { PUC_PORT_TYPE_COM, 0x1c, 0x00, + (COM_FREQ * 8)|PUC_COM_SIIG10x|PUC_PORT_USR3 }, }, }, @@ -310,8 +318,10 @@ const struct puc_device_description puc_devices[] = { { 0x131f, 0x1031, 0, 0 }, { 0xffff, 0xffff, 0, 0 }, { - { PUC_PORT_TYPE_COM, 0x18, 0x00, COM_FREQ }, - { PUC_PORT_TYPE_COM, 0x1c, 0x00, COM_FREQ }, + { PUC_PORT_TYPE_COM, 0x18, 0x00, + (COM_FREQ * 8)|PUC_COM_SIIG10x|PUC_PORT_USR2 }, + { PUC_PORT_TYPE_COM, 0x1c, 0x00, + (COM_FREQ * 8)|PUC_COM_SIIG10x|PUC_PORT_USR3 }, }, }, @@ -320,8 +330,10 @@ const struct puc_device_description puc_devices[] = { { 0x131f, 0x1032, 0, 0 }, { 0xffff, 0xffff, 0, 0 }, { - { PUC_PORT_TYPE_COM, 0x18, 0x00, COM_FREQ }, - { PUC_PORT_TYPE_COM, 0x1c, 0x00, COM_FREQ }, + { PUC_PORT_TYPE_COM, 0x18, 0x00, + (COM_FREQ * 8)|PUC_COM_SIIG10x|PUC_PORT_USR2 }, + { PUC_PORT_TYPE_COM, 0x1c, 0x00, + (COM_FREQ * 8)|PUC_COM_SIIG10x|PUC_PORT_USR3 }, }, }, @@ -330,8 +342,10 @@ const struct puc_device_description puc_devices[] = { { 0x131f, 0x1034, 0, 0 }, /* XXX really? */ { 0xffff, 0xffff, 0, 0 }, { - { PUC_PORT_TYPE_COM, 0x18, 0x00, COM_FREQ }, - { PUC_PORT_TYPE_COM, 0x1c, 0x00, COM_FREQ }, + { PUC_PORT_TYPE_COM, 0x18, 0x00, + (COM_FREQ * 8)|PUC_COM_SIIG10x|PUC_PORT_USR2 }, + { PUC_PORT_TYPE_COM, 0x1c, 0x00, + (COM_FREQ * 8)|PUC_COM_SIIG10x|PUC_PORT_USR3 }, { PUC_PORT_TYPE_LPT, 0x20, 0x00, 0x00 }, }, }, @@ -341,8 +355,10 @@ const struct puc_device_description puc_devices[] = { { 0x131f, 0x1035, 0, 0 }, /* XXX really? */ { 0xffff, 0xffff, 0, 0 }, { - { PUC_PORT_TYPE_COM, 0x18, 0x00, COM_FREQ }, - { PUC_PORT_TYPE_COM, 0x1c, 0x00, COM_FREQ }, + { PUC_PORT_TYPE_COM, 0x18, 0x00, + (COM_FREQ * 8)|PUC_COM_SIIG10x|PUC_PORT_USR2 }, + { PUC_PORT_TYPE_COM, 0x1c, 0x00, + (COM_FREQ * 8)|PUC_COM_SIIG10x|PUC_PORT_USR3 }, { PUC_PORT_TYPE_LPT, 0x20, 0x00, 0x00 }, }, }, @@ -352,8 +368,10 @@ const struct puc_device_description puc_devices[] = { { 0x131f, 0x1036, 0, 0 }, /* XXX really? */ { 0xffff, 0xffff, 0, 0 }, { - { PUC_PORT_TYPE_COM, 0x18, 0x00, COM_FREQ }, - { PUC_PORT_TYPE_COM, 0x1c, 0x00, COM_FREQ }, + { PUC_PORT_TYPE_COM, 0x18, 0x00, + (COM_FREQ * 8)|PUC_COM_SIIG10x|PUC_PORT_USR2 }, + { PUC_PORT_TYPE_COM, 0x1c, 0x00, + (COM_FREQ * 8)|PUC_COM_SIIG10x|PUC_PORT_USR3 }, { PUC_PORT_TYPE_LPT, 0x20, 0x00, 0x00 }, }, }, @@ -363,10 +381,11 @@ const struct puc_device_description puc_devices[] = { { 0x131f, 0x1050, 0, 0 }, { 0xffff, 0xffff, 0, 0 }, { - { PUC_PORT_TYPE_COM, 0x18, 0x00, COM_FREQ }, - { PUC_PORT_TYPE_COM, 0x1c, 0x00, COM_FREQ }, - { PUC_PORT_TYPE_COM, 0x20, 0x00, COM_FREQ }, - { PUC_PORT_TYPE_COM, 0x24, 0x00, COM_FREQ }, + { PUC_PORT_TYPE_COM, 0x18, 0x00, + (COM_FREQ * 8)|PUC_COM_SIIG10x|PUC_PORT_USR0 }, + { PUC_PORT_TYPE_COM, 0x1c, 0x00, COM_FREQ * 8 }, + { PUC_PORT_TYPE_COM, 0x20, 0x00, COM_FREQ * 8 }, + { PUC_PORT_TYPE_COM, 0x24, 0x00, COM_FREQ * 8 }, }, }, @@ -375,10 +394,11 @@ const struct puc_device_description puc_devices[] = { { 0x131f, 0x1051, 0, 0 }, { 0xffff, 0xffff, 0, 0 }, { - { PUC_PORT_TYPE_COM, 0x18, 0x00, COM_FREQ }, - { PUC_PORT_TYPE_COM, 0x1c, 0x00, COM_FREQ }, - { PUC_PORT_TYPE_COM, 0x20, 0x00, COM_FREQ }, - { PUC_PORT_TYPE_COM, 0x24, 0x00, COM_FREQ }, + { PUC_PORT_TYPE_COM, 0x18, 0x00, + (COM_FREQ * 8)|PUC_COM_SIIG10x|PUC_PORT_USR0 }, + { PUC_PORT_TYPE_COM, 0x1c, 0x00, COM_FREQ * 8 }, + { PUC_PORT_TYPE_COM, 0x20, 0x00, COM_FREQ * 8 }, + { PUC_PORT_TYPE_COM, 0x24, 0x00, COM_FREQ * 8 }, }, }, @@ -387,10 +407,11 @@ const struct puc_device_description puc_devices[] = { { 0x131f, 0x1052, 0, 0 }, { 0xffff, 0xffff, 0, 0 }, { - { PUC_PORT_TYPE_COM, 0x18, 0x00, COM_FREQ }, - { PUC_PORT_TYPE_COM, 0x1c, 0x00, COM_FREQ }, - { PUC_PORT_TYPE_COM, 0x20, 0x00, COM_FREQ }, - { PUC_PORT_TYPE_COM, 0x24, 0x00, COM_FREQ }, + { PUC_PORT_TYPE_COM, 0x18, 0x00, + (COM_FREQ * 8)|PUC_COM_SIIG10x|PUC_PORT_USR0 }, + { PUC_PORT_TYPE_COM, 0x1c, 0x00, COM_FREQ * 8 }, + { PUC_PORT_TYPE_COM, 0x20, 0x00, COM_FREQ * 8 }, + { PUC_PORT_TYPE_COM, 0x24, 0x00, COM_FREQ * 8 }, }, }, @@ -422,7 +443,8 @@ const struct puc_device_description puc_devices[] = { { 0x131f, 0x2040, 0, 0 }, { 0xffff, 0xffff, 0, 0 }, { - { PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ }, + { PUC_PORT_TYPE_COM, 0x10, 0x00, + (COM_FREQ * 8)|PUC_COM_SIIG20x|PUC_PORT_USR0 }, { PUC_PORT_TYPE_LPT, 0x14, 0x00, 0x00 }, { PUC_PORT_TYPE_LPT, 0x1c, 0x00, 0x00 }, }, @@ -433,7 +455,8 @@ const struct puc_device_description puc_devices[] = { { 0x131f, 0x2041, 0, 0 }, { 0xffff, 0xffff, 0, 0 }, { - { PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ }, + { PUC_PORT_TYPE_COM, 0x10, 0x00, + (COM_FREQ * 8)|PUC_COM_SIIG20x|PUC_PORT_USR0 }, { PUC_PORT_TYPE_LPT, 0x14, 0x00, 0x00 }, { PUC_PORT_TYPE_LPT, 0x1c, 0x00, 0x00 }, }, @@ -444,7 +467,8 @@ const struct puc_device_description puc_devices[] = { { 0x131f, 0x2042, 0, 0 }, { 0xffff, 0xffff, 0, 0 }, { - { PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ }, + { PUC_PORT_TYPE_COM, 0x10, 0x00, + (COM_FREQ * 8)|PUC_COM_SIIG20x|PUC_PORT_USR0 }, { PUC_PORT_TYPE_LPT, 0x14, 0x00, 0x00 }, { PUC_PORT_TYPE_LPT, 0x1c, 0x00, 0x00 }, }, @@ -455,7 +479,8 @@ const struct puc_device_description puc_devices[] = { { 0x131f, 0x2000, 0, 0 }, { 0xffff, 0xffff, 0, 0 }, { - { PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ }, + { PUC_PORT_TYPE_COM, 0x10, 0x00, + (COM_FREQ * 8)|PUC_COM_SIIG20x|PUC_PORT_USR0 }, }, }, @@ -464,7 +489,8 @@ const struct puc_device_description puc_devices[] = { { 0x131f, 0x2001, 0, 0 }, { 0xffff, 0xffff, 0, 0 }, { - { PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ }, + { PUC_PORT_TYPE_COM, 0x10, 0x00, + (COM_FREQ * 8)|PUC_COM_SIIG20x|PUC_PORT_USR0 }, }, }, @@ -473,7 +499,8 @@ const struct puc_device_description puc_devices[] = { { 0x131f, 0x2002, 0, 0 }, { 0xffff, 0xffff, 0, 0 }, { - { PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ }, + { PUC_PORT_TYPE_COM, 0x10, 0x00, + (COM_FREQ * 8)|PUC_COM_SIIG20x|PUC_PORT_USR0 }, }, }, @@ -482,7 +509,8 @@ const struct puc_device_description puc_devices[] = { { 0x131f, 0x2010, 0, 0 }, { 0xffff, 0xffff, 0, 0 }, { - { PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ }, + { PUC_PORT_TYPE_COM, 0x10, 0x00, + (COM_FREQ * 8)|PUC_COM_SIIG20x|PUC_PORT_USR0 }, { PUC_PORT_TYPE_LPT, 0x14, 0x00, 0x00 }, }, }, @@ -492,7 +520,8 @@ const struct puc_device_description puc_devices[] = { { 0x131f, 0x2011, 0, 0 }, { 0xffff, 0xffff, 0, 0 }, { - { PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ }, + { PUC_PORT_TYPE_COM, 0x10, 0x00, + (COM_FREQ * 8)|PUC_COM_SIIG20x|PUC_PORT_USR0 }, { PUC_PORT_TYPE_LPT, 0x14, 0x00, 0x00 }, }, }, @@ -502,7 +531,8 @@ const struct puc_device_description puc_devices[] = { { 0x131f, 0x2012, 0, 0 }, { 0xffff, 0xffff, 0, 0 }, { - { PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ }, + { PUC_PORT_TYPE_COM, 0x10, 0x00, + (COM_FREQ * 8)|PUC_COM_SIIG20x|PUC_PORT_USR0 }, { PUC_PORT_TYPE_LPT, 0x14, 0x00, 0x00 }, }, }, @@ -512,8 +542,10 @@ const struct puc_device_description puc_devices[] = { { 0x131f, 0x2030, 0, 0 }, { 0xffff, 0xffff, 0, 0 }, { - { PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ }, - { PUC_PORT_TYPE_COM, 0x14, 0x00, COM_FREQ }, + { PUC_PORT_TYPE_COM, 0x10, 0x00, + (COM_FREQ * 8)|PUC_COM_SIIG20x|PUC_PORT_USR0 }, + { PUC_PORT_TYPE_COM, 0x14, 0x00, + (COM_FREQ * 8)|PUC_COM_SIIG20x|PUC_PORT_USR1 }, }, }, @@ -522,8 +554,10 @@ const struct puc_device_description puc_devices[] = { { 0x131f, 0x2031, 0, 0 }, { 0xffff, 0xffff, 0, 0 }, { - { PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ }, - { PUC_PORT_TYPE_COM, 0x14, 0x00, COM_FREQ }, + { PUC_PORT_TYPE_COM, 0x10, 0x00, + (COM_FREQ * 8)|PUC_COM_SIIG20x|PUC_PORT_USR0 }, + { PUC_PORT_TYPE_COM, 0x14, 0x00, + (COM_FREQ * 8)|PUC_COM_SIIG20x|PUC_PORT_USR1 }, }, }, @@ -532,8 +566,10 @@ const struct puc_device_description puc_devices[] = { { 0x131f, 0x2032, 0, 0 }, { 0xffff, 0xffff, 0, 0 }, { - { PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ }, - { PUC_PORT_TYPE_COM, 0x14, 0x00, COM_FREQ }, + { PUC_PORT_TYPE_COM, 0x10, 0x00, + (COM_FREQ * 8)|PUC_COM_SIIG20x|PUC_PORT_USR0 }, + { PUC_PORT_TYPE_COM, 0x14, 0x00, + (COM_FREQ * 8)|PUC_COM_SIIG20x|PUC_PORT_USR1 }, }, }, @@ -542,8 +578,10 @@ const struct puc_device_description puc_devices[] = { { 0x131f, 0x2060, 0, 0 }, { 0xffff, 0xffff, 0, 0 }, { - { PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ }, - { PUC_PORT_TYPE_COM, 0x14, 0x00, COM_FREQ }, + { PUC_PORT_TYPE_COM, 0x10, 0x00, + (COM_FREQ * 8)|PUC_COM_SIIG20x|PUC_PORT_USR0 }, + { PUC_PORT_TYPE_COM, 0x14, 0x00, + (COM_FREQ * 8)|PUC_COM_SIIG20x|PUC_PORT_USR1 }, { PUC_PORT_TYPE_LPT, 0x18, 0x00, 0x00 }, }, }, @@ -553,8 +591,10 @@ const struct puc_device_description puc_devices[] = { { 0x131f, 0x2061, 0, 0 }, { 0xffff, 0xffff, 0, 0 }, { - { PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ }, - { PUC_PORT_TYPE_COM, 0x14, 0x00, COM_FREQ }, + { PUC_PORT_TYPE_COM, 0x10, 0x00, + (COM_FREQ * 8)|PUC_COM_SIIG20x|PUC_PORT_USR0 }, + { PUC_PORT_TYPE_COM, 0x14, 0x00, + (COM_FREQ * 8)|PUC_COM_SIIG20x|PUC_PORT_USR1 }, { PUC_PORT_TYPE_LPT, 0x18, 0x00, 0x00 }, }, }, @@ -564,8 +604,10 @@ const struct puc_device_description puc_devices[] = { { 0x131f, 0x2062, 0, 0 }, { 0xffff, 0xffff, 0, 0 }, { - { PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ }, - { PUC_PORT_TYPE_COM, 0x14, 0x00, COM_FREQ }, + { PUC_PORT_TYPE_COM, 0x10, 0x00, + (COM_FREQ * 8)|PUC_COM_SIIG20x|PUC_PORT_USR0 }, + { PUC_PORT_TYPE_COM, 0x14, 0x00, + (COM_FREQ * 8)|PUC_COM_SIIG20x|PUC_PORT_USR1 }, { PUC_PORT_TYPE_LPT, 0x18, 0x00, 0x00 }, }, }, @@ -575,10 +617,11 @@ const struct puc_device_description puc_devices[] = { { 0x131f, 0x2050, 0, 0 }, { 0xffff, 0xffff, 0, 0 }, { - { PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ }, - { PUC_PORT_TYPE_COM, 0x14, 0x00, COM_FREQ }, - { PUC_PORT_TYPE_COM, 0x18, 0x00, COM_FREQ }, - { PUC_PORT_TYPE_COM, 0x1c, 0x00, COM_FREQ }, + { PUC_PORT_TYPE_COM, 0x10, 0x00, + (COM_FREQ * 8)|PUC_COM_SIIG20x|PUC_PORT_USR0 }, + { PUC_PORT_TYPE_COM, 0x14, 0x00, COM_FREQ * 8 }, + { PUC_PORT_TYPE_COM, 0x18, 0x00, COM_FREQ * 8 }, + { PUC_PORT_TYPE_COM, 0x1c, 0x00, COM_FREQ * 8 }, }, }, @@ -587,10 +630,11 @@ const struct puc_device_description puc_devices[] = { { 0x131f, 0x2051, 0, 0 }, { 0xffff, 0xffff, 0, 0 }, { - { PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ }, - { PUC_PORT_TYPE_COM, 0x14, 0x00, COM_FREQ }, - { PUC_PORT_TYPE_COM, 0x18, 0x00, COM_FREQ }, - { PUC_PORT_TYPE_COM, 0x1c, 0x00, COM_FREQ }, + { PUC_PORT_TYPE_COM, 0x10, 0x00, + (COM_FREQ * 8)|PUC_COM_SIIG20x|PUC_PORT_USR0 }, + { PUC_PORT_TYPE_COM, 0x14, 0x00, COM_FREQ * 8 }, + { PUC_PORT_TYPE_COM, 0x18, 0x00, COM_FREQ * 8 }, + { PUC_PORT_TYPE_COM, 0x1c, 0x00, COM_FREQ * 8 }, }, }, @@ -599,10 +643,11 @@ const struct puc_device_description puc_devices[] = { { 0x131f, 0x2052, 0, 0 }, { 0xffff, 0xffff, 0, 0 }, { - { PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ }, - { PUC_PORT_TYPE_COM, 0x14, 0x00, COM_FREQ }, - { PUC_PORT_TYPE_COM, 0x18, 0x00, COM_FREQ }, - { PUC_PORT_TYPE_COM, 0x1c, 0x00, COM_FREQ }, + { PUC_PORT_TYPE_COM, 0x10, 0x00, + (COM_FREQ * 8)|PUC_COM_SIIG20x|PUC_PORT_USR0 }, + { PUC_PORT_TYPE_COM, 0x14, 0x00, COM_FREQ * 8 }, + { PUC_PORT_TYPE_COM, 0x18, 0x00, COM_FREQ * 8 }, + { PUC_PORT_TYPE_COM, 0x1c, 0x00, COM_FREQ * 8 }, }, }, @@ -611,14 +656,15 @@ const struct puc_device_description puc_devices[] = { { 0x131f, 0x2081, 0, 0 }, { 0xffff, 0xffff, 0, 0 }, { - { PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ }, - { PUC_PORT_TYPE_COM, 0x14, 0x00, COM_FREQ }, - { PUC_PORT_TYPE_COM, 0x18, 0x00, COM_FREQ }, - { PUC_PORT_TYPE_COM, 0x1c, 0x00, COM_FREQ }, - { PUC_PORT_TYPE_COM, 0x20, 0x00, COM_FREQ }, - { PUC_PORT_TYPE_COM, 0x20, 0x08, COM_FREQ }, - { PUC_PORT_TYPE_COM, 0x20, 0x10, COM_FREQ }, - { PUC_PORT_TYPE_COM, 0x20, 0x18, COM_FREQ }, + { PUC_PORT_TYPE_COM, 0x10, 0x00, + (COM_FREQ * 8)|PUC_COM_SIIG20x|PUC_PORT_USR0 }, + { PUC_PORT_TYPE_COM, 0x14, 0x00, COM_FREQ * 8 }, + { PUC_PORT_TYPE_COM, 0x18, 0x00, COM_FREQ * 8 }, + { PUC_PORT_TYPE_COM, 0x1c, 0x00, COM_FREQ * 8 }, + { PUC_PORT_TYPE_COM, 0x20, 0x00, COM_FREQ * 8 }, + { PUC_PORT_TYPE_COM, 0x20, 0x08, COM_FREQ * 8 }, + { PUC_PORT_TYPE_COM, 0x20, 0x10, COM_FREQ * 8 }, + { PUC_PORT_TYPE_COM, 0x20, 0x18, COM_FREQ * 8 }, }, }, diff --git a/sys/dev/pci/pucvar.h b/sys/dev/pci/pucvar.h index 03687b08c737..6c7cc71cad42 100644 --- a/sys/dev/pci/pucvar.h +++ b/sys/dev/pci/pucvar.h @@ -1,4 +1,4 @@ -/* $NetBSD: pucvar.h,v 1.5 2004/01/25 11:57:52 jdolecek Exp $ */ +/* $NetBSD: pucvar.h,v 1.6 2004/02/03 19:51:39 fredb Exp $ */ /* * Copyright (c) 1998, 1999 Christopher G. Demetriou. All rights reserved. @@ -68,6 +68,23 @@ struct puc_device_description { /* * assume all clock rates have 8 lower bits to 0 - this leaves us 8 flags */ #define PUC_COM_CLOCKMASK 0xffffff00 +#define PUC_COM_FLAG0 (1 << 0) +#define PUC_COM_FLAG1 (1 << 1) +#define PUC_COM_FLAG2 (1 << 2) +#define PUC_COM_FLAG3 (1 << 3) +#define PUC_COM_FLAG4 (1 << 4) +#define PUC_COM_FLAG5 (1 << 5) +#define PUC_COM_FLAG6 (1 << 6) +#define PUC_COM_FLAG7 (1 << 7) + +/* Flags for SIIG Cyberserial options */ +#define PUC_COM_SIIG10x PUC_COM_FLAG7 +#define PUC_COM_SIIG20x PUC_COM_FLAG6 +#define PUC_PORT_USR0 PUC_COM_FLAG0 +#define PUC_PORT_USR1 PUC_COM_FLAG1 +#define PUC_PORT_USR2 PUC_COM_FLAG2 +#define PUC_PORT_USR3 PUC_COM_FLAG3 + /* Flags for PUC_PORT_TYPE_LPT */ /* none currently */ @@ -78,6 +95,7 @@ struct puc_attach_args { pci_chipset_tag_t pc; pci_intr_handle_t intrhandle; + pcitag_t tag; bus_addr_t a; bus_space_tag_t t;