MI softintr(9)'fy. Tested by bouyer@.
See also: http://mail-index.netbsd.org/port-next68k/2007/03/06/0000.html
This commit is contained in:
tsutsui
parent
ab9a36c548
commit
0d7a1d1146
@ -1,4 +1,4 @@
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# $NetBSD: files.next68k,v 1.36 2005/12/11 12:18:25 christos Exp $
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# $NetBSD: files.next68k,v 1.37 2007/03/08 16:37:43 tsutsui Exp $
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# next68k-specific configuration info
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@ -37,6 +37,7 @@ file arch/m68k/m68k/db_memrw.c ddb | kgdb
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file arch/m68k/m68k/kgdb_machdep.c kgdb
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file arch/m68k/m68k/pmap_motorola.c
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file arch/m68k/m68k/procfs_machdep.c procfs
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file arch/m68k/m68k/softintr.c
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file arch/m68k/m68k/sys_machdep.c
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file arch/m68k/m68k/vm_machdep.c
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@ -1,4 +1,4 @@
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/* $NetBSD: zs.c,v 1.27 2005/12/11 12:18:25 christos Exp $ */
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/* $NetBSD: zs.c,v 1.28 2007/03/08 16:37:43 tsutsui Exp $ */
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/*-
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* Copyright (c) 1996 The NetBSD Foundation, Inc.
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@ -50,7 +50,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: zs.c,v 1.27 2005/12/11 12:18:25 christos Exp $");
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__KERNEL_RCSID(0, "$NetBSD: zs.c,v 1.28 2007/03/08 16:37:43 tsutsui Exp $");
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#include "opt_ddb.h"
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#include "opt_kgdb.h"
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@ -176,7 +176,6 @@ static int zs_attached;
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/* Interrupt handlers. */
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static int zshard(void *);
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static void zssoft(void *);
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static int zs_get_speed(struct zs_chanstate *);
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@ -209,7 +208,7 @@ zs_attach(struct device *parent, struct device *self, void *aux)
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struct zsc_attach_args zsc_args;
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volatile struct zschan *zc;
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struct zs_chanstate *cs;
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int s, channel, sir;
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int s, channel;
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zs_attached = 1;
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@ -275,13 +274,10 @@ zs_attach(struct device *parent, struct device *self, void *aux)
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}
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isrlink_autovec(zshard, NULL, NEXT_I_IPL(NEXT_I_SCC), 0, NULL);
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zsc->zsc_softintr_cookie = softintr_establish(IPL_SOFTSERIAL,
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(void (*)(void *))zsc_intr_soft, zsc);
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INTR_ENABLE(NEXT_I_SCC);
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sir = allocate_sir(zssoft, zsc);
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if (sir != SIR_SERIAL) {
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panic("Unexpected zssoft sir");
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}
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/*
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* Set the master interrupt enable and interrupt vector.
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* (common to both channels, do it on A)
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@ -319,12 +315,12 @@ static int
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zshard(void *arg)
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{
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struct zsc_softc *zsc;
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int unit, rr3, rval, softreq;
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int unit, rr3, rval;
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if (!INTR_OCCURRED(NEXT_I_SCC))
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return 0;
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rval = softreq = 0;
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rval = 0;
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for (unit = 0; unit < zsc_cd.cd_ndevs; unit++) {
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zsc = zsc_cd.cd_devs[unit];
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if (zsc == NULL)
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@ -335,52 +331,14 @@ zshard(void *arg)
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rval |= rr3;
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zsc->zsc_intrcnt.ev_count++;
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}
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softreq |= zsc->zsc_cs[0]->cs_softreq;
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softreq |= zsc->zsc_cs[1]->cs_softreq;
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/* We are at splzs here, so no need to lock. */
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if (zsc->zsc_cs[0]->cs_softreq || zsc->zsc_cs[1]->cs_softreq)
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softintr_schedule(zsc->zsc_softintr_cookie);
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}
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/* We are at splzs here, so no need to lock. */
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if (softreq && (zssoftpending == 0)) {
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zssoftpending = 1;
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setsoftserial();
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}
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return(1);
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}
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/*
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* Similar scheme as for zshard (look at all of them)
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*/
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static void
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zssoft(void *arg)
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{
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struct zsc_softc *zsc;
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int s, unit;
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/* This is not the only ISR on this IPL. */
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if (zssoftpending == 0)
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panic("zssoft not pending");
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/*
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* The soft intr. bit will be set by zshard only if
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* the variable zssoftpending is zero. The order of
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* these next two statements prevents our clearing
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* the soft intr bit just after zshard has set it.
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*/
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/* ienab_bic(IE_ZSSOFT); */
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zssoftpending = 0;
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/* Make sure we call the tty layer at spltty. */
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s = spltty();
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for (unit = 0; unit < zsc_cd.cd_ndevs; unit++) {
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zsc = zsc_cd.cd_devs[unit];
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if (zsc == NULL)
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continue;
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(void)zsc_intr_soft(zsc);
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}
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splx(s);
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}
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/*
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* Compute the current baud rate given a ZS channel.
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*/
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@ -1,4 +1,4 @@
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/* $NetBSD: intr.h,v 1.17 2007/02/16 02:53:49 ad Exp $ */
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/* $NetBSD: intr.h,v 1.18 2007/03/08 16:37:43 tsutsui Exp $ */
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/*
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* Copyright (C) 1997 Scott Reynolds
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@ -42,72 +42,60 @@
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/* watch out for side effects */
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#define splx(s) ((s) & PSL_IPL ? _spl(s) : spl0())
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#define splsoft() splraise1()
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#define splsoftnet() splsoft()
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#define splsoftclock() splsoft()
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#define splsoftserial() splsoft()
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#define splbio() splraise3()
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#define splnet() splraise3()
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#define spltty() splraise3()
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#define splserial() splraise5()
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#define splvm() splraise6()
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#define splclock() splraise3() /* ??? */
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#define splstatclock() splclock()
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#define splhigh() spl7()
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#define splsched() spl7()
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#define spllock() spl7()
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#define spldma() splraise6()
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/****************************************************************/
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#define IPL_HIGH (PSL_S|PSL_IPL7)
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#define IPL_SERIAL (PSL_S|PSL_IPL5)
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#define IPL_SCHED (PSL_S|PSL_IPL7)
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#define IPL_LOCK (PSL_S|PSL_IPL7)
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#define IPL_CLOCK (PSL_S|PSL_IPL3)
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#define IPL_STATCLOCK IPL_CLOCK
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#define IPL_VM (PSL_S|PSL_IPL6)
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#define IPL_TTY (PSL_S|PSL_IPL3)
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#define IPL_BIO (PSL_S|PSL_IPL3)
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#define IPL_NET (PSL_S|PSL_IPL3)
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#define IPL_SOFTNET (PSL_S|PSL_IPL2)
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#define IPL_SOFTCLOCK (PSL_S|PSL_IPL1)
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#define IPL_NONE 0
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#define IPL_SOFTCLOCK 1
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#define IPL_SOFTNET 2
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#define IPL_SOFTSERIAL 3
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#define IPL_SOFT 4
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#define IPL_BIO 5
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#define IPL_NET 6
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#define IPL_TTY 7
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#define IPL_SERIAL 8
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#define IPL_VM 9
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#define IPL_CLOCK 10
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#define IPL_STATCLOCK IPL_CLOCK
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#define IPL_HIGH 11
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#define IPL_LOCK IPL_HIGH
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#define IPL_SCHED IPL_HIGH
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#define NIPL 12
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typedef int ipl_t;
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typedef struct {
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ipl_t _ipl;
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ipl_t _psl;
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} ipl_cookie_t;
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static inline ipl_cookie_t
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makeiplcookie(ipl_t ipl)
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{
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extern const int ipl2psl_table[NIPL];
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return (ipl_cookie_t){._ipl = ipl};
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}
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ipl_cookie_t makeiplcookie(ipl_t);
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static inline int
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splraiseipl(ipl_cookie_t icookie)
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{
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return _splraise(icookie._ipl);
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return _splraise(icookie._psl);
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}
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#include <sys/spl.h>
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#define spldma() _splraise(PSL_S|PSL_IPL6)
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/****************************************************************/
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/*
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* simulated software interrupt register
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*/
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extern volatile u_int8_t ssir;
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#define SIR_NET 0x01
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#define SIR_CLOCK 0x02
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#define SIR_SERIAL 0x04
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#define SIR_DTMGR 0x08
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#define SIR_ADB 0x10
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#define siron(mask) \
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__asm volatile ( "orb %1,%0" : "=m" (ssir) : "i" (mask))
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#define siroff(mask) \
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__asm volatile ( "andb %1,%0" : "=m" (ssir) : "ir" (~(mask)));
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#define setsoftnet() siron(SIR_NET)
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#define setsoftclock() siron(SIR_CLOCK)
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#define setsoftserial() siron(SIR_SERIAL)
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#define setsoftdtmgr() siron(SIR_DTMGR)
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#define setsoftadb() siron(SIR_ADB)
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extern u_long allocate_sir(void (*)(void *),void *);
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extern void init_sir(void);
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/* locore.s */
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int spl0(void);
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@ -118,6 +106,8 @@ extern volatile u_long *intrmask;
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#define INTR_DISABLE(x) (*intrmask &= (~NEXT_I_BIT(x)))
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#define INTR_OCCURRED(x) (*intrstat & NEXT_I_BIT(x))
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#include <m68k/softintr.h>
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#endif /* _KERNEL */
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#endif /* _NEXT68K_INTR_H_ */
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@ -1,6 +1,7 @@
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/* $NetBSD: types.h,v 1.2 2006/09/11 15:07:50 gdamore Exp $ */
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/* $NetBSD: types.h,v 1.3 2007/03/08 16:37:43 tsutsui Exp $ */
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#include <m68k/types.h>
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#define __HAVE_TIMECOUNTER
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#define __HAVE_GENERIC_TODR
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#define __HAVE_GENERIC_SOFT_INTERRUPTS
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#define __HAVE_GENERIC_TODR
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@ -1,4 +1,4 @@
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/* $NetBSD: z8530var.h,v 1.5 2005/12/11 12:18:25 christos Exp $ */
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/* $NetBSD: z8530var.h,v 1.6 2007/03/08 16:37:43 tsutsui Exp $ */
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/*
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* Copyright (c) 1992, 1993
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@ -50,6 +50,7 @@ struct zsc_softc {
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/* Machine-dependent part follows... */
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struct evcnt zsc_intrcnt; /* count interrupts */
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struct zs_chanstate zsc_cs_store[2];
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void *zsc_softintr_cookie;
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};
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/*
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@ -1,4 +1,4 @@
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/* $NetBSD: autoconf.c,v 1.18 2005/12/11 12:18:29 christos Exp $ */
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/* $NetBSD: autoconf.c,v 1.19 2007/03/08 16:37:43 tsutsui Exp $ */
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/*
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* Copyright (c) 1982, 1986, 1990, 1993
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@ -85,7 +85,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: autoconf.c,v 1.18 2005/12/11 12:18:29 christos Exp $");
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__KERNEL_RCSID(0, "$NetBSD: autoconf.c,v 1.19 2007/03/08 16:37:43 tsutsui Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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@ -159,7 +159,7 @@ cpu_configure(void)
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INTR_SETMASK(0);
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init_sir();
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softintr_init();
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if (config_rootfound("mainbus", NULL) == NULL)
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panic("autoconfig failed, no root");
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@ -1,4 +1,4 @@
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/* $NetBSD: isr.c,v 1.22 2005/12/11 12:18:29 christos Exp $ */
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/* $NetBSD: isr.c,v 1.23 2007/03/08 16:37:44 tsutsui Exp $ */
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/*
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* This file was taken from mvme68k/mvme68k/isr.c
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@ -48,7 +48,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: isr.c,v 1.22 2005/12/11 12:18:29 christos Exp $");
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__KERNEL_RCSID(0, "$NetBSD: isr.c,v 1.23 2007/03/08 16:37:44 tsutsui Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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@ -386,36 +386,6 @@ isrdispatch_vectored(int ipl, struct clockframe *frame)
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isr->isr_evcnt->ev_count++;
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}
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/*
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* netisr junk...
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* should use an array of chars instead of
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* a bitmask to avoid atomicity locking issues.
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*/
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void
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netintr(void)
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{
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int n, s;
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s = splhigh();
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n = netisr;
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netisr = 0;
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splx(s);
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#define DONETISR(bit, fn) do { \
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if (n & (1 << bit)) \
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fn(); \
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} while (0)
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s = splsoftnet();
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#include <net/netisr_dispatch.h>
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#undef DONETISR
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splx(s);
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}
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#if 0
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/* ARGSUSED */
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static int
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@ -425,3 +395,25 @@ spurintr(void *arg)
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return (1);
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}
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#endif
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const int ipl2psl_table[NIPL] = {
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[IPL_NONE] = PSL_IPL0,
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[IPL_SOFTCLOCK] = PSL_IPL1,
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[IPL_SOFTNET] = PSL_IPL1,
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[IPL_SOFTSERIAL] = PSL_IPL1,
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[IPL_SOFT] = PSL_IPL1,
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[IPL_BIO] = PSL_IPL3,
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[IPL_NET] = PSL_IPL3,
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[IPL_TTY] = PSL_IPL3,
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[IPL_SERIAL] = PSL_IPL5,
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[IPL_VM] = PSL_IPL6,
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[IPL_CLOCK] = PSL_IPL3, /* ??? */
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[IPL_HIGH] = PSL_IPL7,
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};
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ipl_cookie_t
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makeiplcookie(ipl_t ipl)
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{
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return (ipl_cookie_t){._psl = ipl2psl_table[ipl] | PSL_S};
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}
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@ -1,4 +1,4 @@
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/* $NetBSD: locore.s,v 1.45 2005/12/11 12:18:29 christos Exp $ */
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/* $NetBSD: locore.s,v 1.46 2007/03/08 16:37:44 tsutsui Exp $ */
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/*
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* Copyright (c) 1998 Darrin B. Jewell
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@ -1018,8 +1018,6 @@ Lintrhand_exit:
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* necessitating a stack cleanup.
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*/
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BSS(ssir,1)
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ASENTRY_NOPROFILE(rei)
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tstl _C_LABEL(astpending) | AST pending?
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jeq Lchksir | no, go check for SIR
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@ -1,4 +1,4 @@
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/* $NetBSD: trap.c,v 1.64 2007/03/04 06:00:27 christos Exp $ */
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/* $NetBSD: trap.c,v 1.65 2007/03/08 16:37:44 tsutsui Exp $ */
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/*
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* This file was taken from mvme68k/mvme68k/trap.c
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@ -84,7 +84,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: trap.c,v 1.64 2007/03/04 06:00:27 christos Exp $");
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__KERNEL_RCSID(0, "$NetBSD: trap.c,v 1.65 2007/03/08 16:37:44 tsutsui Exp $");
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#include "opt_ddb.h"
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#include "opt_execfmt.h"
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@ -220,12 +220,6 @@ int mmupid = -1;
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#define MDB_ISPID(p) ((p) == mmupid)
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#endif
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#define NSIR 32
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void (*sir_routines[NSIR])(void *);
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void *sir_args[NSIR];
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int next_sir;
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/*
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* trap and syscall both need the following work done before returning
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* to user mode.
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@ -315,7 +309,6 @@ trap(int type, unsigned code, unsigned v, struct frame frame)
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ksiginfo_t ksi;
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int s;
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u_quad_t sticks = 0 /* XXX initialiser works around compiler bug */;
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int bit;
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static int panicking = 0;
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uvmexp.traps++;
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@ -585,13 +578,9 @@ trap(int type, unsigned code, unsigned v, struct frame frame)
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case T_SSIR: /* software interrupt */
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case T_SSIR|T_USER:
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while ((bit = ffs(ssir))) {
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--bit;
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ssir &= ~(1 << bit);
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uvmexp.softs++;
|
||||
if (sir_routines[bit])
|
||||
sir_routines[bit](sir_args[bit]);
|
||||
}
|
||||
|
||||
softintr_dispatch();
|
||||
|
||||
/*
|
||||
* If this was not an AST trap, we are all done.
|
||||
*/
|
||||
@ -1039,29 +1028,3 @@ dumpwb(int num, u_short s, u_int a, u_int d)
|
||||
}
|
||||
#endif
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Allocation routines for software interrupts.
|
||||
*/
|
||||
u_long
|
||||
allocate_sir(void (*proc)(void *), void *arg)
|
||||
{
|
||||
int bit;
|
||||
|
||||
if( next_sir >= NSIR )
|
||||
panic("allocate_sir: none left");
|
||||
bit = next_sir++;
|
||||
sir_routines[bit] = proc;
|
||||
sir_args[bit] = arg;
|
||||
return (1 << bit);
|
||||
}
|
||||
|
||||
void
|
||||
init_sir(void)
|
||||
{
|
||||
extern void netintr(void);
|
||||
|
||||
sir_routines[0] = (void (*)(void *))netintr;
|
||||
sir_routines[1] = softclock;
|
||||
next_sir = 2;
|
||||
}
|
||||
|
||||
Loading…
Reference in New Issue
Block a user