Provide assembly versions of the clock timing calculation loops that
aren't effected by changes in compiler optimisation. Fixes PR port-mips/26959 from Izumi Tsutsui
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simonb
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0ce7001382
@ -1,4 +1,4 @@
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/* $NetBSD: mips_mcclock.c,v 1.11 2002/03/05 15:54:33 simonb Exp $ */
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/* $NetBSD: mips_mcclock.c,v 1.12 2005/01/01 09:48:39 simonb Exp $ */
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/*
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* Copyright (c) 1997 Jonathan Stone (hereinafter referred to as the author)
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@ -34,7 +34,7 @@
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#include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
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__KERNEL_RCSID(0, "$NetBSD: mips_mcclock.c,v 1.11 2002/03/05 15:54:33 simonb Exp $");
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__KERNEL_RCSID(0, "$NetBSD: mips_mcclock.c,v 1.12 2005/01/01 09:48:39 simonb Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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@ -146,7 +146,7 @@ mips_mcclock_tickloop(mcclock_addr, clockmask)
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void *mcclock_addr;
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int clockmask;
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{
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int iters = 0;
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int iters;
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volatile int junk;
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volatile struct mcclock_pad32_clockdatum *clk = mcclock_addr;
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@ -164,19 +164,12 @@ mips_mcclock_tickloop(mcclock_addr, clockmask)
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junk++; junk++; junk++; junk++;
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/* Count loops until next tick-interrupt request occurs (4ms). */
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if (MIPS_HAS_CLOCK) {
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while ((mips_cp0_cause_read() & clockmask) == 0) {
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__asm __volatile ("nop; nop; nop; nop");
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iters++;
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}
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} else {
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while ((mips_cp0_cause_read() & clockmask) == 0) {
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__asm __volatile ("nop; nop;");
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iters++;
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}
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}
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if (MIPS_HAS_CLOCK)
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iters = mips_mcclock_loop_with_clock(clockmask);
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else
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iters = mips_mcclock_loop_without_clock(clockmask);
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/* Ack the interrupt from the just-gone-off tick */
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/* Ack the interrupt from the just-gone-off tick */
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junk = clk[MC_REGC].datum;
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return (iters);
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@ -1,4 +1,4 @@
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/* $NetBSD: mips_mcclock.h,v 1.3 2002/03/05 14:12:30 simonb Exp $ */
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/* $NetBSD: mips_mcclock.h,v 1.4 2005/01/01 09:48:39 simonb Exp $ */
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/*
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* Copyright (c) 1997 Jonathan Stone (hereinafter referred to as the author)
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@ -40,10 +40,11 @@
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* counting iterations of an loop between successive ticks.
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*/
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unsigned mc_cpuspeed(vaddr_t, int);
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int mips_mcclock_loop_with_clock(int);
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int mips_mcclock_loop_without_clock(int);
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/*
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* CPU speed in MHz, as estimated by mc_cpuspeed(). Read-only.
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*/
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extern int cpu_mhz;
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#endif
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102
sys/arch/mips/mips/mips_mcclock_loop.S
Normal file
102
sys/arch/mips/mips/mips_mcclock_loop.S
Normal file
@ -0,0 +1,102 @@
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/* $NetBSD: mips_mcclock_loop.S,v 1.1 2005/01/01 09:48:39 simonb Exp $ */
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/*
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* Copyright (c) 2005 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Simon Burge.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <mips/asm.h>
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#include <mips/cpuregs.h>
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.set noreorder
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/*
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* Provide assembly versions of the clock timing calculation loops that
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* aren't effected by changes in compiler optimisation.
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*
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* These two functions are not profiled!
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*/
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LEAF_NOPROFILE(mips_mcclock_loop_with_clock)
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subu sp, CALLFRAME_SIZ
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sw s0, 0(sp)
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sw ra, CALLFRAME_RA(sp)
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j 2f
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move s0, zero # iters = 0;
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1:
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.set push
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.set mips32
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ssnop # asm ("ssnop;ssnop;ssnop;ssnop");
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ssnop
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ssnop
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ssnop
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.set pop
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addu s0, 1 # iters++;
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2: jal mips_cp0_cause_read # v0 = mips_cp0_cause_read();
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nop
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and v0, a0 # v0 &= clockmask;
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beqz v0, 1b # if zero then repeat
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move v0, s0 # return iters
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lw ra, CALLFRAME_RA(sp)
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lw s0, 0(sp)
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j ra
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addu sp, CALLFRAME_SIZ
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END(mips_mcclock_loop_with_clock)
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LEAF_NOPROFILE(mips_mcclock_loop_without_clock)
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subu sp, CALLFRAME_SIZ
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sw s0, 0(sp)
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sw ra, CALLFRAME_RA(sp)
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j 2f
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move s0, zero # iters = 0;
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1:
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.set push
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.set mips32
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ssnop # asm ("ssnop;ssnop");
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ssnop
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.set pop
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addu s0, 1 # iters++;
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2: jal mips_cp0_cause_read # v0 = mips_cp0_cause_read();
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nop
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and v0, a0 # v0 &= clockmask;
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beqz v0, 1b # if zero then repeat
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move v0, s0 # return iters
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lw ra, CALLFRAME_RA(sp)
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lw s0, 0(sp)
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j ra
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addu sp, CALLFRAME_SIZ
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END(mips_mcclock_loop_without_clock)
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@ -1,4 +1,4 @@
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# $NetBSD: files.pmax,v 1.107 2003/12/13 23:04:37 ad Exp $
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# $NetBSD: files.pmax,v 1.108 2005/01/01 09:48:39 simonb Exp $
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# DECstation-specific configuration info
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# maxpartitions must be first item in files.${ARCH}.
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@ -81,11 +81,12 @@ device mcclock
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attach mcclock at ioasic with mcclock_ioasic
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attach mcclock at ibus with mcclock_ibus
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file arch/pmax/pmax/clock.c
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file dev/dec/mcclock.c mcclock
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file dev/dec/mcclock_pad32.c mcclock
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file arch/pmax/tc/mcclock_ioasic.c mcclock_ioasic
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file arch/pmax/ibus/mcclock_ibus.c mcclock_ibus
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file arch/mips/mips/mips_mcclock.c mcclock # CPU speed via mcclock
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file dev/dec/mcclock.c mcclock
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file dev/dec/mcclock_pad32.c mcclock
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file arch/pmax/tc/mcclock_ioasic.c mcclock_ioasic
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file arch/pmax/ibus/mcclock_ibus.c mcclock_ibus
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file arch/mips/mips/mips_mcclock.c mcclock # CPU speed via mcclock
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file arch/mips/mips/mips_mcclock_loop.S mcclock # CPU speed via mcclock
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include "dev/scsipi/files.scsipi"
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