split arch/arm/pic/pic.c so that we can implement more efficient version of splfoo() while using pic framework.
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@ -1,4 +1,4 @@
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# $NetBSD: files.gemini,v 1.10 2008/12/14 01:57:02 matt Exp $
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# $NetBSD: files.gemini,v 1.11 2011/03/11 03:16:13 bsh Exp $
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#
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# Configuration info for GEMINI CPU support
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# Based on omap/files.omap2
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@ -38,7 +38,7 @@ file arch/arm/gemini/gemini_dma.c
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##file arch/arm/gemini/gemini_nobyteacc_io.S obio
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# GEMINI interrupt controller
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device geminiicu: pic
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device geminiicu: pic, pic_splfuncs
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attach geminiicu at obio with geminiicu
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file arch/arm/gemini/gemini_icu.c geminiicu needs-flag
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@ -1,4 +1,4 @@
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# $NetBSD: files.imx31,v 1.6 2010/11/15 18:19:19 bsh Exp $
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# $NetBSD: files.imx31,v 1.7 2011/03/11 03:16:13 bsh Exp $
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#
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# Configuration info for the Freescale i.MX31
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#
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@ -23,7 +23,7 @@ file arch/arm/imx/imx31_ahb.c ahb
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# iMX AdVanced Interrupt Controller
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include "arch/arm/pic/files.pic"
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device avic: pic
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device avic: pic, pic_splfuncs
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attach avic at ahb
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file arch/arm/imx/imx31_icu.c avic needs-flag
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file arch/arm/arm32/irq_dispatch.S
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@ -1,4 +1,4 @@
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# $NetBSD: files.imx51,v 1.2 2010/11/30 13:05:27 bsh Exp $
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# $NetBSD: files.imx51,v 1.3 2011/03/11 03:16:13 bsh Exp $
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#
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# Configuration info for the Freescale i.MX51
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#
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@ -18,7 +18,7 @@ file arch/arm/imx/imx51_axi.c axi
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# iMX51 TrustZone Interrupt Controller
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include "arch/arm/pic/files.pic"
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device tzic: pic
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device tzic: pic, pic_splfuncs
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attach tzic at axi
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file arch/arm/imx/imx51_tzic.c tzic needs-flag
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file arch/arm/arm32/irq_dispatch.S
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@ -1,4 +1,4 @@
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# $NetBSD: files.omap2,v 1.7 2011/02/26 18:07:18 ahoka Exp $
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# $NetBSD: files.omap2,v 1.8 2011/03/11 03:16:13 bsh Exp $
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#
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# Configuration info for Texas Instruments OMAP2/OMAP3 CPU support
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# Based on xscale/files.pxa2x0
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@ -32,7 +32,7 @@ file arch/arm/omap/omap_a4x_space.c obio
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file arch/arm/xscale/pxa2x0_a4x_io.S obio
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# OMAP2 interrupt controller
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device omapicu: pic
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device omapicu: pic, pic_splfuncs
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attach omapicu at obio with omap2icu
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file arch/arm/omap/omap2_icu.c (omap2 | omap3) & omapicu
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file arch/arm/omap/omap2430_intr.c omap2 & !omapicu
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@ -1,7 +1,9 @@
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# $NetBSD: files.pic,v 1.2 2008/04/27 18:58:45 matt Exp $
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# $NetBSD: files.pic,v 1.3 2011/03/11 03:16:14 bsh Exp $
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#
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# Configuration info for the common PIC code.
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#
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define pic
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define pic_splfuncs
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file arch/arm/pic/pic.c pic
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file arch/arm/pic/pic_splfuncs.c pic & pic_splfuncs
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@ -1,4 +1,4 @@
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/* $NetBSD: pic.c,v 1.7 2011/02/01 21:44:27 jakllsch Exp $ */
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/* $NetBSD: pic.c,v 1.8 2011/03/11 03:16:14 bsh Exp $ */
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/*-
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* Copyright (c) 2008 The NetBSD Foundation, Inc.
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* All rights reserved.
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@ -28,7 +28,7 @@
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: pic.c,v 1.7 2011/02/01 21:44:27 jakllsch Exp $");
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__KERNEL_RCSID(0, "$NetBSD: pic.c,v 1.8 2011/03/11 03:16:14 bsh Exp $");
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#define _INTR_PRIVATE
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#include <sys/param.h>
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@ -158,7 +158,14 @@ pic_find_pending_irqs_by_ipl(struct pic_softc *pic, size_t irq_base,
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return ipl_irq_mask;
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irq_mask = __BIT(irq);
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KASSERT(pic->pic_sources[irq_base + irq] != NULL);
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#if 1
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KASSERT(pic->pic_sources[irq_base + irq] != NULL);
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#else
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if (pic->pic_sources[irq_base + irq] == NULL) {
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aprint_error("stray interrupt? irq_base=%zu irq=%d\n",
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irq_base, irq);
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} else
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#endif
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if (pic->pic_sources[irq_base + irq]->is_ipl == ipl)
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ipl_irq_mask |= irq_mask;
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@ -521,47 +528,6 @@ pic_disestablish_source(struct intrsource *is)
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free(is, M_INTRSOURCE);
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}
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int
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_splraise(int newipl)
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{
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struct cpu_info * const ci = curcpu();
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const int oldipl = ci->ci_cpl;
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KASSERT(newipl < NIPL);
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if (newipl > ci->ci_cpl)
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ci->ci_cpl = newipl;
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return oldipl;
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}
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int
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_spllower(int newipl)
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{
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struct cpu_info * const ci = curcpu();
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const int oldipl = ci->ci_cpl;
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KASSERT(panicstr || newipl <= ci->ci_cpl);
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if (newipl < ci->ci_cpl) {
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register_t psw = disable_interrupts(I32_bit);
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ci->ci_intr_depth++;
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pic_do_pending_ints(psw, newipl, NULL);
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ci->ci_intr_depth--;
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restore_interrupts(psw);
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}
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return oldipl;
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}
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void
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splx(int savedipl)
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{
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struct cpu_info * const ci = curcpu();
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KASSERT(savedipl < NIPL);
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if (savedipl < ci->ci_cpl) {
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register_t psw = disable_interrupts(I32_bit);
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ci->ci_intr_depth++;
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pic_do_pending_ints(psw, savedipl, NULL);
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ci->ci_intr_depth--;
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restore_interrupts(psw);
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}
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ci->ci_cpl = savedipl;
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}
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void *
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intr_establish(int irq, int ipl, int type, int (*func)(void *), void *arg)
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{
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83
sys/arch/arm/pic/pic_splfuncs.c
Normal file
83
sys/arch/arm/pic/pic_splfuncs.c
Normal file
@ -0,0 +1,83 @@
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/* $NetBSD: pic_splfuncs.c,v 1.1 2011/03/11 03:16:14 bsh Exp $ */
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/*-
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* Copyright (c) 2008 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Matt Thomas.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: pic_splfuncs.c,v 1.1 2011/03/11 03:16:14 bsh Exp $");
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#define _INTR_PRIVATE
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#include <sys/param.h>
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#include <sys/evcnt.h>
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#include <sys/atomic.h>
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#include <sys/malloc.h>
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#include <sys/mallocvar.h>
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#include <sys/atomic.h>
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#include <arm/armreg.h>
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#include <arm/cpu.h>
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#include <arm/cpufunc.h>
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#include <arm/pic/picvar.h>
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int
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_splraise(int newipl)
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{
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struct cpu_info * const ci = curcpu();
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const int oldipl = ci->ci_cpl;
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KASSERT(newipl < NIPL);
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if (newipl > ci->ci_cpl)
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ci->ci_cpl = newipl;
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return oldipl;
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}
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int
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_spllower(int newipl)
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{
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struct cpu_info * const ci = curcpu();
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const int oldipl = ci->ci_cpl;
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KASSERT(panicstr || newipl <= ci->ci_cpl);
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if (newipl < ci->ci_cpl) {
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register_t psw = disable_interrupts(I32_bit);
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pic_do_pending_ints(psw, newipl, NULL);
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restore_interrupts(psw);
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}
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return oldipl;
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}
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void
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splx(int savedipl)
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{
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struct cpu_info * const ci = curcpu();
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KASSERT(savedipl < NIPL);
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if (savedipl < ci->ci_cpl) {
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register_t psw = disable_interrupts(I32_bit);
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pic_do_pending_ints(psw, savedipl, NULL);
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restore_interrupts(psw);
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}
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ci->ci_cpl = savedipl;
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}
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