Use direct DMA with the IOASIC ASC SCSI interface. DMA buffering can be
re-enabled with ASC_IOASIC_BOUNCE. All DMA buffered processing is now done in the bus-specific DMA routines in asc_ioasic.c and asc_tc.c. Disable several informational messages dealing with non-empty FIFO conditions, but allow enabling with ASC_DIAGNOSTIC for troubleshooting.
This commit is contained in:
mhitch
parent
1f7596052f
commit
0ae3de1a27
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@ -1,4 +1,4 @@
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/* $NetBSD: asc.c,v 1.39 1997/06/16 03:46:29 jonathan Exp $ */
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/* $NetBSD: asc.c,v 1.40 1997/07/28 19:39:22 mhitch Exp $ */
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/*-
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* Copyright (c) 1992, 1993
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@ -449,12 +449,12 @@ void asc_minphys __P((struct buf *bp));
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* bus-parent shared attach function
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*/
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void
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ascattach(asc, dmabufsize, bus_speed)
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ascattach(asc, bus_speed)
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register asc_softc_t asc;
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int dmabufsize;
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int bus_speed;
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{
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register asc_regmap_t *regs;
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int id, s, i;
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int id, s;
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int unit;
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@ -521,21 +521,6 @@ ascattach(asc, dmabufsize, bus_speed)
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id = asc->sc_id;
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splx(s);
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/*
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* Statically partition the DMA buffer between targets.
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* This way we will eventually be able to attach/detach
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* drives on-fly. And 18k/target is plenty for normal use.
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*/
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/*
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* Give each target its own DMA buffer region.
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* We may want to try ping ponging buffers later.
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*/
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for (i = 0; i < ASC_NCMD; i++) {
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asc->st[i].dmaBufAddr = asc->buff + dmabufsize * i;
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asc->st[i].dmaBufSize = dmabufsize;
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}
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/* Hack for old-sytle SCSI-device probe */
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(void) pmax_add_scsi(&ascdriver, unit);
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@ -730,12 +715,8 @@ asc_startcmd(asc, target)
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state->script = (script_t *)0;
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state->msg_out = SCSI_NO_OP;
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/*
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* Copy command data to the DMA buffer.
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*/
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len = scsicmd->cmdlen;
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state->dmalen = len;
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bcopy(scsicmd->cmd, state->dmaBufAddr, len);
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/* check for simple SCSI command with no data transfer */
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if ((state->buflen = scsicmd->buflen) == 0) {
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@ -780,7 +761,8 @@ asc_startcmd(asc, target)
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tc_mb();
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/* initialize the DMA */
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(*asc->dma_start)(asc, state, state->dmaBufAddr, ASCDMA_WRITE);
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len = (*asc->dma_start)(asc, state, scsicmd->cmd, ASCDMA_WRITE,
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len, 0);
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ASC_TC_PUT(regs, len);
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readback(regs->asc_cmd);
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@ -1014,14 +996,16 @@ again:
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/* flush any data in the FIFO */
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if (fifo) {
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if (state->flags & DMA_OUT) {
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#if 0
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#ifdef ASC_DIAGNOSTIC
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printf("asc: DMA_OUT, fifo resid %d, len %d, flags 0x%x\n",
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fifo, len, state->flags);
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#endif
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#endif /* ASC_DIAGNOSTIC */
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len += fifo;
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} else if (state->flags & DMA_IN) {
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#ifdef ASC_DIAGNOSTIC
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printf("asc_intr: IN: dmalen %d len %d fifo %d\n",
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state->dmalen, len, fifo); /* XXX */
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#endif /* ASC_DIAGNOSTIC */
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} else
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printf("asc_intr: dmalen %d len %d fifo %d\n",
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state->dmalen, len, fifo); /* XXX */
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@ -1077,8 +1061,8 @@ again:
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len = state->dmalen;
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state->flags &= ~DMA_IN_PROGRESS;
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do_in:
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state->dmalen = len; /* dma_end needs actual length */
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(*asc->dma_end)(asc, state, ASCDMA_READ);
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bcopy(state->dmaBufAddr, state->buf, len);
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state->buf += len;
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state->buflen -= len;
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}
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@ -1448,10 +1432,10 @@ asc_dma_in(asc, status, ss, ir)
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* There may be some bytes in the FIFO if synchonous transfers
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* are in progress.
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*/
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(*asc->dma_end)(asc, state, ASCDMA_READ);
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ASC_TC_GET(regs, len);
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len = state->dmalen - len;
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bcopy(state->dmaBufAddr, state->buf, len);
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state->dmalen = len; /* dma_end may need actual length */
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(*asc->dma_end)(asc, state, ASCDMA_READ);
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state->buf += len;
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state->buflen -= len;
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}
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@ -1472,7 +1456,7 @@ asc_dma_in(asc, status, ss, ir)
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*/
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if (state->sync_offset == 0)
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async_fifo_junk = regs->asc_fifo;
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#ifdef DEBUG
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#ifdef ASC_DIAGNOSTIC
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printf("%s: asc_dma_in: FIFO count %x flags %x sync_offset %d",
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asc->sc_dev.dv_xname, regs->asc_flags,
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state->flags, state->sync_offset);
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@ -1480,10 +1464,10 @@ asc_dma_in(asc, status, ss, ir)
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printf("\n");
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else
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printf(" unexpected fifo data %x\n", async_fifo_junk);
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#ifdef DIAGNOSTIC
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#ifdef DEBUG
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asc_DumpLog("asc_dma_in");
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#endif /* DIAGNOSTIC */
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#endif /* DEBUG */
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#endif /* ASC_DIAGNOSTIC */
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}
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/* setup to start reading the next chunk */
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@ -1494,10 +1478,8 @@ asc_dma_in(asc, status, ss, ir)
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else
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asc_logp[-1].resid = len;
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#endif
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if (len > state->dmaBufSize)
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len = state->dmaBufSize;
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len = (*asc->dma_start)(asc, state, state->buf, ASCDMA_READ, len, 0);
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state->dmalen = len;
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(*asc->dma_start)(asc, state, state->dmaBufAddr, ASCDMA_READ);
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ASC_TC_PUT(regs, len);
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#ifdef DEBUG
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if (asc_debug > 2)
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@ -1525,8 +1507,6 @@ asc_last_dma_in(asc, status, ss, ir)
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register State *state = &asc->st[asc->target];
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register int len, fifo;
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/* copy data from buffer to main memory */
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(*asc->dma_end)(asc, state, ASCDMA_READ);
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ASC_TC_GET(regs, len);
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fifo = regs->asc_flags & ASC_FLAGS_FIFO_CNT;
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#ifdef DEBUG
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@ -1541,8 +1521,9 @@ asc_last_dma_in(asc, status, ss, ir)
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}
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state->flags &= ~DMA_IN_PROGRESS;
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len = state->dmalen - len;
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state->dmalen = len; /* dma_end may need actual length */
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(*asc->dma_end)(asc, state, ASCDMA_READ);
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state->buflen -= len;
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bcopy(state->dmaBufAddr, state->buf, len);
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return (1);
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}
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@ -1565,10 +1546,8 @@ asc_resume_in(asc, status, ss, ir)
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else
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asc_logp[-1].resid = len;
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#endif
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if (len > state->dmaBufSize)
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len = state->dmaBufSize;
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len = (*asc->dma_start)(asc, state, state->buf, ASCDMA_READ, len, 0);
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state->dmalen = len;
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(*asc->dma_start)(asc, state, state->dmaBufAddr, ASCDMA_READ);
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ASC_TC_PUT(regs, len);
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#ifdef DEBUG
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if (asc_debug > 2)
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@ -1603,7 +1582,7 @@ asc_resume_dma_in(asc, status, ss, ir)
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if ((off & 1) && state->sync_offset) {
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printf("asc_resume_dma_in: odd xfer dmalen %d len %d off %d\n",
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state->dmalen, len, off); /* XXX */
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regs->asc_res_fifo = state->dmaBufAddr[off];
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regs->asc_res_fifo = state->buf[off];
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}
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#ifdef DEBUG
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if (asc_logp == asc_log)
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@ -1611,7 +1590,7 @@ asc_resume_dma_in(asc, status, ss, ir)
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else
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asc_logp[-1].resid = len;
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#endif
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(*asc->dma_start)(asc, state, state->dmaBufAddr + off, ASCDMA_READ);
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len = (*asc->dma_start)(asc, state, state->buf + off, ASCDMA_READ, len, off);
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ASC_TC_PUT(regs, len);
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#ifdef DEBUG
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if (asc_debug > 2)
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@ -1670,11 +1649,8 @@ asc_dma_out(asc, status, ss, ir)
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else
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asc_logp[-1].resid = len;
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#endif
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if (len > state->dmaBufSize)
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len = state->dmaBufSize;
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len = (*asc->dma_start)(asc, state, state->buf, ASCDMA_WRITE, len, 0);
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state->dmalen = len;
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bcopy(state->buf, state->dmaBufAddr, len);
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(*asc->dma_start)(asc, state, state->dmaBufAddr, ASCDMA_WRITE);
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ASC_TC_PUT(regs, len);
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#ifdef DEBUG
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if (asc_debug > 2)
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@ -1740,11 +1716,8 @@ asc_resume_out(asc, status, ss, ir)
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else
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asc_logp[-1].resid = len;
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#endif
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if (len > state->dmaBufSize)
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len = state->dmaBufSize;
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len = (*asc->dma_start)(asc, state, state->buf, ASCDMA_WRITE, len, 0);
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state->dmalen = len;
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bcopy(state->buf, state->dmaBufAddr, len);
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(*asc->dma_start)(asc, state, state->dmaBufAddr, ASCDMA_WRITE);
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ASC_TC_PUT(regs, len);
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#ifdef DEBUG
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if (asc_debug > 2)
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@ -1779,7 +1752,7 @@ asc_resume_dma_out(asc, status, ss, ir)
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if (off & 1) {
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printf("asc_resume_dma_out: odd xfer dmalen %d len %d off %d\n",
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state->dmalen, len, off); /* XXX */
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regs->asc_fifo = state->dmaBufAddr[off];
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regs->asc_fifo = state->buf[off];
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off++;
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len--;
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}
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@ -1789,7 +1762,8 @@ asc_resume_dma_out(asc, status, ss, ir)
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else
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asc_logp[-1].resid = len;
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#endif
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(*asc->dma_start)(asc, state, state->dmaBufAddr + off, ASCDMA_WRITE);
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/* XXX may result in redundant copy of data */
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len = (*asc->dma_start)(asc, state, state->buf + off, ASCDMA_WRITE, len, off);
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ASC_TC_PUT(regs, len);
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#ifdef DEBUG
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if (asc_debug > 2)
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@ -2100,7 +2074,6 @@ asc_disconnect(asc, status, ss, ir)
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return (1);
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}
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void
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asc_timeout(arg)
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void *arg;
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@ -1,4 +1,4 @@
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/* $NetBSD: asc_ioasic.c,v 1.10 1997/07/21 05:39:02 jonathan Exp $ */
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/* $NetBSD: asc_ioasic.c,v 1.11 1997/07/28 19:39:25 mhitch Exp $ */
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/*
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* Copyright 1996 The Board of Trustees of The Leland Stanford
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@ -13,6 +13,8 @@
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* express or implied warranty.
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*
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*/
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#define USE_CACHED_BUFFER 0
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/device.h>
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@ -35,6 +37,7 @@
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#include <pmax/pmax/pmaxtype.h>
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extern int pmax_boardtype;
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extern vm_offset_t kvtophys __P((vm_offset_t));
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/*
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* Autoconfiguration data for config.
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@ -50,9 +53,12 @@ struct cfattach asc_ioasic_ca = {
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* DMA callback declarations
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*/
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#ifdef ASC_IOASIC_BOUNCE
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extern u_long asc_iomem;
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static void
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asic_dma_start __P((asc_softc_t asc, State *state, caddr_t cp, int flag));
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#endif
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static int
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asic_dma_start __P((asc_softc_t asc, State *state, caddr_t cp, int flag,
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int len, int off));
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static void
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asic_dma_end __P((asc_softc_t asc, State *state, int flag));
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@ -86,7 +92,10 @@ asc_ioasic_attach(parent, self, aux)
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{
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register struct ioasicdev_attach_args *d = aux;
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register asc_softc_t asc = (asc_softc_t) self;
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int bufsiz;
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#ifdef ASC_IOASIC_BOUNCE
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u_char *buff;
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int i;
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#endif
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void *ascaddr;
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int unit;
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@ -105,9 +114,27 @@ asc_ioasic_attach(parent, self, aux)
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* (2) timing based on turbochannel frequency
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*/
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/* XXX why cached? Device registers must be uncached. */
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asc->buff = (u_char *)MIPS_PHYS_TO_KSEG0(asc_iomem);
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bufsiz = 8192;
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#ifdef ASC_IOASIC_BOUNCE
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#if USE_CACHED_BUFFER
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/* XXX Use cached address for DMA buffer to increase raw read speed */
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buff = (u_char *)MIPS_PHYS_TO_KSEG0(asc_iomem);
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#else
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buff = (u_char *)MIPS_PHYS_TO_KSEG1(asc_iomem);
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#endif /* USE_CACHED_BUFFER */
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/*
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* Statically partition the DMA buffer between targets.
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* This way we will eventually be able to attach/detach
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* drives on-fly. And 18k/target is plenty for normal use.
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*/
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/*
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* Give each target its own DMA buffer region.
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* We may want to try ping ponging buffers later.
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*/
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for (i = 0; i < ASC_NCMD; i++)
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asc->st[i].dmaBufAddr = buff + 8192 * i;
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#endif /* ASC_IOASIC_BOUNCE */
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*((volatile int *)IOASIC_REG_SCSI_DMAPTR(ioasic_base)) = -1;
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*((volatile int *)IOASIC_REG_SCSI_DMANPTR(ioasic_base)) = -1;
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*((volatile int *)IOASIC_REG_SCSI_SCR(ioasic_base)) = 0;
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@ -115,7 +142,7 @@ asc_ioasic_attach(parent, self, aux)
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asc->dma_end = asic_dma_end;
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/* digital meters show IOASIC 53c94s are clocked at approx 25MHz */
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ascattach(asc, bufsiz, ASC_SPEED_25_MHZ);
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ascattach(asc, ASC_SPEED_25_MHZ);
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/* tie pseudo-slot to device */
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@ -128,12 +155,14 @@ asc_ioasic_attach(parent, self, aux)
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* DMA handling routines. For a turbochannel device, just set the dmar.
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* For the I/O ASIC, handle the actual DMA interface.
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*/
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static void
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asic_dma_start(asc, state, cp, flag)
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static int
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asic_dma_start(asc, state, cp, flag, len, off)
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asc_softc_t asc;
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State *state;
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caddr_t cp;
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int flag;
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int len;
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int off;
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{
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register volatile u_int *ssr = (volatile u_int *)
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IOASIC_REG_CSR(ioasic_base);
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@ -143,16 +172,61 @@ asic_dma_start(asc, state, cp, flag)
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*ssr &= ~IOASIC_CSR_DMAEN_SCSI;
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*((volatile int *)IOASIC_REG_SCSI_SCR(ioasic_base)) = 0;
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#ifdef MIPS3
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#ifndef ASC_IOASIC_BOUNCE
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/* restrict len to the maximum the IOASIC can transfer */
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if (len > ((caddr_t)mips_trunc_page(cp + NBPG * 2) - cp))
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len = (caddr_t)mips_trunc_page(cp + NBPG * 2) - cp;
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/* If R4K, writeback and invalidate the buffer */
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if (CPUISMIPS3)
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mips3_HitFlushDCache((vm_offset_t)cp, state->dmalen);
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mips3_HitFlushDCache((vm_offset_t)cp, len);
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/* Get physical address of buffer start, no next phys addr */
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phys = (u_int)kvtophys((vm_offset_t)cp);
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nphys = -1;
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/* Compute 2nd DMA pointer only if next page is part of this I/O */
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if ((NBPG - (phys & (NBPG - 1))) < len) {
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cp = (caddr_t)mips_trunc_page(cp + NBPG);
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nphys = (u_int)kvtophys((vm_offset_t)cp);
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}
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/* If not R4K, need to invalidate cache lines for both physical segments */
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if (!CPUISMIPS3 && flag == ASCDMA_READ) {
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MachFlushDCache(MIPS_PHYS_TO_KSEG0(phys),
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nphys == 0xffffffff ? len : NBPG - (phys & (NBPG - 1)));
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if (nphys != 0xffffffff)
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MachFlushDCache(MIPS_PHYS_TO_KSEG0(nphys),
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NBPG); /* XXX */
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}
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#else /* ASC_IOASIC_BOUNCE */
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/* restrict len to the maximum the IOASIC can transfer */
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if (len > ((caddr_t)mips_trunc_page(state->dmaBufAddr + off + NBPG * 2) - (caddr_t)(state->dmaBufAddr + off)))
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len = (caddr_t)mips_trunc_page(state->dmaBufAddr + off + NBPG * 2) - (caddr_t)(state->dmaBufAddr + off);
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if (flag == ASCDMA_WRITE)
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bcopy(cp, state->dmaBufAddr + off, len);
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cp = state->dmaBufAddr + off;
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#if USE_CACHED_BUFFER
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#ifdef MIPS3
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/* If R4K, need to writeback the bounce buffer */
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if (CPUISMIPS3)
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mips3_HitFlushDCache((vm_offset_t)cp, len);
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#endif /* MIPS3 */
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||||
phys = MIPS_KSEG0_TO_PHYS(cp);
|
||||
cp = (caddr_t)mips_trunc_page(cp + NBPG);
|
||||
nphys = MIPS_KSEG0_TO_PHYS(cp);
|
||||
#else
|
||||
phys = MIPS_KSEG1_TO_PHYS(cp);
|
||||
cp = (caddr_t)mips_trunc_page(cp + NBPG);
|
||||
nphys = MIPS_KSEG1_TO_PHYS(cp);
|
||||
#endif /* USE_CACHED_BUFFER */
|
||||
#endif /* ASC_IOASIC_BOUNCE */
|
||||
|
||||
#ifdef notyet
|
||||
asc->dma_next = cp;
|
||||
asc->dma_xfer = state->dmalen - (nphys - phys);
|
||||
#endif
|
||||
|
||||
*(volatile int *)IOASIC_REG_SCSI_DMAPTR(ioasic_base) =
|
||||
IOASIC_DMA_ADDR(phys);
|
||||
|
|
@ -163,6 +237,7 @@ asic_dma_start(asc, state, cp, flag)
|
|||
else
|
||||
*ssr = (*ssr & ~IOASIC_CSR_SCSI_DIR) | IOASIC_CSR_DMAEN_SCSI;
|
||||
wbflush();
|
||||
return (len);
|
||||
}
|
||||
|
||||
static void
|
||||
|
|
@ -180,12 +255,18 @@ asic_dma_end(asc, state, flag)
|
|||
int nb;
|
||||
|
||||
*ssr &= ~IOASIC_CSR_DMAEN_SCSI;
|
||||
#if USE_CACHED_BUFFER /* XXX - Should uncached address always be used? */
|
||||
to = (u_short *)MIPS_PHYS_TO_KSEG0(*dmap >> 3);
|
||||
#else
|
||||
to = (u_short *)MIPS_PHYS_TO_KSEG1(*dmap >> 3);
|
||||
#endif
|
||||
*dmap = -1;
|
||||
*((volatile int *)IOASIC_REG_SCSI_DMANPTR(ioasic_base)) = -1;
|
||||
wbflush();
|
||||
|
||||
if (flag == ASCDMA_READ) {
|
||||
#if !defined(ASC_IOASIC_BOUNCE) && USE_CACHED_BUFFER
|
||||
/* Invalidate cache for the buffer */
|
||||
#ifdef MIPS3
|
||||
if (CPUISMIPS3)
|
||||
MachFlushDCache(MIPS_KSEG1_TO_PHYS(state->dmaBufAddr),
|
||||
|
|
@ -195,6 +276,7 @@ asic_dma_end(asc, state, flag)
|
|||
MachFlushDCache(MIPS_PHYS_TO_KSEG0(
|
||||
MIPS_KSEG1_TO_PHYS(state->dmaBufAddr)),
|
||||
state->dmalen);
|
||||
#endif /* USE_CACHED_BUFFER */
|
||||
if ( (nb = *((int *)IOASIC_REG_SCSI_SCR(ioasic_base))) != 0) {
|
||||
/* pick up last upto6 bytes, sigh. */
|
||||
|
||||
|
|
@ -210,6 +292,9 @@ asic_dma_end(asc, state, flag)
|
|||
*to++ = w;
|
||||
}
|
||||
}
|
||||
#ifdef ASC_IOASIC_BOUNCE
|
||||
bcopy(state->dmaBufAddr, state->buf, state->dmalen);
|
||||
#endif
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: asc_tc.c,v 1.6 1997/07/21 05:39:05 jonathan Exp $ */
|
||||
/* $NetBSD: asc_tc.c,v 1.7 1997/07/28 19:39:26 mhitch Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright 1996 The Board of Trustees of The Leland Stanford
|
||||
|
|
@ -45,9 +45,9 @@ struct cfattach asc_tc_ca = {
|
|||
* DMA callbacks
|
||||
*/
|
||||
|
||||
static void
|
||||
static int
|
||||
tc_dma_start __P((struct asc_softc *asc, struct scsi_state *state,
|
||||
caddr_t cp, int flag));
|
||||
caddr_t cp, int flag, int len, int off));
|
||||
|
||||
static void
|
||||
tc_dma_end __P((struct asc_softc *asc, struct scsi_state *state,
|
||||
|
|
@ -84,7 +84,8 @@ asc_tc_attach(parent, self, aux)
|
|||
{
|
||||
register struct tc_attach_args *t = aux;
|
||||
register asc_softc_t asc = (asc_softc_t) self;
|
||||
int bufsiz, speed;
|
||||
u_char *buff;
|
||||
int i, speed;
|
||||
|
||||
void *ascaddr;
|
||||
int unit;
|
||||
|
|
@ -108,8 +109,21 @@ asc_tc_attach(parent, self, aux)
|
|||
* Fall through for turbochannel option.
|
||||
*/
|
||||
asc->dmar = (volatile int *)(ascaddr + ASC_OFFSET_DMAR);
|
||||
asc->buff = (u_char *)(ascaddr + ASC_OFFSET_RAM);
|
||||
bufsiz = PER_TGT_DMA_SIZE;
|
||||
buff = (u_char *)(ascaddr + ASC_OFFSET_RAM);
|
||||
|
||||
/*
|
||||
* Statically partition the DMA buffer between targets.
|
||||
* This way we will eventually be able to attach/detach
|
||||
* drives on-fly. And 18k/target is plenty for normal use.
|
||||
*/
|
||||
|
||||
/*
|
||||
* Give each target its own DMA buffer region.
|
||||
* We may want to try ping ponging buffers later.
|
||||
*/
|
||||
for (i = 0; i < ASC_NCMD; i++)
|
||||
asc->st[i].dmaBufAddr = buff + PER_TGT_DMA_SIZE * i;
|
||||
|
||||
asc->dma_start = tc_dma_start;
|
||||
asc->dma_end = tc_dma_end;
|
||||
|
||||
|
|
@ -132,7 +146,7 @@ asc_tc_attach(parent, self, aux)
|
|||
break;
|
||||
};
|
||||
|
||||
ascattach(asc, bufsiz, speed);
|
||||
ascattach(asc, speed);
|
||||
|
||||
/* tie pseudo-slot to device */
|
||||
tc_intr_establish(parent, t->ta_cookie, TC_IPL_BIO,
|
||||
|
|
@ -144,18 +158,25 @@ asc_tc_attach(parent, self, aux)
|
|||
* DMA handling routines. For a turbochannel device, just set the dmar.
|
||||
* For the I/O ASIC, handle the actual DMA interface.
|
||||
*/
|
||||
static void
|
||||
tc_dma_start(asc, state, cp, flag)
|
||||
static int
|
||||
tc_dma_start(asc, state, cp, flag, len, off)
|
||||
asc_softc_t asc;
|
||||
State *state;
|
||||
caddr_t cp;
|
||||
int flag;
|
||||
int len;
|
||||
int off;
|
||||
{
|
||||
|
||||
if (len > PER_TGT_DMA_SIZE)
|
||||
len = PER_TGT_DMA_SIZE;
|
||||
if (flag == ASCDMA_WRITE)
|
||||
*asc->dmar = ASC_DMAR_WRITE | ASC_DMA_ADDR(cp);
|
||||
bcopy(cp, state->dmaBufAddr + off, len);
|
||||
if (flag == ASCDMA_WRITE)
|
||||
*asc->dmar = ASC_DMAR_WRITE | ASC_DMA_ADDR(state->dmaBufAddr + off);
|
||||
else
|
||||
*asc->dmar = ASC_DMA_ADDR(cp);
|
||||
*asc->dmar = ASC_DMA_ADDR(state->dmaBufAddr + off);
|
||||
return (len);
|
||||
}
|
||||
|
||||
static void
|
||||
|
|
@ -164,5 +185,6 @@ tc_dma_end(asc, state, flag)
|
|||
State *state;
|
||||
int flag;
|
||||
{
|
||||
|
||||
if (flag == ASCDMA_READ)
|
||||
bcopy(state->dmaBufAddr, state->buf, state->dmalen);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: ascvar.h,v 1.1 1996/09/25 21:07:56 jonathan Exp $ */
|
||||
/* $NetBSD: ascvar.h,v 1.2 1997/07/28 19:39:27 mhitch Exp $ */
|
||||
|
||||
|
||||
/*
|
||||
|
|
@ -11,7 +11,6 @@ typedef struct scsi_state {
|
|||
int statusByte; /* status byte returned during STATUS_PHASE */
|
||||
int error; /* errno to pass back to device driver */
|
||||
u_char *dmaBufAddr; /* DMA buffer address */
|
||||
u_int dmaBufSize; /* DMA buffer size */
|
||||
int dmalen; /* amount to transfer in this chunk */
|
||||
int dmaresid; /* amount not transfered if chunk suspended */
|
||||
int buflen; /* total remaining amount of data to transfer */
|
||||
|
|
@ -44,7 +43,6 @@ struct asc_softc {
|
|||
struct device sc_dev; /* us as a device */
|
||||
asc_regmap_t *regs; /* chip address */
|
||||
volatile int *dmar; /* DMA address register address */
|
||||
u_char *buff; /* RAM buffer address (uncached) */
|
||||
int sc_id; /* SCSI ID of this interface */
|
||||
int myidmask; /* ~(1 << myid) */
|
||||
int state; /* current SCSI connection state */
|
||||
|
|
@ -53,9 +51,9 @@ struct asc_softc {
|
|||
ScsiCmd *cmd[ASC_NCMD]; /* active command indexed by SCSI ID */
|
||||
State st[ASC_NCMD]; /* state info for each active command */
|
||||
/* Start dma routine */
|
||||
void (*dma_start) __P((struct asc_softc *asc,
|
||||
int (*dma_start) __P((struct asc_softc *asc,
|
||||
struct scsi_state *state,
|
||||
caddr_t cp, int flag));
|
||||
caddr_t cp, int flag, int len, int off));
|
||||
/* End dma routine */
|
||||
void (*dma_end) __P((struct asc_softc *asc,
|
||||
struct scsi_state *state, int flag));
|
||||
|
|
@ -82,7 +80,7 @@ typedef struct asc_softc *asc_softc_t;
|
|||
#define ASC_SPEED_25_MHZ 250
|
||||
#define ASC_SPEED_12_5_MHZ 125
|
||||
|
||||
void ascattach __P((struct asc_softc *asc, int dmabufsiz, int bus_speed));
|
||||
void ascattach __P((struct asc_softc *asc, int bus_speed));
|
||||
int asc_intr __P ((void *asc));
|
||||
|
||||
/*
|
||||
|
|
|
|||
Loading…
Reference in New Issue