Add support for AMD Family 17h.
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maxv
parent
1688ecda31
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0acc4e3e94
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@ -1,4 +1,4 @@
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/* $NetBSD: tprof_x86_amd.c,v 1.2 2018/07/24 09:47:35 maxv Exp $ */
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/* $NetBSD: tprof_x86_amd.c,v 1.3 2019/05/29 17:09:17 maxv Exp $ */
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/*
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* Copyright (c) 2018 The NetBSD Foundation, Inc.
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@ -56,7 +56,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: tprof_x86_amd.c,v 1.2 2018/07/24 09:47:35 maxv Exp $");
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__KERNEL_RCSID(0, "$NetBSD: tprof_x86_amd.c,v 1.3 2019/05/29 17:09:17 maxv Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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@ -205,6 +205,7 @@ tprof_amd_ident(void)
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switch (CPUID_TO_FAMILY(ci->ci_signature)) {
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case 0x10:
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case 0x17:
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return TPROF_IDENT_AMD_GENERIC;
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}
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@ -1,7 +1,7 @@
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/* $NetBSD: tprof_x86.c,v 1.7 2018/11/26 23:20:57 knakahara Exp $ */
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/* $NetBSD: tprof_x86.c,v 1.8 2019/05/29 17:09:18 maxv Exp $ */
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/*
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* Copyright (c) 2018 The NetBSD Foundation, Inc.
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* Copyright (c) 2018-2019 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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@ -654,11 +654,57 @@ static struct event_table amd_f10h = {
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.next = NULL
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};
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static struct event_table *
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init_amd_f10h(void)
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{
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return &amd_f10h;
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}
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/*
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* AMD Family 17h
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*/
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static struct name_to_event amd_f17h_names[] = {
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{ "FpRetx87FpOps", 0x02, __BITS(2,0), true },
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{ "FpRetSseAvxOps", 0x03, __BITS(7,0), true },
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{ "FpRetiredSerOps", 0x05, __BITS(3,0), true },
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{ "LsL1DTlbMiss", 0x45, __BITS(7,0), true },
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{ "LsTableWalker", 0x46, __BITS(3,0), true },
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{ "LsMisalAccesses", 0x47, 0x00, true },
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{ "LsInefSwPref", 0x52, __BITS(1,0), true },
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{ "LsNotHaltedCyc", 0x76, 0x00, true },
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{ "IcFw32", 0x80, 0x00, true },
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{ "IcFw32Miss", 0x81, 0x00, true },
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{ "IcCacheFillL2", 0x82, 0x00, true },
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{ "IcCacheFillSys", 0x83, 0x00, true },
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{ "IcFetchStall", 0x87, __BITS(2,0), true },
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{ "IcCacheInval", 0x8C, __BITS(1,0), true },
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{ "BpL1TlbMissL2Hit", 0x84, 0x00, true },
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{ "BpL1TlbMissL2Miss", 0x85, 0x00, true },
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{ "BpSnpReSync", 0x86, 0x00, true },
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{ "BpL1BTBCorrect", 0x8A, 0x00, true },
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{ "BpL2BTBCorrect", 0x8B, 0x00, true },
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{ "BpTlbRel", 0x99, 0x00, true },
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{ "ExRetInstr", 0xC0, 0x00, true },
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{ "ExRetCops", 0xC1, 0x00, true },
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{ "ExRetBrn", 0xC2, 0x00, true },
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{ "ExRetBrnMisp", 0xC3, 0x00, true },
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{ "ExRetBrnTkn", 0xC4, 0x00, true },
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{ "ExRetBrnTknMisp", 0xC5, 0x00, true },
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{ "ExRetBrnFar", 0xC6, 0x00, true },
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{ "ExRetBrnResync", 0xC7, 0x00, true },
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{ "ExRetBrnIndMisp", 0xCA, 0x00, true },
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{ "ExRetNearRet", 0xC8, 0x00, true },
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{ "ExRetNearRetMispred", 0xC9, 0x00, true },
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{ "ExRetMmxFpInstr@X87", 0xCB, __BIT(0), true },
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{ "ExRetMmxFpInstr@Mmx", 0xCB, __BIT(1), true },
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{ "ExRetMmxFpInstr@Sse", 0xCB, __BIT(2), true },
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{ "ExRetCond", 0xD1, 0x00, true },
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{ "ExRetCondMisp", 0xD2, 0x00, true },
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{ "ExDivBusy", 0xD3, 0x00, true },
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{ "ExDivCount", 0xD4, 0x00, true },
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};
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static struct event_table amd_f17h = {
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.tablename = "AMD Family 17h",
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.names = amd_f17h_names,
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.nevents = sizeof(amd_f17h_names) /
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sizeof(struct name_to_event),
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.next = NULL
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};
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static struct event_table *
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init_amd_generic(void)
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@ -673,7 +719,9 @@ init_amd_generic(void)
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switch (CPUID_TO_FAMILY(eax)) {
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case 0x10:
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return init_amd_f10h();
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return &amd_f10h;
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case 0x17:
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return &amd_f17h;
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}
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return NULL;
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@ -1,4 +1,4 @@
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.\" $NetBSD: tprof.8,v 1.13 2018/11/26 23:20:56 knakahara Exp $
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.\" $NetBSD: tprof.8,v 1.14 2019/05/29 17:09:17 maxv Exp $
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.\"
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.\" Copyright (c)2011 YAMAMOTO Takashi,
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.\" All rights reserved.
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@ -24,7 +24,7 @@
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.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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.\" SUCH DAMAGE.
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.\"
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.Dd November 27, 2018
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.Dd May 29, 2019
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.Dt TPROF 8
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.Os
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.Sh NAME
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@ -130,6 +130,8 @@ ARMv8
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.It
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x86 AMD Family 10h
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.It
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x86 AMD Family 17h
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.It
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x86 Intel Generic (all Intel CPUs)
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.It
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x86 Intel Skylake/Kabylake
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@ -168,7 +170,7 @@ were dropped.
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.An -nosplit
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The
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.Nm
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utility is written by
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utility was written by
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.An YAMAMOTO Takashi .
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It was revamped by
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.An Maxime Villard
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