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Use bus_space_{peek,poke}_4 for pci conf reg access.

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This commit is contained in:
jmcneill 2019-12-07 16:00:36 +00:00
parent 4c82ba64c0
commit 0a25dbfa87
1 changed files with 13 additions and 9 deletions
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22
sys/arch/arm/rockchip/rk3399_pcie.c
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@ -1,4 +1,4 @@
/* $NetBSD: rk3399_pcie.c,v 1.7 2019/11/29 00:36:22 jmcneill Exp $ */
/* $NetBSD: rk3399_pcie.c,v 1.8 2019/12/07 16:00:36 jmcneill Exp $ */
/*
* Copyright (c) 2018 Mark Kettenis <kettenis@openbsd.org>
*
@ -17,7 +17,7 @@
#include <sys/cdefs.h>
__KERNEL_RCSID(1, "$NetBSD: rk3399_pcie.c,v 1.7 2019/11/29 00:36:22 jmcneill Exp $");
__KERNEL_RCSID(1, "$NetBSD: rk3399_pcie.c,v 1.8 2019/12/07 16:00:36 jmcneill Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@ -121,10 +121,10 @@ __KERNEL_RCSID(1, "$NetBSD: rk3399_pcie.c,v 1.7 2019/11/29 00:36:22 jmcneill Exp
bus_space_read_4((sc)->sc_iot, (sc)->sc_ioh, (reg))
#define HWRITE4(sc, reg, val) \
bus_space_write_4((sc)->sc_iot, (sc)->sc_ioh, (reg), (val))
#define AXIREAD4(sc, reg) \
bus_space_read_4((sc)->sc_iot, (sc)->sc_axi_ioh, (reg))
#define AXIWRITE4(sc, reg, val) \
bus_space_write_4((sc)->sc_iot, (sc)->sc_axi_ioh, (reg), (val))
#define AXIPEEK4(sc, reg, valp) \
bus_space_peek_4((sc)->sc_iot, (sc)->sc_axi_ioh, (reg), (valp))
#define AXIPOKE4(sc, reg, val) \
bus_space_poke_4((sc)->sc_iot, (sc)->sc_axi_ioh, (reg), (val))
struct rkpcie_softc {
struct pcihost_softc sc_phsc;
@ -540,8 +540,12 @@ rkpcie_conf_read(void *v, pcitag_t tag, int offset)
if (bus == phsc->sc_bus_min)
return HREAD4(sc, PCIE_RC_NORMAL_BASE + reg);
else
return AXIREAD4(sc, reg);
else {
uint32_t val;
if (AXIPEEK4(sc, reg, &val) != 0)
return 0xffffffff;
return val;
}
}
void
@ -563,7 +567,7 @@ rkpcie_conf_write(void *v, pcitag_t tag, int offset, pcireg_t data)
if (bus == phsc->sc_bus_min)
HWRITE4(sc, PCIE_RC_NORMAL_BASE + reg, data);
else
AXIWRITE4(sc, reg, data);
AXIPOKE4(sc, reg, data);
}
static int