Nowadays some UEFI BIOSes don't enable some PCI devices' address decoding.
To resolve this problem, pci_map.c rev. 1.34-1.36 changed the pci_mapreg_(sub)map()'s to set the decode bit if it's not set. It's good for almost all drivers, but some other drivers don't use pci_mapreg_map(). In drivers which don't use pci_mapreg_map(), some of them expilicitly enable decoding but others don't. Add code to enable decoding to them. See also the following discussion: http://mail-index.netbsd.org/tech-kern/2017/03/22/msg021678.html
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@ -1,4 +1,4 @@
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/* $NetBSD: if_fxp_pci.c,v 1.84 2019/01/23 05:50:34 msaitoh Exp $ */
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/* $NetBSD: if_fxp_pci.c,v 1.85 2019/01/23 06:56:19 msaitoh Exp $ */
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/*-
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* Copyright (c) 1997, 1998, 1999, 2000, 2001 The NetBSD Foundation, Inc.
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@ -36,7 +36,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: if_fxp_pci.c,v 1.84 2019/01/23 05:50:34 msaitoh Exp $");
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__KERNEL_RCSID(0, "$NetBSD: if_fxp_pci.c,v 1.85 2019/01/23 06:56:19 msaitoh Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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@ -302,6 +302,7 @@ fxp_pci_attach(device_t parent, device_t self, void *aux)
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bus_space_handle_t ioh, memh;
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int ioh_valid, memh_valid;
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bus_addr_t addr;
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pcireg_t csr;
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int flags;
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int error;
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char intrbuf[PCI_INTRSTR_LEN];
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@ -350,6 +351,15 @@ fxp_pci_attach(device_t parent, device_t self, void *aux)
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if (memh_valid) {
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sc->sc_st = memt;
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sc->sc_sh = memh;
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/*
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* Enable address decoding for memory range in case BIOS or
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* UEFI didn't set it.
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*/
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csr = pci_conf_read(pa->pa_pc, pa->pa_tag,
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PCI_COMMAND_STATUS_REG);
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csr |= PCI_COMMAND_MEM_ENABLE;
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pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
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csr);
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} else if (ioh_valid) {
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sc->sc_st = iot;
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sc->sc_sh = ioh;
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@ -1,4 +1,4 @@
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/* $NetBSD: ixgbe.c,v 1.170 2018/12/08 14:57:11 msaitoh Exp $ */
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/* $NetBSD: ixgbe.c,v 1.171 2019/01/23 06:56:19 msaitoh Exp $ */
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/******************************************************************************
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@ -3420,7 +3420,7 @@ static int
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ixgbe_allocate_pci_resources(struct adapter *adapter,
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const struct pci_attach_args *pa)
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{
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pcireg_t memtype;
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pcireg_t memtype, csr;
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device_t dev = adapter->dev;
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bus_addr_t addr;
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int flags;
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@ -3445,6 +3445,15 @@ map_err:
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aprint_error_dev(dev, "unable to map BAR0\n");
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return ENXIO;
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}
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/*
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* Enable address decoding for memory range in case BIOS or
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* UEFI don't set it.
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*/
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csr = pci_conf_read(pa->pa_pc, pa->pa_tag,
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PCI_COMMAND_STATUS_REG);
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csr |= PCI_COMMAND_MEM_ENABLE;
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pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
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csr);
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break;
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default:
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aprint_error_dev(dev, "unexpected type on BAR0\n");
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@ -1,4 +1,4 @@
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/*$NetBSD: ixv.c,v 1.107 2018/09/27 05:40:27 msaitoh Exp $*/
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/*$NetBSD: ixv.c,v 1.108 2019/01/23 06:56:19 msaitoh Exp $*/
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/******************************************************************************
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@ -1398,7 +1398,7 @@ static int
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ixv_allocate_pci_resources(struct adapter *adapter,
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const struct pci_attach_args *pa)
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{
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pcireg_t memtype;
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pcireg_t memtype, csr;
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device_t dev = adapter->dev;
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bus_addr_t addr;
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int flags;
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@ -1423,6 +1423,15 @@ map_err:
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aprint_error_dev(dev, "unable to map BAR0\n");
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return ENXIO;
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}
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/*
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* Enable address decoding for memory range in case it's not
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* set.
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*/
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csr = pci_conf_read(pa->pa_pc, pa->pa_tag,
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PCI_COMMAND_STATUS_REG);
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csr |= PCI_COMMAND_MEM_ENABLE;
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pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
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csr);
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break;
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default:
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aprint_error_dev(dev, "unexpected type on BAR0\n");
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@ -1,4 +1,4 @@
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/* $NetBSD: nvme_pci.c,v 1.25 2018/12/07 08:52:43 msaitoh Exp $ */
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/* $NetBSD: nvme_pci.c,v 1.26 2019/01/23 06:56:19 msaitoh Exp $ */
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/* $OpenBSD: nvme_pci.c,v 1.3 2016/04/14 11:18:32 dlg Exp $ */
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/*
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@ -43,7 +43,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: nvme_pci.c,v 1.25 2018/12/07 08:52:43 msaitoh Exp $");
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__KERNEL_RCSID(0, "$NetBSD: nvme_pci.c,v 1.26 2019/01/23 06:56:19 msaitoh Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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@ -160,18 +160,24 @@ nvme_pci_attach(device_t parent, device_t self, void *aux)
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pci_aprint_devinfo(pa, NULL);
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reg = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
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if ((reg & PCI_COMMAND_MASTER_ENABLE) == 0) {
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reg |= PCI_COMMAND_MASTER_ENABLE;
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pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, reg);
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}
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/* Map registers */
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memtype = pci_mapreg_type(pa->pa_pc, pa->pa_tag, NVME_PCI_BAR);
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if (PCI_MAPREG_TYPE(memtype) != PCI_MAPREG_TYPE_MEM) {
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aprint_error_dev(self, "invalid type (type=0x%x)\n", memtype);
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return;
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}
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reg = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
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if (((reg & PCI_COMMAND_MASTER_ENABLE) == 0) ||
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((reg & PCI_COMMAND_MEM_ENABLE) == 0)) {
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/*
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* Enable address decoding for memory range in case BIOS or
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* UEFI didn't set it.
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*/
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reg |= PCI_COMMAND_MASTER_ENABLE | PCI_COMMAND_MEM_ENABLE;
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pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
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reg);
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}
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sc->sc_iot = pa->pa_memt;
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error = pci_mapreg_info(pa->pa_pc, pa->pa_tag, NVME_PCI_BAR,
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memtype, &memaddr, &sc->sc_ios, &flags);
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/* $NetBSD: xhci_pci.c,v 1.20 2019/01/18 07:03:02 skrll Exp $ */
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/* $NetBSD: xhci_pci.c,v 1.21 2019/01/23 06:56:19 msaitoh Exp $ */
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/* OpenBSD: xhci_pci.c,v 1.4 2014/07/12 17:38:51 yuo Exp */
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/*
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@ -32,7 +32,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: xhci_pci.c,v 1.20 2019/01/18 07:03:02 skrll Exp $");
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__KERNEL_RCSID(0, "$NetBSD: xhci_pci.c,v 1.21 2019/01/23 06:56:19 msaitoh Exp $");
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#ifdef _KERNEL_OPT
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#include "opt_xhci_pci.h"
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@ -138,12 +138,17 @@ xhci_pci_attach(device_t parent, device_t self, void *aux)
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/* Check for quirks */
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sc->sc_quirks = 0;
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/* check if memory space access is enabled */
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csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
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if ((csr & PCI_COMMAND_MEM_ENABLE) == 0) {
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sc->sc_ios = 0;
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aprint_error_dev(self, "memory access is disabled\n");
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return;
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/*
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* Enable address decoding for memory range in case BIOS or
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* UEFI didn't set it.
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*/
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csr = pci_conf_read(pa->pa_pc, pa->pa_tag,
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PCI_COMMAND_STATUS_REG);
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csr |= PCI_COMMAND_MEM_ENABLE;
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pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
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csr);
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}
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/* map MMIO registers */
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