No functional change:
- Remove BRGPHY_SERDES_ANAR_* and BRGPHY_SERDES_ANLPAR_*. Those registers are the same as MII_ANAR_* and MII_ANLPAR_*. - Fix typo. - Remove trailing white spaces. - KNF.
This commit is contained in:
msaitoh
parent
275b2ee721
commit
09139aa0b0
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@ -1,4 +1,4 @@
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/* $NetBSD: brgphy.c,v 1.68 2013/10/31 04:26:40 msaitoh Exp $ */
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/* $NetBSD: brgphy.c,v 1.69 2014/06/12 12:09:47 msaitoh Exp $ */
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/*-
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* Copyright (c) 1998, 1999, 2000, 2001 The NetBSD Foundation, Inc.
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@ -62,7 +62,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: brgphy.c,v 1.68 2013/10/31 04:26:40 msaitoh Exp $");
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__KERNEL_RCSID(0, "$NetBSD: brgphy.c,v 1.69 2014/06/12 12:09:47 msaitoh Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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@ -376,9 +376,8 @@ setit:
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if ((ife->ifm_media & IFM_GMASK) == IFM_FDX) {
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speed |= BMCR_FDX;
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gig = GTCR_ADV_1000TFDX;
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} else {
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} else
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gig = GTCR_ADV_1000THDX;
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}
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PHY_WRITE(sc, MII_100T2CR, 0);
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PHY_WRITE(sc, MII_ANAR, ANAR_CSMA);
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@ -635,7 +634,7 @@ brgphy_mii_phy_auto(struct mii_softc *sc)
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if (sc->mii_flags & MIIF_HAVEFIBER) {
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anar = ANAR_X_FD | ANAR_X_HD;
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if (sc->mii_flags & MIIF_DOPAUSE)
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anar |= BRGPHY_SERDES_ANAR_BOTH_PAUSE;
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anar |= ANAR_X_PAUSE_TOWARDS;
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} else {
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anar = BMSR_MEDIA_TO_ANAR(sc->mii_capabilities) | ANAR_CSMA;
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if (sc->mii_flags & MIIF_DOPAUSE)
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@ -645,8 +644,7 @@ brgphy_mii_phy_auto(struct mii_softc *sc)
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DELAY(1000);
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/* Start autonegotiation */
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PHY_WRITE(sc, MII_BMCR,
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BMCR_AUTOEN | BMCR_STARTNEG);
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PHY_WRITE(sc, MII_BMCR, BMCR_AUTOEN | BMCR_STARTNEG);
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PHY_WRITE(sc, BRGPHY_MII_IMR, 0xFF00);
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return (EJUSTRETURN);
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@ -1,4 +1,4 @@
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/* $NetBSD: brgphyreg.h,v 1.6 2013/04/01 13:44:02 msaitoh Exp $ */
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/* $NetBSD: brgphyreg.h,v 1.7 2014/06/12 12:09:47 msaitoh Exp $ */
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/*
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* Copyright (c) 2000
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@ -196,25 +196,6 @@
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#define BRGPHY_IMR_LNK_CHG 0x0002 /* Link status change */
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#define BRGPHY_IMR_CRCERR 0x0001 /* CEC error */
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/*******************************************************/
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/* Begin: Shared SerDes PHY register definitions */
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/*******************************************************/
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/* SerDes autoneg is different from copper */
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#define BRGPHY_SERDES_ANAR_NO_PAUSE (0x0 << 7)
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#define BRGPHY_SERDES_ANAR_SYM_PAUSE (0x1 << 7)
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#define BRGPHY_SERDES_ANAR_ASYM_PAUSE (0x2 << 7)
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#define BRGPHY_SERDES_ANAR_BOTH_PAUSE (0x3 << 7)
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#define BRGPHY_SERDES_ANLPAR_NO_PAUSE (0x0 << 7)
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#define BRGPHY_SERDES_ANLPAR_SYM_PAUSE (0x1 << 7)
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#define BRGPHY_SERDES_ANLPAR_ASYM_PAUSE (0x2 << 7)
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#define BRGPHY_SERDES_ANLPAR_BOTH_PAUSE (0x3 << 7)
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/*******************************************************/
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/* End: Shared SerDes PHY register definitions */
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/*******************************************************/
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/*******************************************************/
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/* Begin: PHY register values for the 5706 PHY */
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/*******************************************************/
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@ -1,4 +1,4 @@
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/* $NetBSD: if_bnx.c,v 1.51 2014/03/29 19:28:24 christos Exp $ */
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/* $NetBSD: if_bnx.c,v 1.52 2014/06/12 12:09:47 msaitoh Exp $ */
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/* $OpenBSD: if_bnx.c,v 1.85 2009/11/09 14:32:41 dlg Exp $ */
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/*-
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@ -35,7 +35,7 @@
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#if 0
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__FBSDID("$FreeBSD: src/sys/dev/bce/if_bce.c,v 1.3 2006/04/13 14:12:26 ru Exp $");
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#endif
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__KERNEL_RCSID(0, "$NetBSD: if_bnx.c,v 1.51 2014/03/29 19:28:24 christos Exp $");
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__KERNEL_RCSID(0, "$NetBSD: if_bnx.c,v 1.52 2014/06/12 12:09:47 msaitoh Exp $");
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/*
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* The following controllers are supported by this driver:
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@ -440,9 +440,9 @@ bnx_probe(device_t parent, cfdata_t match, void *aux)
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struct pci_attach_args *pa = (struct pci_attach_args *)aux;
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if (bnx_lookup(pa) != NULL)
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return (1);
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return 1;
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return (0);
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return 0;
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}
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/****************************************************************************/
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@ -508,7 +508,7 @@ bnx_attach(device_t parent, device_t self, void *aux)
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return;
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}
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memtype = pci_mapreg_type(pa->pa_pc, pa->pa_tag, BNX_PCI_BAR0);
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memtype = pci_mapreg_type(pa->pa_pc, pa->pa_tag, BNX_PCI_BAR0);
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if (pci_mapreg_map(pa, BNX_PCI_BAR0, memtype, 0, &sc->bnx_btag,
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&sc->bnx_bhandle, NULL, &sc->bnx_size)) {
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aprint_error_dev(sc->bnx_dev, "can't find mem space\n");
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@ -739,12 +739,9 @@ bnx_attach(device_t parent, device_t self, void *aux)
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aprint_error_dev(self, "no PHY found!\n");
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ifmedia_add(&sc->bnx_mii.mii_media,
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IFM_ETHER|IFM_MANUAL, 0, NULL);
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ifmedia_set(&sc->bnx_mii.mii_media,
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IFM_ETHER|IFM_MANUAL);
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} else {
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ifmedia_set(&sc->bnx_mii.mii_media,
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IFM_ETHER|IFM_AUTO);
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}
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ifmedia_set(&sc->bnx_mii.mii_media, IFM_ETHER | IFM_MANUAL);
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} else
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ifmedia_set(&sc->bnx_mii.mii_media, IFM_ETHER | IFM_AUTO);
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/* Attach to the Ethernet interface list. */
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if_attach(ifp);
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@ -820,7 +817,7 @@ bnx_detach(device_t dev, int flags)
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DBPRINT(sc, BNX_VERBOSE_RESET, "Exiting %s()\n", __func__);
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return(0);
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return 0;
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}
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/****************************************************************************/
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@ -847,7 +844,7 @@ bnx_reg_rd_ind(struct bnx_softc *sc, u_int32_t offset)
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BNX_PCICFG_REG_WINDOW);
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DBPRINT(sc, BNX_EXCESSIVE, "%s(); offset = 0x%08X, "
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"val = 0x%08X\n", __func__, offset, val);
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return (val);
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return val;
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}
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#else
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return pci_conf_read(pa->pa_pc, pa->pa_tag, BNX_PCICFG_REG_WINDOW);
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@ -937,7 +934,7 @@ bnx_miibus_read_reg(device_t dev, int phy, int reg)
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if (phy != sc->bnx_phy_addr) {
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DBPRINT(sc, BNX_VERBOSE,
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"Invalid PHY address %d for PHY read!\n", phy);
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return(0);
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return 0;
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}
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/*
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@ -1173,10 +1170,10 @@ bnx_acquire_nvram_lock(struct bnx_softc *sc)
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if (j >= NVRAM_TIMEOUT_COUNT) {
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DBPRINT(sc, BNX_WARN, "Timeout acquiring NVRAM lock!\n");
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return (EBUSY);
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return EBUSY;
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}
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return (0);
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return 0;
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}
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/****************************************************************************/
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@ -1210,10 +1207,10 @@ bnx_release_nvram_lock(struct bnx_softc *sc)
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if (j >= NVRAM_TIMEOUT_COUNT) {
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DBPRINT(sc, BNX_WARN, "Timeout reeasing NVRAM lock!\n");
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return (EBUSY);
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return EBUSY;
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}
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return (0);
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return 0;
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}
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#ifdef BNX_NVRAM_WRITE_SUPPORT
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@ -1252,11 +1249,11 @@ bnx_enable_nvram_write(struct bnx_softc *sc)
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if (j >= NVRAM_TIMEOUT_COUNT) {
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DBPRINT(sc, BNX_WARN, "Timeout writing NVRAM!\n");
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return (EBUSY);
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return EBUSY;
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}
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}
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return (0);
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return 0;
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}
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/****************************************************************************/
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@ -1342,7 +1339,7 @@ bnx_nvram_erase_page(struct bnx_softc *sc, u_int32_t offset)
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/* Buffered flash doesn't require an erase. */
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if (ISSET(sc->bnx_flash_info->flags, BNX_NV_BUFFERED))
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return (0);
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return 0;
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DBPRINT(sc, BNX_VERBOSE, "Erasing NVRAM page.\n");
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@ -1351,7 +1348,7 @@ bnx_nvram_erase_page(struct bnx_softc *sc, u_int32_t offset)
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BNX_NVM_COMMAND_DOIT;
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/*
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* Clear the DONE bit separately, set the NVRAM adress to erase,
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* Clear the DONE bit separately, set the NVRAM address to erase,
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* and issue the erase command.
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*/
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REG_WR(sc, BNX_NVM_COMMAND, BNX_NVM_COMMAND_DONE);
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@ -1371,10 +1368,10 @@ bnx_nvram_erase_page(struct bnx_softc *sc, u_int32_t offset)
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if (j >= NVRAM_TIMEOUT_COUNT) {
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DBPRINT(sc, BNX_WARN, "Timeout erasing NVRAM.\n");
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return (EBUSY);
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return EBUSY;
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}
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return (0);
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return 0;
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}
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#endif /* BNX_NVRAM_WRITE_SUPPORT */
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@ -1435,7 +1432,7 @@ bnx_nvram_read_dword(struct bnx_softc *sc, u_int32_t offset,
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rc = EBUSY;
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}
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return(rc);
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return rc;
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}
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#ifdef BNX_NVRAM_WRITE_SUPPORT
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@ -1487,10 +1484,10 @@ bnx_nvram_write_dword(struct bnx_softc *sc, u_int32_t offset, u_int8_t *val,
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if (j >= NVRAM_TIMEOUT_COUNT) {
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BNX_PRINTF(sc, "%s(%d): Timeout error writing NVRAM at "
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"offset 0x%08X\n", __FILE__, __LINE__, offset);
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return (EBUSY);
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return EBUSY;
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}
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return (0);
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return 0;
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}
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#endif /* BNX_NVRAM_WRITE_SUPPORT */
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@ -1565,7 +1562,7 @@ bnx_init_nvram(struct bnx_softc *sc)
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/* Request access to the flash interface. */
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if ((rc = bnx_acquire_nvram_lock(sc)) != 0)
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return (rc);
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return rc;
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/* Reconfigure the flash interface. */
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bnx_enable_nvram_access(sc);
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@ -1603,7 +1600,7 @@ bnx_init_nvram_get_flash_size:
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DBPRINT(sc, BNX_VERBOSE_RESET, "Exiting %s()\n", __func__);
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return (rc);
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return rc;
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}
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/****************************************************************************/
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@ -1623,11 +1620,11 @@ bnx_nvram_read(struct bnx_softc *sc, u_int32_t offset, u_int8_t *ret_buf,
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u_int32_t cmd_flags, offset32, len32, extra;
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if (buf_size == 0)
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return (0);
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return 0;
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/* Request access to the flash interface. */
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if ((rc = bnx_acquire_nvram_lock(sc)) != 0)
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return (rc);
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return rc;
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/* Enable access to flash interface */
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bnx_enable_nvram_access(sc);
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@ -1655,7 +1652,7 @@ bnx_nvram_read(struct bnx_softc *sc, u_int32_t offset, u_int8_t *ret_buf,
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rc = bnx_nvram_read_dword(sc, offset32, buf, cmd_flags);
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if (rc)
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return (rc);
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return rc;
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memcpy(ret_buf, buf + (offset & 3), pre_len);
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@ -1707,7 +1704,7 @@ bnx_nvram_read(struct bnx_softc *sc, u_int32_t offset, u_int8_t *ret_buf,
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}
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if (rc)
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return (rc);
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return rc;
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cmd_flags = BNX_NVM_COMMAND_LAST;
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rc = bnx_nvram_read_dword(sc, offset32, buf, cmd_flags);
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@ -1719,7 +1716,7 @@ bnx_nvram_read(struct bnx_softc *sc, u_int32_t offset, u_int8_t *ret_buf,
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bnx_disable_nvram_access(sc);
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bnx_release_nvram_lock(sc);
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return (rc);
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return rc;
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}
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#ifdef BNX_NVRAM_WRITE_SUPPORT
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@ -1751,7 +1748,7 @@ bnx_nvram_write(struct bnx_softc *sc, u_int32_t offset, u_int8_t *data_buf,
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offset32 &= ~3;
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len32 += align_start;
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if ((rc = bnx_nvram_read(sc, offset32, start, 4)))
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return (rc);
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return rc;
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}
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if (len32 & 3) {
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@ -1759,16 +1756,15 @@ bnx_nvram_write(struct bnx_softc *sc, u_int32_t offset, u_int8_t *data_buf,
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align_end = 4 - (len32 & 3);
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len32 += align_end;
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if ((rc = bnx_nvram_read(sc, offset32 + len32 - 4,
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end, 4))) {
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return (rc);
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}
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end, 4)))
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return rc;
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}
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}
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if (align_start || align_end) {
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buf = malloc(len32, M_DEVBUF, M_NOWAIT);
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if (buf == 0)
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return (ENOMEM);
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return ENOMEM;
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if (align_start)
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memcpy(buf, start, 4);
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@ -1906,7 +1902,7 @@ nvram_write_end:
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if (align_start || align_end)
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free(buf, M_DEVBUF);
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return (rc);
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return rc;
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}
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#endif /* BNX_NVRAM_WRITE_SUPPORT */
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@ -1968,7 +1964,7 @@ bnx_nvram_test(struct bnx_softc *sc)
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}
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bnx_nvram_test_done:
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return (rc);
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return rc;
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}
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/****************************************************************************/
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@ -2122,7 +2118,7 @@ bnx_dma_free(struct bnx_softc *sc)
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if (sc->status_block != NULL && sc->status_map != NULL) {
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bus_dmamap_unload(sc->bnx_dmatag, sc->status_map);
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bus_dmamem_unmap(sc->bnx_dmatag, (void *)sc->status_block,
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BNX_STATUS_BLK_SZ);
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BNX_STATUS_BLK_SZ);
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bus_dmamem_free(sc->bnx_dmatag, &sc->status_seg,
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sc->status_rseg);
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bus_dmamap_destroy(sc->bnx_dmatag, sc->status_map);
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@ -2134,7 +2130,7 @@ bnx_dma_free(struct bnx_softc *sc)
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if (sc->stats_block != NULL && sc->stats_map != NULL) {
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bus_dmamap_unload(sc->bnx_dmatag, sc->stats_map);
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bus_dmamem_unmap(sc->bnx_dmatag, (void *)sc->stats_block,
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BNX_STATS_BLK_SZ);
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BNX_STATS_BLK_SZ);
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bus_dmamem_free(sc->bnx_dmatag, &sc->stats_seg,
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sc->stats_rseg);
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bus_dmamap_destroy(sc->bnx_dmatag, sc->stats_map);
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@ -2488,7 +2484,7 @@ bnx_dma_alloc(struct bnx_softc *sc)
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bnx_dma_alloc_exit:
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DBPRINT(sc, BNX_VERBOSE_RESET, "Exiting %s()\n", __func__);
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return(rc);
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return rc;
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}
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/****************************************************************************/
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@ -2574,7 +2570,7 @@ bnx_fw_sync(struct bnx_softc *sc, u_int32_t msg_data)
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}
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bnx_fw_sync_exit:
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return (rc);
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return rc;
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}
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/****************************************************************************/
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@ -3408,7 +3404,7 @@ bnx_reset(struct bnx_softc *sc, u_int32_t reset_code)
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bnx_reset_exit:
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DBPRINT(sc, BNX_VERBOSE_RESET, "Exiting %s()\n", __func__);
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return (rc);
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return rc;
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}
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int
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|
|
@ -3511,7 +3507,7 @@ bnx_chipinit(struct bnx_softc *sc)
|
|||
bnx_chipinit_exit:
|
||||
DBPRINT(sc, BNX_VERBOSE_RESET, "Exiting %s()\n", __func__);
|
||||
|
||||
return(rc);
|
||||
return rc;
|
||||
}
|
||||
|
||||
/****************************************************************************/
|
||||
|
|
@ -3633,7 +3629,7 @@ bnx_blockinit(struct bnx_softc *sc)
|
|||
bnx_blockinit_exit:
|
||||
DBPRINT(sc, BNX_VERBOSE_RESET, "Exiting %s()\n", __func__);
|
||||
|
||||
return (rc);
|
||||
return rc;
|
||||
}
|
||||
|
||||
static int
|
||||
|
|
@ -3822,7 +3818,7 @@ bnx_get_buf(struct bnx_softc *sc, u_int16_t *prod,
|
|||
DBPRINT(sc, BNX_WARN,
|
||||
"%s(%d): RX mbuf chain allocation failed!\n",
|
||||
__FILE__, __LINE__);
|
||||
|
||||
|
||||
m_freem(m_new);
|
||||
|
||||
DBRUNIF(1, sc->rx_mbuf_alloc--);
|
||||
|
|
@ -3831,7 +3827,7 @@ bnx_get_buf(struct bnx_softc *sc, u_int16_t *prod,
|
|||
rc = ENOBUFS;
|
||||
goto bnx_get_buf_exit;
|
||||
}
|
||||
|
||||
|
||||
rc = bnx_add_buf(sc, m_new, prod, chain_prod, prod_bseq);
|
||||
if (rc != 0)
|
||||
goto bnx_get_buf_exit;
|
||||
|
|
@ -3845,7 +3841,7 @@ bnx_get_buf_exit:
|
|||
DBPRINT(sc, (BNX_VERBOSE_RESET | BNX_VERBOSE_RECV), "Exiting %s()\n",
|
||||
__func__);
|
||||
|
||||
return(rc);
|
||||
return rc;
|
||||
}
|
||||
|
||||
void
|
||||
|
|
@ -4001,7 +3997,7 @@ bnx_init_tx_chain(struct bnx_softc *sc)
|
|||
|
||||
DBPRINT(sc, BNX_VERBOSE_RESET, "Exiting %s()\n", __func__);
|
||||
|
||||
return(rc);
|
||||
return rc;
|
||||
}
|
||||
|
||||
/****************************************************************************/
|
||||
|
|
@ -4189,7 +4185,7 @@ bnx_init_rx_chain(struct bnx_softc *sc)
|
|||
|
||||
DBPRINT(sc, BNX_VERBOSE_RESET, "Exiting %s()\n", __func__);
|
||||
|
||||
return(rc);
|
||||
return rc;
|
||||
}
|
||||
|
||||
/****************************************************************************/
|
||||
|
|
@ -4644,7 +4640,7 @@ bnx_tx_intr(struct bnx_softc *sc)
|
|||
|
||||
DBRUNIF(1, txbd = &sc->tx_bd_chain
|
||||
[TX_PAGE(sw_tx_chain_cons)][TX_IDX(sw_tx_chain_cons)]);
|
||||
|
||||
|
||||
DBRUNIF((txbd == NULL),
|
||||
aprint_error_dev(sc->bnx_dev,
|
||||
"Unexpected NULL tx_bd[0x%04X]!\n", sw_tx_chain_cons);
|
||||
|
|
@ -4835,7 +4831,7 @@ bnx_init_exit:
|
|||
|
||||
splx(s);
|
||||
|
||||
return(error);
|
||||
return error;
|
||||
}
|
||||
|
||||
/****************************************************************************/
|
||||
|
|
@ -4982,7 +4978,7 @@ bnx_tx_encap(struct bnx_softc *sc, struct mbuf *m)
|
|||
sc->tx_prod = prod;
|
||||
sc->tx_prod_bseq = prod_bseq;
|
||||
|
||||
return (0);
|
||||
return 0;
|
||||
|
||||
|
||||
nospace:
|
||||
|
|
@ -4992,7 +4988,7 @@ maperr:
|
|||
TAILQ_INSERT_TAIL(&sc->tx_free_pkts, pkt, pkt_entry);
|
||||
mutex_exit(&sc->tx_pkt_mtx);
|
||||
|
||||
return (ENOMEM);
|
||||
return ENOMEM;
|
||||
}
|
||||
|
||||
/****************************************************************************/
|
||||
|
|
@ -5132,11 +5128,11 @@ bnx_ioctl(struct ifnet *ifp, u_long command, void *data)
|
|||
if (error == ENETRESET) {
|
||||
if (ifp->if_flags & IFF_RUNNING)
|
||||
bnx_iff(sc);
|
||||
error = 0;
|
||||
error = 0;
|
||||
}
|
||||
|
||||
splx(s);
|
||||
return (error);
|
||||
return error;
|
||||
}
|
||||
|
||||
/****************************************************************************/
|
||||
|
|
@ -5209,7 +5205,7 @@ bnx_intr(void *xsc)
|
|||
if ((sc->status_block->status_idx == sc->last_status_idx) &&
|
||||
(REG_RD(sc, BNX_PCICFG_MISC_STATUS) &
|
||||
BNX_PCICFG_MISC_STATUS_INTA_VALUE))
|
||||
return (0);
|
||||
return 0;
|
||||
|
||||
/* Ack the interrupt and stop others from occuring. */
|
||||
REG_WR(sc, BNX_PCICFG_INT_ACK_CMD,
|
||||
|
|
@ -5247,7 +5243,7 @@ bnx_intr(void *xsc)
|
|||
bnx_breakpoint(sc));
|
||||
|
||||
bnx_init(ifp);
|
||||
return (1);
|
||||
return 1;
|
||||
}
|
||||
|
||||
/* Check for any completed RX frames. */
|
||||
|
|
@ -5273,9 +5269,8 @@ bnx_intr(void *xsc)
|
|||
|
||||
/* If there's no work left then exit the isr. */
|
||||
if ((sblk->status_rx_quick_consumer_index0 ==
|
||||
sc->hw_rx_cons) &&
|
||||
(sblk->status_tx_quick_consumer_index0 ==
|
||||
sc->hw_tx_cons))
|
||||
sc->hw_rx_cons) &&
|
||||
(sblk->status_tx_quick_consumer_index0 == sc->hw_tx_cons))
|
||||
break;
|
||||
}
|
||||
|
||||
|
|
@ -5293,7 +5288,7 @@ bnx_intr(void *xsc)
|
|||
if (!IFQ_IS_EMPTY(&ifp->if_snd))
|
||||
bnx_start(ifp);
|
||||
|
||||
return (1);
|
||||
return 1;
|
||||
}
|
||||
|
||||
/****************************************************************************/
|
||||
|
|
|
|||
Loading…
Reference in New Issue