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Cleanup. Move much of the code to bus_space instead of using 

private mechanisms.
This commit is contained in:
matt 2003-03-16 07:05:33 +00:00
parent 7f87f176b2
commit 08ea2a499c
8 changed files with 678 additions and 601 deletions
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11
sys/dev/marvell/files.discovery
View File

@ -1,4 +1,4 @@
# $NetBSD: files.discovery,v 1.1 2003/03/05 22:08:18 matt Exp $ # $NetBSD: files.discovery,v 1.2 2003/03/16 07:05:33 matt Exp $
# #
# Config file and device description for machine-independent support for # Config file and device description for machine-independent support for
# the Moverll (formerly Galileo Technologies) Discovery system controllers. # the Moverll (formerly Galileo Technologies) Discovery system controllers.
@ -22,11 +22,11 @@ defparam opt_marvell.h GT_MPSC_DEFAULT_BAUD_RATE
defparam opt_marvell.h GT_MPP_INTERRUPTS GT_MPP_WATCHDOG GT_BASE defparam opt_marvell.h GT_MPP_INTERRUPTS GT_MPP_WATCHDOG GT_BASE
define gt { [unit = -1] } define gt { [unit = -1] }
device gt: isabus, pcibus, gt device gt: gt
file dev/marvell/gt.c gt file dev/marvell/gt.c gt
# PCI bus # PCI bus
device gtpci: isabus, pcibus, gt device gtpci: isabus, pcibus
attach gtpci at gt attach gtpci at gt
file dev/marvell/gtpci.c gt & pci file dev/marvell/gtpci.c gt & pci
@ -44,3 +44,8 @@ file dev/marvell/gtmpsc.c gtmpsc needs-flag
device gtidma device gtidma
attach gtidma at gt attach gtidma at gt
file dev/marvell/gtidma.c gtidma file dev/marvell/gtidma.c gtidma
define obio { [offset=-1], [size=0], [irq=-1] }
device obio: obio
attach obio at gt
file dev/marvell/obio.c obio

445
sys/dev/marvell/gt.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: gt.c,v 1.2 2003/03/06 06:04:21 matt Exp $ */ /* $NetBSD: gt.c,v 1.3 2003/03/16 07:05:33 matt Exp $ */
/* /*
* Copyright (c) 2002 Allegro Networks, Inc., Wasabi Systems, Inc. * Copyright (c) 2002 Allegro Networks, Inc., Wasabi Systems, Inc.
@ -58,7 +58,6 @@
#include <powerpc/spr.h> #include <powerpc/spr.h>
#include <powerpc/oea/hid.h> #include <powerpc/oea/hid.h>
#include <dev/pci/pcivar.h>
#include <dev/marvell/gtreg.h> #include <dev/marvell/gtreg.h>
#include <dev/marvell/gtintrreg.h> #include <dev/marvell/gtintrreg.h>
#include <dev/marvell/gtvar.h> #include <dev/marvell/gtvar.h>
@ -75,20 +74,20 @@
# error /* conflict: configuration botch! */ # error /* conflict: configuration botch! */
#endif #endif
static void gt_comm_intr_enb (struct gt_softc *); static void gt_comm_intr_enb(struct gt_softc *);
static void gt_devbus_intr_enb (struct gt_softc *); static void gt_devbus_intr_enb(struct gt_softc *);
#ifdef GT_ECC #ifdef GT_ECC
static void gt_ecc_intr_enb (struct gt_softc *); static void gt_ecc_intr_enb(struct gt_softc *);
#endif #endif
void gt_init_hostid (struct gt_softc *); void gt_init_hostid (struct gt_softc *);
void gt_init_interrupt (struct gt_softc *); void gt_init_interrupt (struct gt_softc *);
static int gt_comm_intr (void *); static int gt_comm_intr (void *);
void gt_watchdog_init __P((struct gt_softc *)); void gt_watchdog_init(struct gt_softc *);
void gt_watchdog_enable __P((void)); void gt_watchdog_enable(void);
void gt_watchdog_disable __P((void)); void gt_watchdog_disable(void);
void gt_watchdog_reset __P((void)); void gt_watchdog_reset(void);
extern struct cfdriver gt_cd; extern struct cfdriver gt_cd;
@ -101,29 +100,26 @@ int
gt_cfprint (void *aux, const char *pnp) gt_cfprint (void *aux, const char *pnp)
{ {
struct gt_attach_args *ga = aux; struct gt_attach_args *ga = aux;
struct pcibus_attach_args *pba = aux;
if (pnp) { if (pnp) {
printf("%s at %s", ga->ga_name, pnp); aprint_normal("%s at %s", ga->ga_name, pnp);
} }
if (strcmp(ga->ga_name, "gtpci") == 0) aprint_normal(" unit %d", ga->ga_unit);
printf(" bus %d", pba->pba_pc->pc_md.mdpc_busno);
else
printf(" unit %d", ga->ga_unit);
return (UNCONF); return (UNCONF);
} }
static int static int
gt_config_search(struct device *parent, struct cfdata *cf, void *aux) gt_cfsearch(struct device *parent, struct cfdata *cf, void *aux)
{ {
struct gt_softc *gt = (struct gt_softc *) aux; struct gt_softc *gt = (struct gt_softc *) parent;
struct gt_attach_args ga; struct gt_attach_args ga;
ga.ga_name = cf->cf_name; ga.ga_name = cf->cf_name;
ga.ga_dmat = gt->gt_dmat; ga.ga_dmat = gt->gt_dmat;
ga.ga_memt = gt->gt_memt; ga.ga_memt = gt->gt_memt;
ga.ga_memh = gt->gt_memh;
ga.ga_unit = cf->cf_loc[GTCF_UNIT]; ga.ga_unit = cf->cf_loc[GTCF_UNIT];
if (config_match(parent, cf, &ga) > 0) if (config_match(parent, cf, &ga) > 0)
@ -142,184 +138,181 @@ gt_attach_common(struct gt_softc *gt)
gtfound = 1; gtfound = 1;
gt_setup(&gt->gt_dev); cpumode = gt_read(gt, GT_CPU_Mode);
aprint_normal(": id %d", GT_CPUMode_MultiGTID_GET(cpumode));
cpumode = gt_read(&gt->gt_dev, GT_CPU_Mode);
printf(" (@ 0x%08lx)", (unsigned long) gt);
printf(": id %d", GT_CPUMode_MultiGTID_GET(cpumode));
if (cpumode & GT_CPUMode_MultiGT) if (cpumode & GT_CPUMode_MultiGT)
printf (" (multi)"); aprint_normal (" (multi)");
switch (GT_CPUMode_CPUType_GET(cpumode)) { switch (GT_CPUMode_CPUType_GET(cpumode)) {
case 4: printf(", 60x bus"); break; case 4: aprint_normal(", 60x bus"); break;
case 5: printf(", MPX bus"); break; case 5: aprint_normal(", MPX bus"); break;
default: printf(", %#x(?) bus", GT_CPUMode_CPUType_GET(cpumode)); break; default: aprint_normal(", %#x(?) bus", GT_CPUMode_CPUType_GET(cpumode)); break;
} }
cpumstr = gt_read(&gt->gt_dev, GT_CPU_Master_Ctl); cpumstr = gt_read(gt, GT_CPU_Master_Ctl);
cpumstr &= ~(GT_CPUMstrCtl_CleanBlock|GT_CPUMstrCtl_FlushBlock); cpumstr &= ~(GT_CPUMstrCtl_CleanBlock|GT_CPUMstrCtl_FlushBlock);
#if 0 #if 0
cpumstr |= GT_CPUMstrCtl_CleanBlock|GT_CPUMstrCtl_FlushBlock; cpumstr |= GT_CPUMstrCtl_CleanBlock|GT_CPUMstrCtl_FlushBlock;
#endif #endif
gt_write(&gt->gt_dev, GT_CPU_Master_Ctl, cpumstr); gt_write(gt, GT_CPU_Master_Ctl, cpumstr);
switch (cpumstr & (GT_CPUMstrCtl_CleanBlock|GT_CPUMstrCtl_FlushBlock)) { switch (cpumstr & (GT_CPUMstrCtl_CleanBlock|GT_CPUMstrCtl_FlushBlock)) {
case 0: break; case 0: break;
case GT_CPUMstrCtl_CleanBlock: printf(", snoop=clean"); break; case GT_CPUMstrCtl_CleanBlock: aprint_normal(", snoop=clean"); break;
case GT_CPUMstrCtl_FlushBlock: printf(", snoop=flush"); break; case GT_CPUMstrCtl_FlushBlock: aprint_normal(", snoop=flush"); break;
case GT_CPUMstrCtl_CleanBlock|GT_CPUMstrCtl_FlushBlock: case GT_CPUMstrCtl_CleanBlock|GT_CPUMstrCtl_FlushBlock:
printf(", snoop=clean&flush"); break; aprint_normal(", snoop=clean&flush"); break;
} }
printf(" wdog=%#x,%#x\n", aprint_normal(" wdog=%#x,%#x\n",
gt_read(&gt->gt_dev, GT_WDOG_Config), gt_read(gt, GT_WDOG_Config),
gt_read(&gt->gt_dev, GT_WDOG_Value)); gt_read(gt, GT_WDOG_Value));
#if DEBUG #if DEBUG
loaddr = GT_LowAddr_GET(gt_read(&gt->gt_dev, GT_SCS0_Low_Decode)); loaddr = GT_LowAddr_GET(gt_read(gt, GT_SCS0_Low_Decode));
hiaddr = GT_HighAddr_GET(gt_read(&gt->gt_dev, GT_SCS0_High_Decode)); hiaddr = GT_HighAddr_GET(gt_read(gt, GT_SCS0_High_Decode));
printf("%s: scs[0]=%#10x-%#10x\n", gt->gt_dev.dv_xname, loaddr, hiaddr); aprint_normal("%s: scs[0]=%#10x-%#10x\n", gt->gt_dev.dv_xname, loaddr, hiaddr);
loaddr = GT_LowAddr_GET(gt_read(&gt->gt_dev, GT_SCS1_Low_Decode)); loaddr = GT_LowAddr_GET(gt_read(gt, GT_SCS1_Low_Decode));
hiaddr = GT_HighAddr_GET(gt_read(&gt->gt_dev, GT_SCS1_High_Decode)); hiaddr = GT_HighAddr_GET(gt_read(gt, GT_SCS1_High_Decode));
printf("%s: scs[1]=%#10x-%#10x\n", gt->gt_dev.dv_xname, loaddr, hiaddr); aprint_normal("%s: scs[1]=%#10x-%#10x\n", gt->gt_dev.dv_xname, loaddr, hiaddr);
loaddr = GT_LowAddr_GET(gt_read(&gt->gt_dev, GT_SCS2_Low_Decode)); loaddr = GT_LowAddr_GET(gt_read(gt, GT_SCS2_Low_Decode));
hiaddr = GT_HighAddr_GET(gt_read(&gt->gt_dev, GT_SCS2_High_Decode)); hiaddr = GT_HighAddr_GET(gt_read(gt, GT_SCS2_High_Decode));
printf("%s: scs[2]=%#10x-%#10x\n", gt->gt_dev.dv_xname, loaddr, hiaddr); aprint_normal("%s: scs[2]=%#10x-%#10x\n", gt->gt_dev.dv_xname, loaddr, hiaddr);
loaddr = GT_LowAddr_GET(gt_read(&gt->gt_dev, GT_SCS3_Low_Decode)); loaddr = GT_LowAddr_GET(gt_read(gt, GT_SCS3_Low_Decode));
hiaddr = GT_HighAddr_GET(gt_read(&gt->gt_dev, GT_SCS3_High_Decode)); hiaddr = GT_HighAddr_GET(gt_read(gt, GT_SCS3_High_Decode));
printf("%s: scs[3]=%#10x-%#10x\n", gt->gt_dev.dv_xname, loaddr, hiaddr); aprint_normal("%s: scs[3]=%#10x-%#10x\n", gt->gt_dev.dv_xname, loaddr, hiaddr);
loaddr = GT_LowAddr_GET(gt_read(&gt->gt_dev, GT_CS0_Low_Decode)); loaddr = GT_LowAddr_GET(gt_read(gt, GT_CS0_Low_Decode));
hiaddr = GT_HighAddr_GET(gt_read(&gt->gt_dev, GT_CS0_High_Decode)); hiaddr = GT_HighAddr_GET(gt_read(gt, GT_CS0_High_Decode));
printf("%s: cs[0]=%#10x-%#10x\n", gt->gt_dev.dv_xname, loaddr, hiaddr); aprint_normal("%s: cs[0]=%#10x-%#10x\n", gt->gt_dev.dv_xname, loaddr, hiaddr);
loaddr = GT_LowAddr_GET(gt_read(&gt->gt_dev, GT_CS1_Low_Decode)); loaddr = GT_LowAddr_GET(gt_read(gt, GT_CS1_Low_Decode));
hiaddr = GT_HighAddr_GET(gt_read(&gt->gt_dev, GT_CS1_High_Decode)); hiaddr = GT_HighAddr_GET(gt_read(gt, GT_CS1_High_Decode));
printf("%s: cs[1]=%#10x-%#10x\n", gt->gt_dev.dv_xname, loaddr, hiaddr); aprint_normal("%s: cs[1]=%#10x-%#10x\n", gt->gt_dev.dv_xname, loaddr, hiaddr);
loaddr = GT_LowAddr_GET(gt_read(&gt->gt_dev, GT_CS2_Low_Decode)); loaddr = GT_LowAddr_GET(gt_read(gt, GT_CS2_Low_Decode));
hiaddr = GT_HighAddr_GET(gt_read(&gt->gt_dev, GT_CS2_High_Decode)); hiaddr = GT_HighAddr_GET(gt_read(gt, GT_CS2_High_Decode));
printf("%s: cs[2]=%#10x-%#10x\n", gt->gt_dev.dv_xname, loaddr, hiaddr); aprint_normal("%s: cs[2]=%#10x-%#10x\n", gt->gt_dev.dv_xname, loaddr, hiaddr);
loaddr = GT_LowAddr_GET(gt_read(&gt->gt_dev, GT_CS3_Low_Decode)); loaddr = GT_LowAddr_GET(gt_read(gt, GT_CS3_Low_Decode));
hiaddr = GT_HighAddr_GET(gt_read(&gt->gt_dev, GT_CS3_High_Decode)); hiaddr = GT_HighAddr_GET(gt_read(gt, GT_CS3_High_Decode));
printf("%s: cs[3]=%#10x-%#10x\n", gt->gt_dev.dv_xname, loaddr, hiaddr); aprint_normal("%s: cs[3]=%#10x-%#10x\n", gt->gt_dev.dv_xname, loaddr, hiaddr);
loaddr = GT_LowAddr_GET(gt_read(&gt->gt_dev, GT_BootCS_Low_Decode)); loaddr = GT_LowAddr_GET(gt_read(gt, GT_BootCS_Low_Decode));
hiaddr = GT_HighAddr_GET(gt_read(&gt->gt_dev, GT_BootCS_High_Decode)); hiaddr = GT_HighAddr_GET(gt_read(gt, GT_BootCS_High_Decode));
printf("%s: bootcs=%#10x-%#10x\n", gt->gt_dev.dv_xname, loaddr, hiaddr); aprint_normal("%s: bootcs=%#10x-%#10x\n", gt->gt_dev.dv_xname, loaddr, hiaddr);
loaddr = GT_LowAddr_GET(gt_read(&gt->gt_dev, GT_PCI0_IO_Low_Decode)); loaddr = GT_LowAddr_GET(gt_read(gt, GT_PCI0_IO_Low_Decode));
hiaddr = GT_HighAddr_GET(gt_read(&gt->gt_dev, GT_PCI0_IO_High_Decode)); hiaddr = GT_HighAddr_GET(gt_read(gt, GT_PCI0_IO_High_Decode));
printf("%s: pci0io=%#10x-%#10x ", gt->gt_dev.dv_xname, loaddr, hiaddr); aprint_normal("%s: pci0io=%#10x-%#10x ", gt->gt_dev.dv_xname, loaddr, hiaddr);
loaddr = gt_read(&gt->gt_dev, GT_PCI0_IO_Remap); loaddr = gt_read(gt, GT_PCI0_IO_Remap);
printf("remap=%#010x\n", loaddr); aprint_normal("remap=%#010x\n", loaddr);
loaddr = GT_LowAddr_GET(gt_read(&gt->gt_dev, GT_PCI0_Mem0_Low_Decode)); loaddr = GT_LowAddr_GET(gt_read(gt, GT_PCI0_Mem0_Low_Decode));
hiaddr = GT_HighAddr_GET(gt_read(&gt->gt_dev, GT_PCI0_Mem0_High_Decode)); hiaddr = GT_HighAddr_GET(gt_read(gt, GT_PCI0_Mem0_High_Decode));
printf("%s: pci0mem[0]=%#10x-%#10x ", gt->gt_dev.dv_xname, loaddr, hiaddr); aprint_normal("%s: pci0mem[0]=%#10x-%#10x ", gt->gt_dev.dv_xname, loaddr, hiaddr);
loaddr = gt_read(&gt->gt_dev, GT_PCI0_Mem0_Remap_Low); loaddr = gt_read(gt, GT_PCI0_Mem0_Remap_Low);
hiaddr = gt_read(&gt->gt_dev, GT_PCI0_Mem0_Remap_High); hiaddr = gt_read(gt, GT_PCI0_Mem0_Remap_High);
printf("remap=%#010x.%#010x\n", hiaddr, loaddr); aprint_normal("remap=%#010x.%#010x\n", hiaddr, loaddr);
loaddr = GT_LowAddr_GET(gt_read(&gt->gt_dev, GT_PCI0_Mem1_Low_Decode)); loaddr = GT_LowAddr_GET(gt_read(gt, GT_PCI0_Mem1_Low_Decode));
hiaddr = GT_HighAddr_GET(gt_read(&gt->gt_dev, GT_PCI0_Mem1_High_Decode)); hiaddr = GT_HighAddr_GET(gt_read(gt, GT_PCI0_Mem1_High_Decode));
printf("%s: pci0mem[1]=%#10x-%#10x ", gt->gt_dev.dv_xname, loaddr, hiaddr); aprint_normal("%s: pci0mem[1]=%#10x-%#10x ", gt->gt_dev.dv_xname, loaddr, hiaddr);
loaddr = gt_read(&gt->gt_dev, GT_PCI0_Mem1_Remap_Low); loaddr = gt_read(gt, GT_PCI0_Mem1_Remap_Low);
hiaddr = gt_read(&gt->gt_dev, GT_PCI0_Mem1_Remap_High); hiaddr = gt_read(gt, GT_PCI0_Mem1_Remap_High);
printf("remap=%#010x.%#010x\n", hiaddr, loaddr); aprint_normal("remap=%#010x.%#010x\n", hiaddr, loaddr);
loaddr = GT_LowAddr_GET(gt_read(&gt->gt_dev, GT_PCI0_Mem2_Low_Decode)); loaddr = GT_LowAddr_GET(gt_read(gt, GT_PCI0_Mem2_Low_Decode));
hiaddr = GT_HighAddr_GET(gt_read(&gt->gt_dev, GT_PCI0_Mem2_High_Decode)); hiaddr = GT_HighAddr_GET(gt_read(gt, GT_PCI0_Mem2_High_Decode));
printf("%s: pci0mem[2]=%#10x-%#10x ", gt->gt_dev.dv_xname, loaddr, hiaddr); aprint_normal("%s: pci0mem[2]=%#10x-%#10x ", gt->gt_dev.dv_xname, loaddr, hiaddr);
loaddr = gt_read(&gt->gt_dev, GT_PCI0_Mem2_Remap_Low); loaddr = gt_read(gt, GT_PCI0_Mem2_Remap_Low);
hiaddr = gt_read(&gt->gt_dev, GT_PCI0_Mem2_Remap_High); hiaddr = gt_read(gt, GT_PCI0_Mem2_Remap_High);
printf("remap=%#010x.%#010x\n", hiaddr, loaddr); aprint_normal("remap=%#010x.%#010x\n", hiaddr, loaddr);
loaddr = GT_LowAddr_GET(gt_read(&gt->gt_dev, GT_PCI0_Mem3_Low_Decode)); loaddr = GT_LowAddr_GET(gt_read(gt, GT_PCI0_Mem3_Low_Decode));
hiaddr = GT_HighAddr_GET(gt_read(&gt->gt_dev, GT_PCI0_Mem3_High_Decode)); hiaddr = GT_HighAddr_GET(gt_read(gt, GT_PCI0_Mem3_High_Decode));
printf("%s: pci0mem[3]=%#10x-%#10x ", gt->gt_dev.dv_xname, loaddr, hiaddr); aprint_normal("%s: pci0mem[3]=%#10x-%#10x ", gt->gt_dev.dv_xname, loaddr, hiaddr);
loaddr = gt_read(&gt->gt_dev, GT_PCI0_Mem3_Remap_Low); loaddr = gt_read(gt, GT_PCI0_Mem3_Remap_Low);
hiaddr = gt_read(&gt->gt_dev, GT_PCI0_Mem3_Remap_High); hiaddr = gt_read(gt, GT_PCI0_Mem3_Remap_High);
printf("remap=%#010x.%#010x\n", hiaddr, loaddr); aprint_normal("remap=%#010x.%#010x\n", hiaddr, loaddr);
loaddr = GT_LowAddr_GET(gt_read(&gt->gt_dev, GT_PCI1_IO_Low_Decode)); loaddr = GT_LowAddr_GET(gt_read(gt, GT_PCI1_IO_Low_Decode));
hiaddr = GT_HighAddr_GET(gt_read(&gt->gt_dev, GT_PCI1_IO_High_Decode)); hiaddr = GT_HighAddr_GET(gt_read(gt, GT_PCI1_IO_High_Decode));
printf("%s: pci1io=%#10x-%#10x ", gt->gt_dev.dv_xname, loaddr, hiaddr); aprint_normal("%s: pci1io=%#10x-%#10x ", gt->gt_dev.dv_xname, loaddr, hiaddr);
loaddr = gt_read(&gt->gt_dev, GT_PCI1_IO_Remap); loaddr = gt_read(gt, GT_PCI1_IO_Remap);
printf("remap=%#010x\n", loaddr); aprint_normal("remap=%#010x\n", loaddr);
loaddr = GT_LowAddr_GET(gt_read(&gt->gt_dev, GT_PCI1_Mem0_Low_Decode)); loaddr = GT_LowAddr_GET(gt_read(gt, GT_PCI1_Mem0_Low_Decode));
hiaddr = GT_HighAddr_GET(gt_read(&gt->gt_dev, GT_PCI1_Mem0_High_Decode)); hiaddr = GT_HighAddr_GET(gt_read(gt, GT_PCI1_Mem0_High_Decode));
printf("%s: pci1mem[0]=%#10x-%#10x ", gt->gt_dev.dv_xname, loaddr, hiaddr); aprint_normal("%s: pci1mem[0]=%#10x-%#10x ", gt->gt_dev.dv_xname, loaddr, hiaddr);
loaddr = gt_read(&gt->gt_dev, GT_PCI1_Mem0_Remap_Low); loaddr = gt_read(gt, GT_PCI1_Mem0_Remap_Low);
hiaddr = gt_read(&gt->gt_dev, GT_PCI1_Mem0_Remap_High); hiaddr = gt_read(gt, GT_PCI1_Mem0_Remap_High);
printf("remap=%#010x.%#010x\n", hiaddr, loaddr); aprint_normal("remap=%#010x.%#010x\n", hiaddr, loaddr);
loaddr = GT_LowAddr_GET(gt_read(&gt->gt_dev, GT_PCI1_Mem1_Low_Decode)); loaddr = GT_LowAddr_GET(gt_read(gt, GT_PCI1_Mem1_Low_Decode));
hiaddr = GT_HighAddr_GET(gt_read(&gt->gt_dev, GT_PCI1_Mem1_High_Decode)); hiaddr = GT_HighAddr_GET(gt_read(gt, GT_PCI1_Mem1_High_Decode));
printf("%s: pci1mem[1]=%#10x-%#10x ", gt->gt_dev.dv_xname, loaddr, hiaddr); aprint_normal("%s: pci1mem[1]=%#10x-%#10x ", gt->gt_dev.dv_xname, loaddr, hiaddr);
loaddr = gt_read(&gt->gt_dev, GT_PCI1_Mem1_Remap_Low); loaddr = gt_read(gt, GT_PCI1_Mem1_Remap_Low);
hiaddr = gt_read(&gt->gt_dev, GT_PCI1_Mem1_Remap_High); hiaddr = gt_read(gt, GT_PCI1_Mem1_Remap_High);
printf("remap=%#010x.%#010x\n", hiaddr, loaddr); aprint_normal("remap=%#010x.%#010x\n", hiaddr, loaddr);
loaddr = GT_LowAddr_GET(gt_read(&gt->gt_dev, GT_PCI1_Mem2_Low_Decode)); loaddr = GT_LowAddr_GET(gt_read(gt, GT_PCI1_Mem2_Low_Decode));
hiaddr = GT_HighAddr_GET(gt_read(&gt->gt_dev, GT_PCI1_Mem2_High_Decode)); hiaddr = GT_HighAddr_GET(gt_read(gt, GT_PCI1_Mem2_High_Decode));
printf("%s: pci1mem[2]=%#10x-%#10x ", gt->gt_dev.dv_xname, loaddr, hiaddr); aprint_normal("%s: pci1mem[2]=%#10x-%#10x ", gt->gt_dev.dv_xname, loaddr, hiaddr);
loaddr = gt_read(&gt->gt_dev, GT_PCI1_Mem2_Remap_Low); loaddr = gt_read(gt, GT_PCI1_Mem2_Remap_Low);
hiaddr = gt_read(&gt->gt_dev, GT_PCI1_Mem2_Remap_High); hiaddr = gt_read(gt, GT_PCI1_Mem2_Remap_High);
printf("remap=%#010x.%#010x\n", hiaddr, loaddr); aprint_normal("remap=%#010x.%#010x\n", hiaddr, loaddr);
loaddr = GT_LowAddr_GET(gt_read(&gt->gt_dev, GT_PCI1_Mem3_Low_Decode)); loaddr = GT_LowAddr_GET(gt_read(gt, GT_PCI1_Mem3_Low_Decode));
hiaddr = GT_HighAddr_GET(gt_read(&gt->gt_dev, GT_PCI1_Mem3_High_Decode)); hiaddr = GT_HighAddr_GET(gt_read(gt, GT_PCI1_Mem3_High_Decode));
printf("%s: pci1mem[3]=%#10x-%#10x ", gt->gt_dev.dv_xname, loaddr, hiaddr); aprint_normal("%s: pci1mem[3]=%#10x-%#10x ", gt->gt_dev.dv_xname, loaddr, hiaddr);
loaddr = gt_read(&gt->gt_dev, GT_PCI1_Mem3_Remap_Low); loaddr = gt_read(gt, GT_PCI1_Mem3_Remap_Low);
hiaddr = gt_read(&gt->gt_dev, GT_PCI1_Mem3_Remap_High); hiaddr = gt_read(gt, GT_PCI1_Mem3_Remap_High);
printf("remap=%#010x.%#010x\n", hiaddr, loaddr); aprint_normal("remap=%#010x.%#010x\n", hiaddr, loaddr);
loaddr = GT_LowAddr_GET(gt_read(&gt->gt_dev, GT_Internal_Decode)); loaddr = GT_LowAddr_GET(gt_read(gt, GT_Internal_Decode));
printf("%s: internal=%#10x-%#10x\n", gt->gt_dev.dv_xname, aprint_normal("%s: internal=%#10x-%#10x\n", gt->gt_dev.dv_xname,
loaddr, loaddr+256*1024); loaddr, loaddr+256*1024);
loaddr = GT_LowAddr_GET(gt_read(&gt->gt_dev, GT_CPU0_Low_Decode)); loaddr = GT_LowAddr_GET(gt_read(gt, GT_CPU0_Low_Decode));
hiaddr = GT_HighAddr_GET(gt_read(&gt->gt_dev, GT_CPU0_High_Decode)); hiaddr = GT_HighAddr_GET(gt_read(gt, GT_CPU0_High_Decode));
printf("%s: cpu0=%#10x-%#10x\n", gt->gt_dev.dv_xname, loaddr, hiaddr); aprint_normal("%s: cpu0=%#10x-%#10x\n", gt->gt_dev.dv_xname, loaddr, hiaddr);
loaddr = GT_LowAddr_GET(gt_read(&gt->gt_dev, GT_CPU1_Low_Decode)); loaddr = GT_LowAddr_GET(gt_read(gt, GT_CPU1_Low_Decode));
hiaddr = GT_HighAddr_GET(gt_read(&gt->gt_dev, GT_CPU1_High_Decode)); hiaddr = GT_HighAddr_GET(gt_read(gt, GT_CPU1_High_Decode));
printf("%s: cpu1=%#10x-%#10x", gt->gt_dev.dv_xname, loaddr, hiaddr); aprint_normal("%s: cpu1=%#10x-%#10x", gt->gt_dev.dv_xname, loaddr, hiaddr);
#endif #endif
printf("%s:", gt->gt_dev.dv_xname); aprint_normal("%s:", gt->gt_dev.dv_xname);
cpucfg = gt_read(&gt->gt_dev, GT_CPU_Cfg); cpucfg = gt_read(gt, GT_CPU_Cfg);
cpucfg |= GT_CPUCfg_ConfSBDis; /* per errata #46 */ cpucfg |= GT_CPUCfg_ConfSBDis; /* per errata #46 */
cpucfg |= GT_CPUCfg_AACKDelay; /* per restriction #18 */ cpucfg |= GT_CPUCfg_AACKDelay; /* per restriction #18 */
gt_write(&gt->gt_dev, GT_CPU_Cfg, cpucfg); gt_write(gt, GT_CPU_Cfg, cpucfg);
if (cpucfg & GT_CPUCfg_Pipeline) if (cpucfg & GT_CPUCfg_Pipeline)
printf(" pipeline"); aprint_normal(" pipeline");
if (cpucfg & GT_CPUCfg_AACKDelay) if (cpucfg & GT_CPUCfg_AACKDelay)
printf(" aack-delay"); aprint_normal(" aack-delay");
if (cpucfg & GT_CPUCfg_RdOOO) if (cpucfg & GT_CPUCfg_RdOOO)
printf(" read-ooo"); aprint_normal(" read-ooo");
if (cpucfg & GT_CPUCfg_IOSBDis) if (cpucfg & GT_CPUCfg_IOSBDis)
printf(" io-sb-dis"); aprint_normal(" io-sb-dis");
if (cpucfg & GT_CPUCfg_ConfSBDis) if (cpucfg & GT_CPUCfg_ConfSBDis)
printf(" conf-sb-dis"); aprint_normal(" conf-sb-dis");
if (cpucfg & GT_CPUCfg_ClkSync) if (cpucfg & GT_CPUCfg_ClkSync)
printf(" clk-sync"); aprint_normal(" clk-sync");
printf("\n"); aprint_normal("\n");
gt_init_hostid(gt); gt_init_hostid(gt);
@ -334,7 +327,7 @@ gt_attach_common(struct gt_softc *gt)
gt_comm_intr_enb(gt); gt_comm_intr_enb(gt);
gt_devbus_intr_enb(gt); gt_devbus_intr_enb(gt);
config_search(gt_config_search, &gt->gt_dev, gt); config_search(gt_cfsearch, &gt->gt_dev, NULL);
gt_watchdog_service(); gt_watchdog_service();
} }
@ -355,8 +348,8 @@ gt_init_interrupt(struct gt_softc *gt)
u_int32_t mppsel; u_int32_t mppsel;
u_int32_t regoff; u_int32_t regoff;
gt_write(&gt->gt_dev, ICR_CIM_LO, 0); gt_write(gt, ICR_CIM_LO, 0);
gt_write(&gt->gt_dev, ICR_CIM_HI, 0); gt_write(gt, ICR_CIM_HI, 0);
/* /*
* configure the GPP interrupts: * configure the GPP interrupts:
@ -366,7 +359,7 @@ gt_init_interrupt(struct gt_softc *gt)
#ifdef DEBUG #ifdef DEBUG
printf("%s: mpp cfg ", gt->gt_dev.dv_xname); printf("%s: mpp cfg ", gt->gt_dev.dv_xname);
for (regoff = GT_MPP_Control0; regoff <= GT_MPP_Control3; regoff += 4) for (regoff = GT_MPP_Control0; regoff <= GT_MPP_Control3; regoff += 4)
printf("%#x ", gt_read(&gt->gt_dev, regoff)); printf("%#x ", gt_read(gt, regoff));
printf(", mppirpts 0x%x\n", mppirpts); printf(", mppirpts 0x%x\n", mppirpts);
#endif #endif
mppbit = 0x1; mppbit = 0x1;
@ -378,29 +371,29 @@ gt_init_interrupt(struct gt_softc *gt)
mppbit <<= 1; mppbit <<= 1;
} }
if (mask) { if (mask) {
r = gt_read(&gt->gt_dev, regoff); r = gt_read(gt, regoff);
r &= ~mask; r &= ~mask;
gt_write(&gt->gt_dev, regoff, r); gt_write(gt, regoff, r);
} }
} }
r = gt_read(&gt->gt_dev, GT_GPP_IO_Control); r = gt_read(gt, GT_GPP_IO_Control);
r &= ~mppirpts; r &= ~mppirpts;
gt_write(&gt->gt_dev, GT_GPP_IO_Control, r); gt_write(gt, GT_GPP_IO_Control, r);
r = gt_read(&gt->gt_dev, GT_GPP_Level_Control); r = gt_read(gt, GT_GPP_Level_Control);
r |= mppirpts; r |= mppirpts;
gt_write(&gt->gt_dev, GT_GPP_Level_Control, r); gt_write(gt, GT_GPP_Level_Control, r);
r = gt_read(&gt->gt_dev, GT_GPP_Interrupt_Mask); r = gt_read(gt, GT_GPP_Interrupt_Mask);
r |= mppirpts; r |= mppirpts;
gt_write(&gt->gt_dev, GT_GPP_Interrupt_Mask, r); gt_write(gt, GT_GPP_Interrupt_Mask, r);
} }
uint32_t uint32_t
gt_read_mpp (void) gt_read_mpp (void)
{ {
return gt_read(gt_cd.cd_devs[0], GT_GPP_Value); return gt_read((struct gt_softc *)gt_cd.cd_devs[0], GT_GPP_Value);
} }
#if 0 #if 0
@ -520,9 +513,9 @@ gt_comm_intr(void *arg)
unsigned int mask; unsigned int mask;
int i; int i;
cause = gt_read(&gt->gt_dev, GT_CommUnitIntr_Cause); cause = gt_read(gt, GT_CommUnitIntr_Cause);
gt_write(&gt->gt_dev, GT_CommUnitIntr_Cause, ~cause); gt_write(gt, GT_CommUnitIntr_Cause, ~cause);
addr = gt_read(&gt->gt_dev, GT_CommUnitIntr_ErrAddr); addr = gt_read(gt, GT_CommUnitIntr_ErrAddr);
printf("%s: Comm Unit irpt, cause %#x addr %#x\n", printf("%s: Comm Unit irpt, cause %#x addr %#x\n",
gt->gt_dev.dv_xname, cause, addr); gt->gt_dev.dv_xname, cause, addr);
@ -530,7 +523,7 @@ gt_comm_intr(void *arg)
cause &= GT_CommUnitIntr_DFLT; cause &= GT_CommUnitIntr_DFLT;
if (cause == 0) if (cause == 0)
return 0; return 0;
mask = 0x7; mask = 0x7;
for (i=0; i<7; i++) { for (i=0; i<7; i++) {
if (cause & mask) { if (cause & mask) {
@ -557,11 +550,11 @@ gt_comm_intr_enb(struct gt_softc *gt)
{ {
u_int32_t cause; u_int32_t cause;
cause = gt_read(&gt->gt_dev, GT_CommUnitIntr_Cause); cause = gt_read(gt, GT_CommUnitIntr_Cause);
if (cause) if (cause)
gt_write(&gt->gt_dev, GT_CommUnitIntr_Cause, ~cause); gt_write(gt, GT_CommUnitIntr_Cause, ~cause);
gt_write(&gt->gt_dev, GT_CommUnitIntr_Mask, GT_CommUnitIntr_DFLT); gt_write(gt, GT_CommUnitIntr_Mask, GT_CommUnitIntr_DFLT);
(void)gt_read(&gt->gt_dev, GT_CommUnitIntr_ErrAddr); (void)gt_read(gt, GT_CommUnitIntr_ErrAddr);
intr_establish(IRQ_COMM, IST_LEVEL, IPL_GTERR, gt_comm_intr, gt); intr_establish(IRQ_COMM, IST_LEVEL, IPL_GTERR, gt_comm_intr, gt);
printf("%s: Comm Unit irpt at %d\n", gt->gt_dev.dv_xname, IRQ_COMM); printf("%s: Comm Unit irpt at %d\n", gt->gt_dev.dv_xname, IRQ_COMM);
@ -587,13 +580,13 @@ gt_ecc_intr(void *arg)
u_int32_t count; u_int32_t count;
int err; int err;
count = gt_read(&gt->gt_dev, GT_ECC_Count); count = gt_read(gt, GT_ECC_Count);
dlo = gt_read(&gt->gt_dev, GT_ECC_Data_Lo); dlo = gt_read(gt, GT_ECC_Data_Lo);
dhi = gt_read(&gt->gt_dev, GT_ECC_Data_Hi); dhi = gt_read(gt, GT_ECC_Data_Hi);
rec = gt_read(&gt->gt_dev, GT_ECC_Rec); rec = gt_read(gt, GT_ECC_Rec);
calc = gt_read(&gt->gt_dev, GT_ECC_Calc); calc = gt_read(gt, GT_ECC_Calc);
addr = gt_read(&gt->gt_dev, GT_ECC_Addr); /* read last! */ addr = gt_read(gt, GT_ECC_Addr); /* read last! */
gt_write(&gt->gt_dev, GT_ECC_Addr, 0); /* clear irpt */ gt_write(gt, GT_ECC_Addr, 0); /* clear irpt */
err = addr & 0x3; err = addr & 0x3;
@ -616,15 +609,15 @@ gt_ecc_intr_enb(struct gt_softc *gt)
{ {
u_int32_t ctl; u_int32_t ctl;
ctl = gt_read(&gt->gt_dev, GT_ECC_Ctl); ctl = gt_read(gt, GT_ECC_Ctl);
ctl |= 1 << 16; /* XXX 1-bit threshold == 1 */ ctl |= 1 << 16; /* XXX 1-bit threshold == 1 */
gt_write(&gt->gt_dev, GT_ECC_Ctl, ctl); gt_write(gt, GT_ECC_Ctl, ctl);
(void)gt_read(&gt->gt_dev, GT_ECC_Data_Lo); (void)gt_read(gt, GT_ECC_Data_Lo);
(void)gt_read(&gt->gt_dev, GT_ECC_Data_Hi); (void)gt_read(gt, GT_ECC_Data_Hi);
(void)gt_read(&gt->gt_dev, GT_ECC_Rec); (void)gt_read(gt, GT_ECC_Rec);
(void)gt_read(&gt->gt_dev, GT_ECC_Calc); (void)gt_read(gt, GT_ECC_Calc);
(void)gt_read(&gt->gt_dev, GT_ECC_Addr); /* read last! */ (void)gt_read(gt, GT_ECC_Addr); /* read last! */
gt_write(&gt->gt_dev, GT_ECC_Addr, 0); /* clear irpt */ gt_write(gt, GT_ECC_Addr, 0); /* clear irpt */
intr_establish(IRQ_ECC, IST_LEVEL, IPL_GTERR, gt_ecc_intr, gt); intr_establish(IRQ_ECC, IST_LEVEL, IPL_GTERR, gt_ecc_intr, gt);
printf("%s: ECC irpt at %d\n", gt->gt_dev.dv_xname, IRQ_ECC); printf("%s: ECC irpt at %d\n", gt->gt_dev.dv_xname, IRQ_ECC);
@ -634,23 +627,23 @@ gt_ecc_intr_enb(struct gt_softc *gt)
#ifndef GT_MPP_WATCHDOG #ifndef GT_MPP_WATCHDOG
void void
gt_watchdog_init(struct gt_softc *sc) gt_watchdog_init(struct gt_softc *gt)
{ {
u_int32_t r; u_int32_t r;
unsigned int omsr; unsigned int omsr;
omsr = extintr_disable(); omsr = extintr_disable();
printf("%s: watchdog", sc->gt_dev.dv_xname); printf("%s: watchdog", gt->gt_dev.dv_xname);
/* /*
* handle case where firmware started watchdog * handle case where firmware started watchdog
*/ */
r = gt_read(&sc->gt_dev, GT_WDOG_Config); r = gt_read(gt, GT_WDOG_Config);
printf(" status %#x,%#x:", printf(" status %#x,%#x:",
r, gt_read(&sc->gt_dev, GT_WDOG_Value)); r, gt_read(gt, GT_WDOG_Value));
if ((r & 0x80000000) != 0) { if ((r & 0x80000000) != 0) {
gt_watchdog_sc = sc; /* enabled */ gt_watchdog_sc = gt; /* enabled */
gt_watchdog_state = 1; gt_watchdog_state = 1;
printf(" firmware-enabled\n"); printf(" firmware-enabled\n");
gt_watchdog_service(); gt_watchdog_service();
@ -665,7 +658,7 @@ gt_watchdog_init(struct gt_softc *sc)
#else /* GT_MPP_WATCHDOG */ #else /* GT_MPP_WATCHDOG */
void void
gt_watchdog_init(struct gt_softc *sc) gt_watchdog_init(struct gt_softc *gt)
{ {
u_int32_t mpp_watchdog = GT_MPP_WATCHDOG; /* from config */ u_int32_t mpp_watchdog = GT_MPP_WATCHDOG; /* from config */
u_int32_t r; u_int32_t r;
@ -675,7 +668,7 @@ gt_watchdog_init(struct gt_softc *sc)
u_int32_t regoff; u_int32_t regoff;
unsigned int omsr; unsigned int omsr;
printf("%s: watchdog", sc->gt_dev.dv_xname); printf("%s: watchdog", gt->gt_dev.dv_xname);
if (mpp_watchdog == 0) { if (mpp_watchdog == 0) {
printf(" not configured\n"); printf(" not configured\n");
@ -699,20 +692,20 @@ gt_watchdog_init(struct gt_softc *sc)
* in both the GT_WDOG_Config_Enb and GT_WDOG_Value regsiters. * in both the GT_WDOG_Config_Enb and GT_WDOG_Value regsiters.
* Use AFW-supplied flag to determine run state. * Use AFW-supplied flag to determine run state.
*/ */
r = gt_read(&sc->gt_dev, GT_WDOG_Config); r = gt_read(gt, GT_WDOG_Config);
if (r != ~0) { if (r != ~0) {
if ((r & GT_WDOG_Config_Enb) != 0) { if ((r & GT_WDOG_Config_Enb) != 0) {
gt_write(&sc->gt_dev, GT_WDOG_Config, gt_write(gt, GT_WDOG_Config,
(GT_WDOG_Config_Ctl1a | GT_WDOG_Preset_DFLT)); (GT_WDOG_Config_Ctl1a | GT_WDOG_Preset_DFLT));
gt_write(&sc->gt_dev, GT_WDOG_Config, gt_write(gt, GT_WDOG_Config,
(GT_WDOG_Config_Ctl1b | GT_WDOG_Preset_DFLT)); (GT_WDOG_Config_Ctl1b | GT_WDOG_Preset_DFLT));
} }
} else { } else {
#if 0 #if 0
if (afw_wdog_state == 1) { if (afw_wdog_state == 1) {
gt_write(&sc->gt_dev, GT_WDOG_Config, gt_write(gt, GT_WDOG_Config,
(GT_WDOG_Config_Ctl1a | GT_WDOG_Preset_DFLT)); (GT_WDOG_Config_Ctl1a | GT_WDOG_Preset_DFLT));
gt_write(&sc->gt_dev, GT_WDOG_Config, gt_write(gt, GT_WDOG_Config,
(GT_WDOG_Config_Ctl1b | GT_WDOG_Preset_DFLT)); (GT_WDOG_Config_Ctl1b | GT_WDOG_Preset_DFLT));
} }
#endif #endif
@ -744,29 +737,29 @@ gt_watchdog_init(struct gt_softc *sc)
return; return;
} }
r = gt_read(&sc->gt_dev, regoff); r = gt_read(gt, regoff);
r &= ~mppmask; r &= ~mppmask;
r |= mppbits; r |= mppbits;
gt_write(&sc->gt_dev, regoff, r); gt_write(gt, regoff, r);
printf(" mpp %#x %#x", regoff, mppbits); printf(" mpp %#x %#x", regoff, mppbits);
gt_write(&sc->gt_dev, GT_WDOG_Value, GT_WDOG_NMI_DFLT); gt_write(gt, GT_WDOG_Value, GT_WDOG_NMI_DFLT);
gt_write(&sc->gt_dev, GT_WDOG_Config, gt_write(gt, GT_WDOG_Config,
(GT_WDOG_Config_Ctl1a | GT_WDOG_Preset_DFLT)); (GT_WDOG_Config_Ctl1a | GT_WDOG_Preset_DFLT));
gt_write(&sc->gt_dev, GT_WDOG_Config, gt_write(gt, GT_WDOG_Config,
(GT_WDOG_Config_Ctl1b | GT_WDOG_Preset_DFLT)); (GT_WDOG_Config_Ctl1b | GT_WDOG_Preset_DFLT));
r = gt_read(&sc->gt_dev, GT_WDOG_Config), r = gt_read(gt, GT_WDOG_Config),
printf(" status %#x,%#x: %s", printf(" status %#x,%#x: %s",
r, gt_read(&sc->gt_dev, GT_WDOG_Value), r, gt_read(gt, GT_WDOG_Value),
((r & GT_WDOG_Config_Enb) != 0) ? "enabled" : "botch"); ((r & GT_WDOG_Config_Enb) != 0) ? "enabled" : "botch");
if ((r & GT_WDOG_Config_Enb) != 0) { if ((r & GT_WDOG_Config_Enb) != 0) {
register_t hid0; register_t hid0;
gt_watchdog_sc = sc; /* enabled */ gt_watchdog_sc = gt; /* enabled */
gt_watchdog_state = 1; gt_watchdog_state = 1;
/* /*
@ -802,17 +795,17 @@ hid0_print()
void void
gt_watchdog_enable(void) gt_watchdog_enable(void)
{ {
struct gt_softc *sc; struct gt_softc *gt;
unsigned int omsr; unsigned int omsr;
omsr = extintr_disable(); omsr = extintr_disable();
sc = gt_watchdog_sc; gt = gt_watchdog_sc;
if ((sc != NULL) && (gt_watchdog_state == 0)) { if ((gt != NULL) && (gt_watchdog_state == 0)) {
gt_watchdog_state = 1; gt_watchdog_state = 1;
gt_write(&sc->gt_dev, GT_WDOG_Config, gt_write(gt, GT_WDOG_Config,
(GT_WDOG_Config_Ctl1a | GT_WDOG_Preset_DFLT)); (GT_WDOG_Config_Ctl1a | GT_WDOG_Preset_DFLT));
gt_write(&sc->gt_dev, GT_WDOG_Config, gt_write(gt, GT_WDOG_Config,
(GT_WDOG_Config_Ctl1b | GT_WDOG_Preset_DFLT)); (GT_WDOG_Config_Ctl1b | GT_WDOG_Preset_DFLT));
} }
extintr_restore(omsr); extintr_restore(omsr);
@ -821,17 +814,17 @@ gt_watchdog_enable(void)
void void
gt_watchdog_disable(void) gt_watchdog_disable(void)
{ {
struct gt_softc *sc; struct gt_softc *gt;
unsigned int omsr; unsigned int omsr;
omsr = extintr_disable(); omsr = extintr_disable();
sc = gt_watchdog_sc; gt = gt_watchdog_sc;
if ((sc != NULL) && (gt_watchdog_state != 0)) { if ((gt != NULL) && (gt_watchdog_state != 0)) {
gt_watchdog_state = 0; gt_watchdog_state = 0;
gt_write(&sc->gt_dev, GT_WDOG_Config, gt_write(gt, GT_WDOG_Config,
(GT_WDOG_Config_Ctl1a | GT_WDOG_Preset_DFLT)); (GT_WDOG_Config_Ctl1a | GT_WDOG_Preset_DFLT));
gt_write(&sc->gt_dev, GT_WDOG_Config, gt_write(gt, GT_WDOG_Config,
(GT_WDOG_Config_Ctl1b | GT_WDOG_Preset_DFLT)); (GT_WDOG_Config_Ctl1b | GT_WDOG_Preset_DFLT));
} }
extintr_restore(omsr); extintr_restore(omsr);
@ -843,18 +836,18 @@ int inhibit_watchdog_service = 0;
void void
gt_watchdog_service(void) gt_watchdog_service(void)
{ {
struct gt_softc *sc = gt_watchdog_sc; struct gt_softc *gt = gt_watchdog_sc;
if ((sc == NULL) || (gt_watchdog_state == 0)) if ((gt == NULL) || (gt_watchdog_state == 0))
return; /* not enabled */ return; /* not enabled */
#ifdef DEBUG #ifdef DEBUG
if (inhibit_watchdog_service) if (inhibit_watchdog_service)
return; return;
#endif #endif
gt_write(&sc->gt_dev, GT_WDOG_Config, gt_write(gt, GT_WDOG_Config,
(GT_WDOG_Config_Ctl2a | GT_WDOG_Preset_DFLT)); (GT_WDOG_Config_Ctl2a | GT_WDOG_Preset_DFLT));
gt_write(&sc->gt_dev, GT_WDOG_Config, gt_write(gt, GT_WDOG_Config,
(GT_WDOG_Config_Ctl2b | GT_WDOG_Preset_DFLT)); (GT_WDOG_Config_Ctl2b | GT_WDOG_Preset_DFLT));
} }
@ -864,20 +857,20 @@ gt_watchdog_service(void)
void void
gt_watchdog_reset() gt_watchdog_reset()
{ {
struct gt_softc *sc = gt_watchdog_sc; struct gt_softc *gt = gt_watchdog_sc;
u_int32_t r; u_int32_t r;
(void)extintr_disable(); (void)extintr_disable();
r = gt_read(&sc->gt_dev, GT_WDOG_Config); r = gt_read(gt, GT_WDOG_Config);
gt_write(&sc->gt_dev, GT_WDOG_Config, (GT_WDOG_Config_Ctl1a | 0)); gt_write(gt, GT_WDOG_Config, (GT_WDOG_Config_Ctl1a | 0));
gt_write(&sc->gt_dev, GT_WDOG_Config, (GT_WDOG_Config_Ctl1b | 0)); gt_write(gt, GT_WDOG_Config, (GT_WDOG_Config_Ctl1b | 0));
if ((r & GT_WDOG_Config_Enb) != 0) { if ((r & GT_WDOG_Config_Enb) != 0) {
/* /*
* was enabled, we just toggled it off, toggle on again * was enabled, we just toggled it off, toggle on again
*/ */
gt_write(&sc->gt_dev, GT_WDOG_Config, gt_write(gt, GT_WDOG_Config,
(GT_WDOG_Config_Ctl1a | 0)); (GT_WDOG_Config_Ctl1a | 0));
gt_write(&sc->gt_dev, GT_WDOG_Config, gt_write(gt, GT_WDOG_Config,
(GT_WDOG_Config_Ctl1b | 0)); (GT_WDOG_Config_Ctl1b | 0));
} }
for(;;); for(;;);
@ -890,9 +883,9 @@ gt_devbus_intr(void *arg)
u_int32_t cause; u_int32_t cause;
u_int32_t addr; u_int32_t addr;
cause = gt_read(&gt->gt_dev, GT_DEVBUS_ICAUSE); cause = gt_read(gt, GT_DEVBUS_ICAUSE);
addr = gt_read(&gt->gt_dev, GT_DEVBUS_ERR_ADDR); addr = gt_read(gt, GT_DEVBUS_ERR_ADDR);
gt_write(&gt->gt_dev, GT_DEVBUS_ICAUSE, 0); /* clear irpt */ gt_write(gt, GT_DEVBUS_ICAUSE, 0); /* clear irpt */
if (cause & GT_DEVBUS_DBurstErr) { if (cause & GT_DEVBUS_DBurstErr) {
printf("%s: Device Bus error: burst violation", printf("%s: Device Bus error: burst violation",
@ -918,10 +911,10 @@ gt_devbus_intr(void *arg)
static void static void
gt_devbus_intr_enb(struct gt_softc *gt) gt_devbus_intr_enb(struct gt_softc *gt)
{ {
gt_write(&gt->gt_dev, GT_DEVBUS_IMASK, gt_write(gt, GT_DEVBUS_IMASK,
GT_DEVBUS_DBurstErr|GT_DEVBUS_DRdyErr); GT_DEVBUS_DBurstErr|GT_DEVBUS_DRdyErr);
(void)gt_read(&gt->gt_dev, GT_DEVBUS_ERR_ADDR); /* clear addr */ (void)gt_read(gt, GT_DEVBUS_ERR_ADDR); /* clear addr */
gt_write(&gt->gt_dev, GT_ECC_Addr, 0); /* clear irpt */ gt_write(gt, GT_ECC_Addr, 0); /* clear irpt */
intr_establish(IRQ_DEV, IST_LEVEL, IPL_GTERR, gt_devbus_intr, gt); intr_establish(IRQ_DEV, IST_LEVEL, IPL_GTERR, gt_devbus_intr, gt);
printf("%s: Device Bus Error irpt at %d\n", printf("%s: Device Bus Error irpt at %d\n",
@ -936,12 +929,13 @@ gt_mii_read(
int phy, int phy,
int reg) int reg)
{ {
struct gt_softc * const gt = (struct gt_softc *) parent;
uint32_t data; uint32_t data;
int count = 10000; int count = 10000;
do { do {
DELAY(10); DELAY(10);
data = gt_read(parent, ETH_ESMIR); data = gt_read(gt, ETH_ESMIR);
} while ((data & ETH_ESMIR_Busy) && count-- > 0); } while ((data & ETH_ESMIR_Busy) && count-- > 0);
if (count == 0) { if (count == 0) {
@ -950,12 +944,12 @@ gt_mii_read(
return ETH_ESMIR_Value_GET(data); return ETH_ESMIR_Value_GET(data);
} }
gt_write(parent, ETH_ESMIR, ETH_ESMIR_READ(phy, reg)); gt_write(gt, ETH_ESMIR, ETH_ESMIR_READ(phy, reg));
count = 10000; count = 10000;
do { do {
DELAY(10); DELAY(10);
data = gt_read(parent, ETH_ESMIR); data = gt_read(gt, ETH_ESMIR);
} while ((data & ETH_ESMIR_ReadValid) == 0 && count-- > 0); } while ((data & ETH_ESMIR_ReadValid) == 0 && count-- > 0);
if (count == 0) if (count == 0)
@ -976,12 +970,13 @@ gt_mii_write (
int phy, int reg, int phy, int reg,
int value) int value)
{ {
struct gt_softc * const gt = (struct gt_softc *) parent;
uint32_t data; uint32_t data;
int count = 10000; int count = 10000;
do { do {
DELAY(10); DELAY(10);
data = gt_read(parent, ETH_ESMIR); data = gt_read(gt, ETH_ESMIR);
} while ((data & ETH_ESMIR_Busy) && count-- > 0); } while ((data & ETH_ESMIR_Busy) && count-- > 0);
if (count == 0) { if (count == 0) {
@ -990,13 +985,13 @@ gt_mii_write (
return; return;
} }
gt_write(parent, ETH_ESMIR, gt_write(gt, ETH_ESMIR,
ETH_ESMIR_WRITE(phy, reg, value)); ETH_ESMIR_WRITE(phy, reg, value));
count = 10000; count = 10000;
do { do {
DELAY(10); DELAY(10);
data = gt_read(parent, ETH_ESMIR); data = gt_read(gt, ETH_ESMIR);
} while ((data & ETH_ESMIR_Busy) && count-- > 0); } while ((data & ETH_ESMIR_Busy) && count-- > 0);
if (count == 0) if (count == 0)

103
sys/dev/marvell/gtmpsc.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: gtmpsc.c,v 1.1 2003/03/05 22:08:21 matt Exp $ */ /* $NetBSD: gtmpsc.c,v 1.2 2003/03/16 07:05:34 matt Exp $ */
/* /*
* Copyright (c) 2002 Allegro Networks, Inc., Wasabi Systems, Inc. * Copyright (c) 2002 Allegro Networks, Inc., Wasabi Systems, Inc.
@ -106,27 +106,27 @@ unsigned int mpscdebug = 0;
#define GTMPSCUNIT(x) (minor(x) & GTMPSCUNIT_MASK) #define GTMPSCUNIT(x) (minor(x) & GTMPSCUNIT_MASK)
#define GTMPSCDIALOUT(x) (minor(x) & GTMPSCDIALOUT_MASK) #define GTMPSCDIALOUT(x) (minor(x) & GTMPSCDIALOUT_MASK)
STATIC void gtmpscinit __P((struct gtmpsc_softc *)); STATIC void gtmpscinit(struct gtmpsc_softc *);
STATIC int gtmpscmatch __P((struct device *, struct cfdata *, void *)); STATIC int gtmpscmatch(struct device *, struct cfdata *, void *);
STATIC void gtmpscattach __P((struct device *, struct device *, void *)); STATIC void gtmpscattach(struct device *, struct device *, void *);
STATIC int compute_cdv __P((unsigned int)); STATIC int compute_cdv(unsigned int);
STATIC void gtmpsc_loadchannelregs __P((struct gtmpsc_softc *)); STATIC void gtmpsc_loadchannelregs(struct gtmpsc_softc *);
STATIC void gtmpscshutdown __P((struct gtmpsc_softc *)); STATIC void gtmpscshutdown(struct gtmpsc_softc *);
STATIC void gtmpscstart __P((struct tty *)); STATIC void gtmpscstart(struct tty *);
STATIC int gtmpscparam __P((struct tty *, struct termios *)); STATIC int gtmpscparam(struct tty *, struct termios *);
STATIC int gtmpsc_probe __P((void)); STATIC int gtmpsc_probe(void);
STATIC int gtmpsc_intr __P((void *)); STATIC int gtmpsc_intr(void *);
STATIC int gtmpsc_softintr(void *); STATIC int gtmpsc_softintr(void *);
STATIC void gtmpsc_common_putn __P((struct gtmpsc_softc *)); STATIC void gtmpsc_common_putn(struct gtmpsc_softc *);
STATIC void gtmpsc_common_putc __P((unsigned int, unsigned char)); STATIC void gtmpsc_common_putc(unsigned int, unsigned char);
STATIC int gtmpsc_common_getc __P((unsigned int)); STATIC int gtmpsc_common_getc(unsigned int);
STATIC int gtmpsc_common_pollc __P((unsigned int, char *, int *)); STATIC int gtmpsc_common_pollc(unsigned int, char *, int *);
STATIC void gtmpsc_poll __P((void *)); STATIC void gtmpsc_poll(void *);
#ifdef KGDB #ifdef KGDB
STATIC void gtmpsc_kgdb_poll __P((void *)); STATIC void gtmpsc_kgdb_poll(void *);
#endif #endif
STATIC void gtmpsc_mem_printf __P((const char *, ...)); STATIC void gtmpsc_mem_printf(const char *, ...);
STATIC void gtmpsc_txdesc_init(gtmpsc_poll_sdma_t *, gtmpsc_poll_sdma_t *); STATIC void gtmpsc_txdesc_init(gtmpsc_poll_sdma_t *, gtmpsc_poll_sdma_t *);
STATIC void gtmpsc_rxdesc_init(gtmpsc_poll_sdma_t *, gtmpsc_poll_sdma_t *); STATIC void gtmpsc_rxdesc_init(gtmpsc_poll_sdma_t *, gtmpsc_poll_sdma_t *);
@ -134,19 +134,21 @@ STATIC unsigned int gtmpsc_get_causes(void);
STATIC void gtmpsc_hackinit(struct gtmpsc_softc *); STATIC void gtmpsc_hackinit(struct gtmpsc_softc *);
STATIC void gtmpscinit_stop(struct gtmpsc_softc *, int); STATIC void gtmpscinit_stop(struct gtmpsc_softc *, int);
STATIC void gtmpscinit_start(struct gtmpsc_softc *, int); STATIC void gtmpscinit_start(struct gtmpsc_softc *, int);
#if 0
void gtmpsc_printf(const char *fmt, ...); void gtmpsc_printf(const char *fmt, ...);
#endif
void gtmpsc_puts(char *); void gtmpsc_puts(char *);
void gtmpsccnprobe __P((struct consdev *)); void gtmpsccnprobe(struct consdev *);
void gtmpsccninit __P((struct consdev *)); void gtmpsccninit(struct consdev *);
int gtmpsccngetc __P((dev_t)); int gtmpsccngetc(dev_t);
void gtmpsccnputc __P((dev_t, int)); void gtmpsccnputc(dev_t, int);
void gtmpsccnpollc __P((dev_t, int)); void gtmpsccnpollc(dev_t, int);
void gtmpsccnhalt __P((dev_t)); void gtmpsccnhalt(dev_t);
STATIC void gtmpsc_txflush __P((gtmpsc_softc_t *)); STATIC void gtmpsc_txflush(gtmpsc_softc_t *);
STATIC void gtmpsc_iflush __P((gtmpsc_softc_t *)); STATIC void gtmpsc_iflush(gtmpsc_softc_t *);
STATIC void gtmpsc_shutdownhook __P((void *)); STATIC void gtmpsc_shutdownhook(void *);
dev_type_open(gtmpscopen); dev_type_open(gtmpscopen);
dev_type_close(gtmpscclose); dev_type_close(gtmpscclose);
@ -168,13 +170,13 @@ CFATTACH_DECL(gtmpsc, sizeof(struct gtmpsc_softc),
extern struct cfdriver gtmpsc_cd; extern struct cfdriver gtmpsc_cd;
#if 0 #if 0
struct consdev consdev_mpsc = { struct consdev consdev_gtmpsc = {
gtmpsccnprobe, gtmpsccnprobe,
gtmpsccninit, gtmpsccninit,
gtmpsccngetc, gtmpsccngetc,
gtmpsccnputc, gtmpsccnputc,
gtmpsccnpollc, gtmpsccnpollc,
NULL, NULL, /* cn_bell */
NULL, /* cn_flush */ NULL, /* cn_flush */
gtmpsccnhalt, gtmpsccnhalt,
}; };
@ -197,8 +199,8 @@ static int gtmpsc_kgdb_attached;
int kgdb_break_immediate /* = 0 */ ; int kgdb_break_immediate /* = 0 */ ;
STATIC int gtmpsc_kgdb_getc __P((void *)); STATIC int gtmpsc_kgdb_getc(void *);
STATIC void gtmpsc_kgdb_putc __P((void *, int)); STATIC void gtmpsc_kgdb_putc(void *, int);
#endif /* KGDB */ #endif /* KGDB */
/* /*
@ -255,7 +257,7 @@ gtmpsc_cache_invalidate(void *p)
#endif /* SDMA_COHERENT */ #endif /* SDMA_COHERENT */
extern unsigned int gtbase; extern vaddr_t gtbase;
#define GT_READ(d,a) \ #define GT_READ(d,a) \
gtmpsc_reg_read(gtbase, (a)) gtmpsc_reg_read(gtbase, (a))
@ -291,14 +293,8 @@ gtmpsc_reg_read(unsigned int p, unsigned int off)
{ {
unsigned int rv; unsigned int rv;
#undef GCC_R0_OFF_NOT_BROKEN __asm __volatile("lwbrx %0,%1,%2; eieio;"
#ifdef GCC_R0_OFF_NOT_BROKEN : "=r"(rv) : "b"(off), "r"(p));
asm volatile("lwbrx %0,%1,%2; eieio;"
: "=r"(rv) : "r"(off), "r"(p));
#else
asm volatile("lwbrx %0,0,%1; eieio;"
: "=r"(rv) : "r"(p + off));
#endif
DPRINTF(("READ 0x%x 0x%x\n", off, rv)); DPRINTF(("READ 0x%x 0x%x\n", off, rv));
return rv; return rv;
@ -307,13 +303,8 @@ gtmpsc_reg_read(unsigned int p, unsigned int off)
static volatile inline void static volatile inline void
gtmpsc_reg_write(unsigned int p, unsigned int off, unsigned int v) gtmpsc_reg_write(unsigned int p, unsigned int off, unsigned int v)
{ {
#ifdef GCC_R0_OFF_NOT_BROKEN __asm __volatile("stwbrx %0,%1,%2; eieio;"
asm volatile("stwbrx %0,%1,%2; eieio;" :: "r"(v), "b"(off), "r"(p));
:: "r"(v), "r"(off), "r"(p));
#else
asm volatile("stwbrx %0,0,%1; eieio;"
:: "r"(v), "r"(p+off));
#endif
DPRINTF(("WRITE 0x%x 0x%x\n", off, v)); DPRINTF(("WRITE 0x%x 0x%x\n", off, v));
} }
@ -324,7 +315,7 @@ desc_read(unsigned int *ip)
{ {
unsigned int rv; unsigned int rv;
asm volatile ("lwzx %0,0,%1; eieio;" __asm __volatile ("lwzx %0,0,%1; eieio;"
: "=r"(rv) : "r"(ip)); : "=r"(rv) : "r"(ip));
return rv; return rv;
} }
@ -332,7 +323,7 @@ desc_read(unsigned int *ip)
static volatile inline void static volatile inline void
desc_write(unsigned int *ip, unsigned int val) desc_write(unsigned int *ip, unsigned int val)
{ {
asm volatile ("stwx %0,0,%1; eieio;" __asm __volatile ("stwx %0,0,%1; eieio;"
:: "r"(val), "r"(ip)); :: "r"(val), "r"(ip));
} }
@ -896,13 +887,13 @@ gtmpsc_get_causes(void)
desc_addr[0] = desc_addr[0] =
&sc->gtmpsc_poll_sdmapage->rx[sc->gtmpsc_poll_rxix].rxdesc; &sc->gtmpsc_poll_sdmapage->rx[sc->gtmpsc_poll_rxix].rxdesc;
GTMPSC_CACHE_INVALIDATE(desc_addr[0]); GTMPSC_CACHE_INVALIDATE(desc_addr[0]);
asm volatile ("dcbt 0,%0" :: "r"(desc_addr[0])); __asm __volatile ("dcbt 0,%0" :: "r"(desc_addr[0]));
} }
if (sdma_imask & SDMA_INTR_TXBUF(0)) { if (sdma_imask & SDMA_INTR_TXBUF(0)) {
desc_addr[1] = desc_addr[1] =
&sc->gtmpsc_poll_sdmapage->tx[sc->gtmpsc_poll_txix].txdesc; &sc->gtmpsc_poll_sdmapage->tx[sc->gtmpsc_poll_txix].txdesc;
GTMPSC_CACHE_INVALIDATE(desc_addr[1]); GTMPSC_CACHE_INVALIDATE(desc_addr[1]);
asm volatile ("dcbt 0,%0" :: "r"(desc_addr[1])); __asm __volatile ("dcbt 0,%0" :: "r"(desc_addr[1]));
} }
} }
sc = gtmpsc_cd.cd_devs[1]; sc = gtmpsc_cd.cd_devs[1];
@ -911,13 +902,13 @@ gtmpsc_get_causes(void)
desc_addr[2] = desc_addr[2] =
&sc->gtmpsc_poll_sdmapage->rx[sc->gtmpsc_poll_rxix].rxdesc; &sc->gtmpsc_poll_sdmapage->rx[sc->gtmpsc_poll_rxix].rxdesc;
GTMPSC_CACHE_INVALIDATE(desc_addr[2]); GTMPSC_CACHE_INVALIDATE(desc_addr[2]);
asm volatile ("dcbt 0,%0" :: "r"(desc_addr[2])); __asm __volatile ("dcbt 0,%0" :: "r"(desc_addr[2]));
} }
if (sdma_imask & SDMA_INTR_TXBUF(1)) { if (sdma_imask & SDMA_INTR_TXBUF(1)) {
desc_addr[3] = desc_addr[3] =
&sc->gtmpsc_poll_sdmapage->tx[sc->gtmpsc_poll_txix].txdesc; &sc->gtmpsc_poll_sdmapage->tx[sc->gtmpsc_poll_txix].txdesc;
GTMPSC_CACHE_INVALIDATE(desc_addr[3]); GTMPSC_CACHE_INVALIDATE(desc_addr[3]);
asm volatile ("dcbt 0,%0" :: "r"(desc_addr[3])); __asm __volatile ("dcbt 0,%0" :: "r"(desc_addr[3]));
} }
} }
@ -1022,7 +1013,7 @@ gtmpsc_softintr(void *unused)
unsigned int unit; unsigned int unit;
struct gtmpsc_softc *sc; struct gtmpsc_softc *sc;
struct tty *tp; struct tty *tp;
int (*rint) __P((int c, struct tty *tp)); int (*rint)(int, struct tty *);
int jobs; int jobs;
int s; int s;
@ -1750,6 +1741,7 @@ gtmpsc_poll(void *arg)
} }
} }
#ifdef DDB #ifdef DDB
#ifdef MPSC_CONSOLE
if (stat) { if (stat) {
struct consdev *ocd = cn_tab; struct consdev *ocd = cn_tab;
if (ocd->cn_init != gtmpsccninit) { if (ocd->cn_init != gtmpsccninit) {
@ -1760,6 +1752,7 @@ gtmpsc_poll(void *arg)
Debugger(); Debugger();
} }
} }
#endif
#endif #endif
if (kick) if (kick)
setsoftserial(); setsoftserial();
@ -1815,6 +1808,7 @@ gtmpsc_kgdb_poll(void *arg)
#endif /* KGDB */ #endif /* KGDB */
#if 0
void void
#ifdef __STDC__ #ifdef __STDC__
gtmpsc_printf(const char *fmt, ...) gtmpsc_printf(const char *fmt, ...)
@ -1838,6 +1832,7 @@ gtmpsc_printf(fmt, va_alist)
cn_tab = ocd; cn_tab = ocd;
splx(s); splx(s);
} }
#endif
void void
#ifdef __STDC__ #ifdef __STDC__

362
sys/dev/marvell/gtpci.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: gtpci.c,v 1.1 2003/03/05 22:08:22 matt Exp $ */ /* $NetBSD: gtpci.c,v 1.2 2003/03/16 07:05:34 matt Exp $ */
/* /*
* Copyright (c) 2002 Allegro Networks, Inc., Wasabi Systems, Inc. * Copyright (c) 2002 Allegro Networks, Inc., Wasabi Systems, Inc.
@ -79,7 +79,7 @@ int gtpci_debug = 0;
struct gtpci_softc { struct gtpci_softc {
struct device gtpci_dev; struct device gtpci_dev;
struct pci_chipset gtpci_pc; struct gtpci_chipset gtpci_gtpc;
}; };
static int gtpci_cfprint(void *, const char *); static int gtpci_cfprint(void *, const char *);
@ -91,7 +91,7 @@ CFATTACH_DECL(gtpci, sizeof(struct gtpci_softc),
extern struct cfdriver gtpci_cd; extern struct cfdriver gtpci_cd;
static int gtpci_nbusses; static int gtpci_busmask;
const struct pci_chipset_functions gtpci_functions = { const struct pci_chipset_functions gtpci_functions = {
gtpci_bus_attach_hook, gtpci_bus_attach_hook,
@ -116,17 +116,10 @@ const struct pci_chipset_functions gtpci_functions = {
int int
gtpci_match(struct device *parent, struct cfdata *self, void *aux) gtpci_match(struct device *parent, struct cfdata *self, void *aux)
{ {
struct gt_attach_args *ga = aux; struct gt_softc * const gt = (struct gt_softc *) parent;
struct gt_attach_args * const ga = aux;
if (gtpci_nbusses >= GTPCI_NBUS) { return GT_PCIOK(gt, ga, &gtpci_cd);
return 0;
}
if (strcmp(ga->ga_name, gtpci_cd.cd_name) != 0) {
return 0;
}
return 1;
} }
int int
@ -135,9 +128,9 @@ gtpci_cfprint(void *aux, const char *pnp)
struct pcibus_attach_args *pba = (struct pcibus_attach_args *) aux; struct pcibus_attach_args *pba = (struct pcibus_attach_args *) aux;
if (pnp) if (pnp)
printf("pci at %s", pnp); aprint_normal("pci at %s", pnp);
printf(" bus %d", pba->pba_bus); aprint_normal(" bus %d", pba->pba_bus);
return (UNCONF); return (UNCONF);
} }
@ -146,53 +139,62 @@ void
gtpci_attach(struct device *parent, struct device *self, void *aux) gtpci_attach(struct device *parent, struct device *self, void *aux)
{ {
struct pcibus_attach_args pba; struct pcibus_attach_args pba;
struct gt_attach_args *ga = aux; struct gt_attach_args * const ga = aux;
struct gtpci_softc *gtp = (struct gtpci_softc *) self; struct gt_softc * const gt = (struct gt_softc *) parent;
struct gt_softc *gt = (struct gt_softc *) parent; struct gtpci_softc * const gtp = (struct gtpci_softc *) self;
struct pci_chipset *pc; struct gtpci_chipset * const gtpc = &gtp->gtpci_gtpc;
struct pci_chipset * const pc = &gtpc->gtpc_pc;
const int busno = ga->ga_unit;
uint32_t data; uint32_t data;
int busno;
printf("\n"); GT_PCIFOUND(gt, ga);
busno = ga->ga_unit;
pc = &gtp->gtpci_pc;
gt->gt_pcis[busno] = pc;
memset(pc, 0, sizeof(*pc));
pc->pc_funcs = &gtpci_functions; pc->pc_funcs = &gtpci_functions;
pc->pc_parent = self; pc->pc_parent = self;
pc->pc_md.mdpc_busno = busno;
pc->pc_md.mdpc_cfgaddr = PCI_CONFIG_ADDR(busno); gtpc->gtpc_busno = busno;
pc->pc_md.mdpc_cfgdata = PCI_CONFIG_DATA(busno); gtpc->gtpc_cfgaddr = PCI_CONFIG_ADDR(busno);
pc->pc_md.mdpc_syncreg = PCI_SYNC_REG(busno); gtpc->gtpc_cfgdata = PCI_CONFIG_DATA(busno);
pc->pc_md.mdpc_gt = gt; gtpc->gtpc_syncreg = PCI_SYNC_REG(busno);
gtpc->gtpc_gt_memt = ga->ga_memt;
gtpc->gtpc_gt_memh = ga->ga_memh;
switch (busno) { switch (busno) {
case 0: case 0:
pc->pc_md.mdpc_io_bs = gt->gt_pci0_iot; gtpc->gtpc_io_bs = gt->gt_pci0_iot;
pc->pc_md.mdpc_mem_bs = gt->gt_pci0_memt; gtpc->gtpc_mem_bs = gt->gt_pci0_memt;
break; break;
case 1: case 1:
pc->pc_md.mdpc_io_bs = gt->gt_pci1_iot; gtpc->gtpc_io_bs = gt->gt_pci1_iot;
pc->pc_md.mdpc_mem_bs = gt->gt_pci1_memt; gtpc->gtpc_mem_bs = gt->gt_pci1_memt;
break; break;
default: default:
break; break;
} }
/*
* If no bus_spaces exist, then it's been disabled.
*/
if (gtpc->gtpc_io_bs == NULL && gtpc->gtpc_mem_bs == NULL) {
aprint_normal(": disabled\n");
return;
}
aprint_normal("\n");
pba.pba_pc = pc; pba.pba_pc = pc;
pba.pba_bus = 0; pba.pba_bus = 0;
pba.pba_busname = "pci"; pba.pba_busname = "pci";
pba.pba_iot = pc->pc_md.mdpc_io_bs; pba.pba_iot = gtpc->gtpc_io_bs;
pba.pba_memt = pc->pc_md.mdpc_mem_bs; pba.pba_memt = gtpc->gtpc_mem_bs;
pba.pba_dmat = gt->gt_dmat; pba.pba_dmat = gt->gt_dmat;
pba.pba_flags = PCI_FLAGS_IO_ENABLED | PCI_FLAGS_MEM_ENABLED; pba.pba_flags = 0;
if (pba.pba_iot != NULL)
pba.pba_flags |= PCI_FLAGS_IO_ENABLED;
if (pba.pba_memt != NULL)
pba.pba_flags |= PCI_FLAGS_MEM_ENABLED;
data = gtpci_read(pc, PCI_COMMAND(pc->pc_md.mdpc_busno)); data = gtpci_read(gtpc, PCI_COMMAND(gtpc->gtpc_busno));
if (data & PCI_CMD_MRdMul) if (data & PCI_CMD_MRdMul)
pba.pba_flags |= PCI_FLAGS_MRM_OKAY; pba.pba_flags |= PCI_FLAGS_MRM_OKAY;
if (data & PCI_CMD_MRdLine) if (data & PCI_CMD_MRdLine)
@ -211,20 +213,20 @@ gtpci_attach(struct device *parent, struct device *self, void *aux)
* establish ISRs for PCI errors * establish ISRs for PCI errors
* enable PCI error interrupts * enable PCI error interrupts
*/ */
gtpci_write(pc, PCI_ERROR_CAUSE(pc->pc_md.mdpc_busno), 0); gtpci_write(gtpc, PCI_ERROR_CAUSE(gtpc->gtpc_busno), 0);
(void)gtpci_read(pc, PCI_ERROR_DATA_LOW(pc->pc_md.mdpc_busno)); (void)gtpci_read(gtpc, PCI_ERROR_DATA_LOW(gtpc->gtpc_busno));
(void)gtpci_read(pc, PCI_ERROR_DATA_HIGH(pc->pc_md.mdpc_busno)); (void)gtpci_read(gtpc, PCI_ERROR_DATA_HIGH(gtpc->gtpc_busno));
(void)gtpci_read(pc, PCI_ERROR_COMMAND(pc->pc_md.mdpc_busno)); (void)gtpci_read(gtpc, PCI_ERROR_COMMAND(gtpc->gtpc_busno));
(void)gtpci_read(pc, PCI_ERROR_ADDRESS_HIGH(pc->pc_md.mdpc_busno)); (void)gtpci_read(gtpc, PCI_ERROR_ADDRESS_HIGH(gtpc->gtpc_busno));
(void)gtpci_read(pc, PCI_ERROR_ADDRESS_LOW(pc->pc_md.mdpc_busno)); (void)gtpci_read(gtpc, PCI_ERROR_ADDRESS_LOW(gtpc->gtpc_busno));
if (pc->pc_md.mdpc_busno == 0) { if (gtpc->gtpc_busno == 0) {
intr_establish(IRQ_PCI0_0, IST_LEVEL, IPL_GTERR, intr_establish(IRQ_PCI0_0, IST_LEVEL, IPL_GTERR,
gtpci_error_intr, pc); gtpci_error_intr, pc);
intr_establish(IRQ_PCI0_1, IST_LEVEL, IPL_GTERR, intr_establish(IRQ_PCI0_1, IST_LEVEL, IPL_GTERR,
gtpci_error_intr, pc); gtpci_error_intr, pc);
intr_establish(IRQ_PCI0_2, IST_LEVEL, IPL_GTERR, intr_establish(IRQ_PCI0_2, IST_LEVEL, IPL_GTERR,
gtpci_error_intr, pc); gtpci_error_intr, pc);
printf("%s: %s%d error interrupts at irqs %d, %d, %d\n", aprint_normal("%s: %s%d error interrupts at irqs %d, %d, %d\n",
pc->pc_parent->dv_xname, "pci", busno, pc->pc_parent->dv_xname, "pci", busno,
IRQ_PCI0_0, IRQ_PCI0_1, IRQ_PCI0_2); IRQ_PCI0_0, IRQ_PCI0_1, IRQ_PCI0_2);
@ -235,21 +237,21 @@ gtpci_attach(struct device *parent, struct device *self, void *aux)
gtpci_error_intr, pc); gtpci_error_intr, pc);
intr_establish(IRQ_PCI1_2, IST_LEVEL, IPL_GTERR, intr_establish(IRQ_PCI1_2, IST_LEVEL, IPL_GTERR,
gtpci_error_intr, pc); gtpci_error_intr, pc);
printf("%s: %s%d error interrupts at irqs %d, %d, %d\n", aprint_normal("%s: %s%d error interrupts at irqs %d, %d, %d\n",
pc->pc_parent->dv_xname, "pci", busno, pc->pc_parent->dv_xname, "pci", busno,
IRQ_PCI1_0, IRQ_PCI1_1, IRQ_PCI1_2); IRQ_PCI1_0, IRQ_PCI1_1, IRQ_PCI1_2);
} }
gtpci_write(pc, PCI_ERROR_MASK(pc->pc_md.mdpc_busno), PCI_SERRMSK_ALL_ERRS); gtpci_write(gtpc, PCI_ERROR_MASK(gtpc->gtpc_busno), PCI_SERRMSK_ALL_ERRS);
gtpci_nbusses++; gtpci_busmask |= (1 << busno);
} }
void void
gtpci_bus_attach_hook(struct device *parent, struct device *self, gtpci_bus_attach_hook(struct device *parent, struct device *self,
struct pcibus_attach_args *pba) struct pcibus_attach_args *pba)
{ {
struct gt_softc *gt;
pci_chipset_tag_t pc = pba->pba_pc; pci_chipset_tag_t pc = pba->pba_pc;
struct gtpci_chipset *gtpc = (struct gtpci_chipset *)pc;
pcitag_t tag; pcitag_t tag;
uint32_t data; uint32_t data;
int i; int i;
@ -257,8 +259,8 @@ gtpci_bus_attach_hook(struct device *parent, struct device *self,
if (pc->pc_parent != parent) if (pc->pc_parent != parent)
return; return;
data = gtpci_read(pc, PCI_MODE(pc->pc_md.mdpc_busno)); data = gtpci_read(gtpc, PCI_MODE(gtpc->gtpc_busno));
printf(": id %d%s%s%s%s%s%s%s%s", aprint_normal(": id %d%s%s%s%s%s%s%s%s",
PCI_MODE_PciID_GET(data), PCI_MODE_PciID_GET(data),
(data & PCI_MODE_Pci64) ? ", 64bit" : "", (data & PCI_MODE_Pci64) ? ", 64bit" : "",
(data & PCI_MODE_ExpRom) ? ", Expansion Rom" : "", (data & PCI_MODE_ExpRom) ? ", Expansion Rom" : "",
@ -270,193 +272,192 @@ gtpci_bus_attach_hook(struct device *parent, struct device *self,
(data & PCI_MODE_PRst) ? "" : ", PRst"); (data & PCI_MODE_PRst) ? "" : ", PRst");
while ((data & PCI_MODE_PRst) == 0) { while ((data & PCI_MODE_PRst) == 0) {
data = gtpci_read(pc, PCI_MODE(pc->pc_md.mdpc_busno)); data = gtpci_read(gtpc, PCI_MODE(gtpc->gtpc_busno));
i = (i + 1) & 0x7ffffff; printf("."); i = (i + 1) & 0x7ffffff; aprint_normal(".");
} }
gt = (struct gt_softc *) pc->pc_md.mdpc_gt; gtpci_config_bus(pc, gtpc->gtpc_busno);
gtpci_config_bus(pc, pc->pc_md.mdpc_busno);
tag = gtpci_make_tag(pc, 0, 0, 0); tag = gtpci_make_tag(pc, 0, 0, 0);
data = gtpci_read(pc, PCI_BASE_ADDR_REGISTERS_ENABLE(pc->pc_md.mdpc_busno)); data = gtpci_read(gtpc, PCI_BASE_ADDR_REGISTERS_ENABLE(gtpc->gtpc_busno));
printf("\n%s: BARs enabled: %#x", self->dv_xname, data); aprint_normal("\n%s: BARs enabled: %#x", self->dv_xname, data);
#if DEBUG #if DEBUG
printf("\n%s: 0:0:0\n", self->dv_xname); aprint_normal("\n%s: 0:0:0\n", self->dv_xname);
printf(" %sSCS0=%#010x", aprint_normal(" %sSCS0=%#010x",
(data & 1) ? "-" : "+", (data & 1) ? "-" : "+",
gtpci_conf_read(pc, tag, 0x10)); gtpci_conf_read(pc, tag, 0x10));
printf("/%#010x", gtpci_read(pc, aprint_normal("/%#010x", gtpci_read(gtpc,
PCI_SCS0_BAR_SIZE(pc->pc_md.mdpc_busno))+0x1000); PCI_SCS0_BAR_SIZE(gtpc->gtpc_busno))+0x1000);
printf(" remap %#010x\n", aprint_normal(" remap %#010x\n",
gtpci_read(pc, PCI_SCS0_BASE_ADDR_REMAP(pc->pc_md.mdpc_busno))); gtpci_read(gtpc, PCI_SCS0_BASE_ADDR_REMAP(gtpc->gtpc_busno)));
printf(" %sSCS1=%#010x", aprint_normal(" %sSCS1=%#010x",
(data & 2) ? "-" : "+", (data & 2) ? "-" : "+",
gtpci_conf_read(pc, tag, 0x14)); gtpci_conf_read(pc, tag, 0x14));
printf("/%#010x", aprint_normal("/%#010x",
gtpci_read(pc, PCI_SCS1_BAR_SIZE(pc->pc_md.mdpc_busno))+0x1000); gtpci_read(gtpc, PCI_SCS1_BAR_SIZE(gtpc->gtpc_busno))+0x1000);
printf(" remap %#010x\n", aprint_normal(" remap %#010x\n",
gtpci_read(pc, PCI_SCS1_BASE_ADDR_REMAP(pc->pc_md.mdpc_busno))); gtpci_read(gtpc, PCI_SCS1_BASE_ADDR_REMAP(gtpc->gtpc_busno)));
printf(" %sSCS2=%#010x", aprint_normal(" %sSCS2=%#010x",
(data & 4) ? "-" : "+", (data & 4) ? "-" : "+",
gtpci_conf_read(pc, tag, 0x18)); gtpci_conf_read(pc, tag, 0x18));
printf("/%#010x", aprint_normal("/%#010x",
gtpci_read(pc, PCI_SCS2_BAR_SIZE(pc->pc_md.mdpc_busno))+0x1000); gtpci_read(gtpc, PCI_SCS2_BAR_SIZE(gtpc->gtpc_busno))+0x1000);
printf(" remap %#010x\n", aprint_normal(" remap %#010x\n",
gtpci_read(pc, PCI_SCS2_BASE_ADDR_REMAP(pc->pc_md.mdpc_busno))); gtpci_read(gtpc, PCI_SCS2_BASE_ADDR_REMAP(gtpc->gtpc_busno)));
printf(" %sSCS3=%#010x", aprint_normal(" %sSCS3=%#010x",
(data & 8) ? "-" : "+", (data & 8) ? "-" : "+",
gtpci_conf_read(pc, tag, 0x1c)); gtpci_conf_read(pc, tag, 0x1c));
printf("/%#010x", aprint_normal("/%#010x",
gtpci_read(pc, PCI_SCS3_BAR_SIZE(pc->pc_md.mdpc_busno))+0x1000); gtpci_read(gtpc, PCI_SCS3_BAR_SIZE(gtpc->gtpc_busno))+0x1000);
printf(" remap %#010x\n", aprint_normal(" remap %#010x\n",
gtpci_read(pc, PCI_SCS3_BASE_ADDR_REMAP(pc->pc_md.mdpc_busno))); gtpci_read(gtpc, PCI_SCS3_BASE_ADDR_REMAP(gtpc->gtpc_busno)));
printf(" %sIMem=%#010x", aprint_normal(" %sIMem=%#010x",
(data & PCI_BARE_IntMemEn) ? "-" : "+", (data & PCI_BARE_IntMemEn) ? "-" : "+",
gtpci_conf_read(pc, tag, 0x20)); gtpci_conf_read(pc, tag, 0x20));
printf("\n"); aprint_normal("\n");
printf(" %sIIO=%#010x", aprint_normal(" %sIIO=%#010x",
(data & PCI_BARE_IntIOEn) ? "-" : "+", (data & PCI_BARE_IntIOEn) ? "-" : "+",
gtpci_conf_read(pc, tag, 0x24)); gtpci_conf_read(pc, tag, 0x24));
printf("\n"); aprint_normal("\n");
tag = gtpci_make_tag(pc, 0, 0, 1); tag = gtpci_make_tag(pc, 0, 0, 1);
printf(" %sCS0=%#010x", aprint_normal(" %sCS0=%#010x",
(data & PCI_BARE_CS0En) ? "-" : "+", (data & PCI_BARE_CS0En) ? "-" : "+",
gtpci_conf_read(pc, tag, 0x10)); gtpci_conf_read(pc, tag, 0x10));
printf("/%#010x", aprint_normal("/%#010x",
gtpci_read(pc, PCI_CS0_BAR_SIZE(pc->pc_md.mdpc_busno))+0x1000); gtpci_read(gtpc, PCI_CS0_BAR_SIZE(gtpc->gtpc_busno))+0x1000);
printf(" remap %#010x\n", aprint_normal(" remap %#010x\n",
gtpci_read(pc, PCI_CS0_BASE_ADDR_REMAP(pc->pc_md.mdpc_busno))); gtpci_read(gtpc, PCI_CS0_BASE_ADDR_REMAP(gtpc->gtpc_busno)));
printf(" %sCS1=%#010x", aprint_normal(" %sCS1=%#010x",
(data & PCI_BARE_CS1En) ? "-" : "+", (data & PCI_BARE_CS1En) ? "-" : "+",
gtpci_conf_read(pc, tag, 0x14)); gtpci_conf_read(pc, tag, 0x14));
printf("/%#010x", aprint_normal("/%#010x",
gtpci_read(pc, PCI_CS1_BAR_SIZE(pc->pc_md.mdpc_busno))+0x1000); gtpci_read(gtpc, PCI_CS1_BAR_SIZE(gtpc->gtpc_busno))+0x1000);
printf(" remap %#010x\n", aprint_normal(" remap %#010x\n",
gtpci_read(pc, PCI_CS1_BASE_ADDR_REMAP(pc->pc_md.mdpc_busno))); gtpci_read(gtpc, PCI_CS1_BASE_ADDR_REMAP(gtpc->gtpc_busno)));
printf(" %sCS2=%#010x", aprint_normal(" %sCS2=%#010x",
(data & PCI_BARE_CS2En) ? "-" : "+", (data & PCI_BARE_CS2En) ? "-" : "+",
gtpci_conf_read(pc, tag, 0x18)); gtpci_conf_read(pc, tag, 0x18));
printf("/%#010x", aprint_normal("/%#010x",
gtpci_read(pc, PCI_CS2_BAR_SIZE(pc->pc_md.mdpc_busno))+0x1000); gtpci_read(gtpc, PCI_CS2_BAR_SIZE(gtpc->gtpc_busno))+0x1000);
printf(" remap %#010x\n", aprint_normal(" remap %#010x\n",
gtpci_read(pc, PCI_CS2_BASE_ADDR_REMAP(pc->pc_md.mdpc_busno))); gtpci_read(gtpc, PCI_CS2_BASE_ADDR_REMAP(gtpc->gtpc_busno)));
printf(" %sCS3=%#010x", aprint_normal(" %sCS3=%#010x",
(data & PCI_BARE_CS3En) ? "-" : "+", (data & PCI_BARE_CS3En) ? "-" : "+",
gtpci_conf_read(pc, tag, 0x1c)); gtpci_conf_read(pc, tag, 0x1c));
printf("/%#010x", aprint_normal("/%#010x",
gtpci_read(pc, PCI_CS3_BAR_SIZE(pc->pc_md.mdpc_busno))+0x1000); gtpci_read(gtpc, PCI_CS3_BAR_SIZE(gtpc->gtpc_busno))+0x1000);
printf(" remap %#010x\n", aprint_normal(" remap %#010x\n",
gtpci_read(pc, PCI_CS3_BASE_ADDR_REMAP(pc->pc_md.mdpc_busno))); gtpci_read(gtpc, PCI_CS3_BASE_ADDR_REMAP(gtpc->gtpc_busno)));
printf(" %sBootCS=%#010x", aprint_normal(" %sBootCS=%#010x",
(data & PCI_BARE_BootCSEn) ? "-" : "+", (data & PCI_BARE_BootCSEn) ? "-" : "+",
gtpci_conf_read(pc, tag, 0x20)); gtpci_conf_read(pc, tag, 0x20));
printf("/%#010x", aprint_normal("/%#010x",
gtpci_read(pc, PCI_BOOTCS_BAR_SIZE(pc->pc_md.mdpc_busno))+0x1000); gtpci_read(gtpc, PCI_BOOTCS_BAR_SIZE(gtpc->gtpc_busno))+0x1000);
printf(" remap %#010x\n", aprint_normal(" remap %#010x\n",
gtpci_read(pc, PCI_BOOTCS_ADDR_REMAP(pc->pc_md.mdpc_busno))); gtpci_read(gtpc, PCI_BOOTCS_ADDR_REMAP(gtpc->gtpc_busno)));
tag = gtpci_make_tag(pc, 0, 0, 2); tag = gtpci_make_tag(pc, 0, 0, 2);
printf(" %sP2PM0=%#010x", aprint_normal(" %sP2PM0=%#010x",
(data & PCI_BARE_P2PMem0En) ? "-" : "+", (data & PCI_BARE_P2PMem0En) ? "-" : "+",
gtpci_conf_read(pc, tag, 0x10)); gtpci_conf_read(pc, tag, 0x10));
printf("/%#010x", aprint_normal("/%#010x",
gtpci_read(pc, PCI_P2P_MEM0_BAR_SIZE(pc->pc_md.mdpc_busno))+0x1000); gtpci_read(gtpc, PCI_P2P_MEM0_BAR_SIZE(gtpc->gtpc_busno))+0x1000);
printf(" remap %#010x.%#010x\n", aprint_normal(" remap %#010x.%#010x\n",
gtpci_read(pc, PCI_P2P_MEM0_BASE_ADDR_REMAP_HIGH(pc->pc_md.mdpc_busno)), gtpci_read(gtpc, PCI_P2P_MEM0_BASE_ADDR_REMAP_HIGH(gtpc->gtpc_busno)),
gtpci_read(pc, PCI_P2P_MEM0_BASE_ADDR_REMAP_LOW(pc->pc_md.mdpc_busno))); gtpci_read(gtpc, PCI_P2P_MEM0_BASE_ADDR_REMAP_LOW(gtpc->gtpc_busno)));
printf(" %sP2PM1=%#010x", aprint_normal(" %sP2PM1=%#010x",
(data & PCI_BARE_P2PMem1En) ? "-" : "+", (data & PCI_BARE_P2PMem1En) ? "-" : "+",
gtpci_conf_read(pc, tag, 0x14)); gtpci_conf_read(pc, tag, 0x14));
printf("/%#010x", aprint_normal("/%#010x",
gtpci_read(pc, PCI_P2P_MEM1_BAR_SIZE(pc->pc_md.mdpc_busno))+0x1000); gtpci_read(gtpc, PCI_P2P_MEM1_BAR_SIZE(gtpc->gtpc_busno))+0x1000);
printf(" remap %#010x.%#010x\n", aprint_normal(" remap %#010x.%#010x\n",
gtpci_read(pc, PCI_P2P_MEM1_BASE_ADDR_REMAP_HIGH(pc->pc_md.mdpc_busno)), gtpci_read(gtpc, PCI_P2P_MEM1_BASE_ADDR_REMAP_HIGH(gtpc->gtpc_busno)),
gtpci_read(pc, PCI_P2P_MEM1_BASE_ADDR_REMAP_LOW(pc->pc_md.mdpc_busno))); gtpci_read(gtpc, PCI_P2P_MEM1_BASE_ADDR_REMAP_LOW(gtpc->gtpc_busno)));
printf(" %sP2PIO=%#010x", aprint_normal(" %sP2PIO=%#010x",
(data & PCI_BARE_P2PIOEn) ? "-" : "+", (data & PCI_BARE_P2PIOEn) ? "-" : "+",
gtpci_conf_read(pc, tag, 0x18)); gtpci_conf_read(pc, tag, 0x18));
printf("/%#010x", aprint_normal("/%#010x",
gtpci_read(pc, PCI_P2P_IO_BAR_SIZE(pc->pc_md.mdpc_busno))+0x1000); gtpci_read(gtpc, PCI_P2P_IO_BAR_SIZE(gtpc->gtpc_busno))+0x1000);
printf(" remap %#010x\n", aprint_normal(" remap %#010x\n",
gtpci_read(pc, PCI_P2P_IO_BASE_ADDR_REMAP(pc->pc_md.mdpc_busno))); gtpci_read(gtpc, PCI_P2P_IO_BASE_ADDR_REMAP(gtpc->gtpc_busno)));
printf(" %sCPU=%#010x", aprint_normal(" %sCPU=%#010x",
(data & PCI_BARE_CPUEn) ? "-" : "+", (data & PCI_BARE_CPUEn) ? "-" : "+",
gtpci_conf_read(pc, tag, 0x1c)); gtpci_conf_read(pc, tag, 0x1c));
printf("/%#010x", aprint_normal("/%#010x",
gtpci_read(pc, PCI_CPU_BAR_SIZE(pc->pc_md.mdpc_busno))+0x1000); gtpci_read(gtpc, PCI_CPU_BAR_SIZE(gtpc->gtpc_busno))+0x1000);
printf(" remap %#010x\n", aprint_normal(" remap %#010x\n",
gtpci_read(pc, PCI_CPU_BASE_ADDR_REMAP(pc->pc_md.mdpc_busno))); gtpci_read(gtpc, PCI_CPU_BASE_ADDR_REMAP(gtpc->gtpc_busno)));
#endif #endif
tag = gtpci_make_tag(pc, 0, 0, 0); tag = gtpci_make_tag(pc, 0, 0, 0);
data = gtpci_read(pc, PCI_COMMAND(pc->pc_md.mdpc_busno)); data = gtpci_read(gtpc, PCI_COMMAND(gtpc->gtpc_busno));
if (data & (PCI_CMD_MSwapEn|PCI_CMD_SSwapEn)) { if (data & (PCI_CMD_MSwapEn|PCI_CMD_SSwapEn)) {
printf("\n%s: ", self->dv_xname); aprint_normal("\n%s: ", self->dv_xname);
if (data & PCI_CMD_MSwapEn) { if (data & PCI_CMD_MSwapEn) {
switch (data & (PCI_CMD_MWordSwap|PCI_CMD_MByteSwap)) { switch (data & (PCI_CMD_MWordSwap|PCI_CMD_MByteSwap)) {
case PCI_CMD_MWordSwap: case PCI_CMD_MWordSwap:
printf(" mswap=w"); break; aprint_normal(" mswap=w"); break;
case PCI_CMD_MByteSwap: case PCI_CMD_MByteSwap:
printf(" mswap=b"); break; aprint_normal(" mswap=b"); break;
case PCI_CMD_MWordSwap|PCI_CMD_MByteSwap: case PCI_CMD_MWordSwap|PCI_CMD_MByteSwap:
printf(" mswap=b+w"); break; aprint_normal(" mswap=b+w"); break;
case 0: case 0:
printf(" mswap=none"); break; aprint_normal(" mswap=none"); break;
} }
} }
if (data & PCI_CMD_SSwapEn) { if (data & PCI_CMD_SSwapEn) {
switch (data & (PCI_CMD_SWordSwap|PCI_CMD_SByteSwap)) { switch (data & (PCI_CMD_SWordSwap|PCI_CMD_SByteSwap)) {
case PCI_CMD_SWordSwap: case PCI_CMD_SWordSwap:
printf(" sswap=w"); break; aprint_normal(" sswap=w"); break;
case PCI_CMD_SByteSwap: case PCI_CMD_SByteSwap:
printf(" sswap=b"); break; aprint_normal(" sswap=b"); break;
case PCI_CMD_SWordSwap|PCI_CMD_SByteSwap: case PCI_CMD_SWordSwap|PCI_CMD_SByteSwap:
printf(" sswap=b+w"); break; aprint_normal(" sswap=b+w"); break;
case 0: case 0:
printf(" sswap=none"); break; aprint_normal(" sswap=none"); break;
} }
} }
} }
#if DEBUG #if DEBUG
for (i = 0; i < 8; i++) { for (i = 0; i < 8; i++) {
printf("\n%s: Access Control %d: ", self->dv_xname, i); aprint_normal("\n%s: Access Control %d: ", self->dv_xname, i);
printf("base(hi=%#x,lo=%#x)=0x%08x.%03xxxxxx", aprint_normal("base(hi=%#x,lo=%#x)=0x%08x.%03xxxxxx",
PCI_ACCESS_CONTROL_BASE_HIGH(pc->pc_md.mdpc_busno, i), PCI_ACCESS_CONTROL_BASE_HIGH(gtpc->gtpc_busno, i),
PCI_ACCESS_CONTROL_BASE_LOW(pc->pc_md.mdpc_busno, i), PCI_ACCESS_CONTROL_BASE_LOW(gtpc->gtpc_busno, i),
gtpci_read(pc, gtpci_read(gtpc,
PCI_ACCESS_CONTROL_BASE_HIGH(pc->pc_md.mdpc_busno, i)), PCI_ACCESS_CONTROL_BASE_HIGH(gtpc->gtpc_busno, i)),
gtpci_read(pc, gtpci_read(gtpc,
PCI_ACCESS_CONTROL_BASE_LOW(pc->pc_md.mdpc_busno, i)) & 0xfff); PCI_ACCESS_CONTROL_BASE_LOW(gtpc->gtpc_busno, i)) & 0xfff);
printf(" cfg=%#x", aprint_normal(" cfg=%#x",
gtpci_read(pc, gtpci_read(gtpc,
PCI_ACCESS_CONTROL_BASE_LOW(pc->pc_md.mdpc_busno, i)) & ~0xfff); PCI_ACCESS_CONTROL_BASE_LOW(gtpc->gtpc_busno, i)) & ~0xfff);
printf(" top(%#x)=%#x", aprint_normal(" top(%#x)=%#x",
PCI_ACCESS_CONTROL_TOP(pc->pc_md.mdpc_busno, i), PCI_ACCESS_CONTROL_TOP(gtpc->gtpc_busno, i),
gtpci_read(pc, gtpci_read(gtpc,
PCI_ACCESS_CONTROL_TOP(pc->pc_md.mdpc_busno, i))); PCI_ACCESS_CONTROL_TOP(gtpc->gtpc_busno, i)));
} }
#endif #endif
#if 0 #if 0
gtpci_write(pc, PCI_ACCESS_CONTROL_BASE_HIGH(pc->pc_md.mdpc_busno, 0), 0); gtpci_write(gtpc, PCI_ACCESS_CONTROL_BASE_HIGH(gtpc->gtpc_busno, 0), 0);
gtpci_write(pc, PCI_ACCESS_CONTROL_BASE_LOW(pc->pc_md.mdpc_busno, 0), gtpci_write(gtpc, PCI_ACCESS_CONTROL_BASE_LOW(gtpc->gtpc_busno, 0),
0x01001000); 0x01001000);
gtpci_write(pc, PCI_ACCESS_CONTROL_TOP(pc->pc_md.mdpc_busno, 0), gtpci_write(gtpc, PCI_ACCESS_CONTROL_TOP(gtpc->gtpc_busno, 0),
0x00000020); 0x00000020);
#endif #endif
} }
@ -467,16 +468,17 @@ int
gtpci_error_intr(void *arg) gtpci_error_intr(void *arg)
{ {
pci_chipset_tag_t pc = arg; pci_chipset_tag_t pc = arg;
struct gtpci_chipset *gtpc = (struct gtpci_chipset *)pc;
uint32_t cause, mask, errmask; uint32_t cause, mask, errmask;
u_int32_t alo, ahi, dlo, dhi, cmd; u_int32_t alo, ahi, dlo, dhi, cmd;
int i; int i;
cause = gtpci_read(pc, PCI_ERROR_CAUSE(pc->pc_md.mdpc_busno)); cause = gtpci_read(gtpc, PCI_ERROR_CAUSE(gtpc->gtpc_busno));
errmask = gtpci_read(pc, PCI_ERROR_MASK(pc->pc_md.mdpc_busno)); errmask = gtpci_read(gtpc, PCI_ERROR_MASK(gtpc->gtpc_busno));
cause &= (errmask | (0x1f << 27)); cause &= (errmask | (0x1f << 27));
gtpci_write(pc, PCI_ERROR_CAUSE(pc->pc_md.mdpc_busno), ~cause); gtpci_write(gtpc, PCI_ERROR_CAUSE(gtpc->gtpc_busno), ~cause);
printf("%s: pci%d error: cause=%#x mask=%#x", printf("%s: pci%d error: cause=%#x mask=%#x",
pc->pc_parent->dv_xname, pc->pc_md.mdpc_busno, cause, errmask); pc->pc_parent->dv_xname, gtpc->gtpc_busno, cause, errmask);
if ((cause & ~(0x1f << 27)) == 0) { if ((cause & ~(0x1f << 27)) == 0) {
printf(" ?\n"); printf(" ?\n");
return 0; return 0;
@ -492,13 +494,13 @@ gtpci_error_intr(void *arg)
* register must be the last register read by the interrupt * register must be the last register read by the interrupt
* handler." * handler."
*/ */
dlo = gtpci_read(pc, PCI_ERROR_DATA_LOW(pc->pc_md.mdpc_busno)); dlo = gtpci_read(gtpc, PCI_ERROR_DATA_LOW(gtpc->gtpc_busno));
dhi = gtpci_read(pc, PCI_ERROR_DATA_HIGH(pc->pc_md.mdpc_busno)); dhi = gtpci_read(gtpc, PCI_ERROR_DATA_HIGH(gtpc->gtpc_busno));
cmd = gtpci_read(pc, PCI_ERROR_COMMAND(pc->pc_md.mdpc_busno)); cmd = gtpci_read(gtpc, PCI_ERROR_COMMAND(gtpc->gtpc_busno));
ahi = gtpci_read(pc, PCI_ERROR_ADDRESS_HIGH(pc->pc_md.mdpc_busno)); ahi = gtpci_read(gtpc, PCI_ERROR_ADDRESS_HIGH(gtpc->gtpc_busno));
alo = gtpci_read(pc, PCI_ERROR_ADDRESS_LOW(pc->pc_md.mdpc_busno)); alo = gtpci_read(gtpc, PCI_ERROR_ADDRESS_LOW(gtpc->gtpc_busno));
printf("\n%s: pci%d error: %s cmd %#x data %#x.%#x address=%#x.%#x\n", printf("\n%s: pci%d error: %s cmd %#x data %#x.%#x address=%#x.%#x\n",
pc->pc_parent->dv_xname, pc->pc_md.mdpc_busno, pc->pc_parent->dv_xname, gtpc->gtpc_busno,
gtpci_error_strings[PCI_IC_SEL_GET(cause)], gtpci_error_strings[PCI_IC_SEL_GET(cause)],
cmd, dhi, dlo, ahi, alo); cmd, dhi, dlo, ahi, alo);
@ -521,8 +523,8 @@ gtpci_bs_region_add(pci_chipset_tag_t pc, struct discovery_bus_space *bs,
paddr_t pbasel, pbaseh; paddr_t pbasel, pbaseh;
uint32_t datal, datah; uint32_t datal, datah;
datal = gtpci_read(pc, lo); datal = gtpci_read(gtpc, lo);
datah = gtpci_read(pc, hi); datah = gtpci_read(gtpc, hi);
pbasel = GT_LowAddr_GET(datal); pbasel = GT_LowAddr_GET(datal);
pbaseh = GT_HighAddr_GET(datah); pbaseh = GT_HighAddr_GET(datah);
/* /*
@ -577,23 +579,25 @@ gtpci_decompose_tag(pci_chipset_tag_t pc, pcitag_t tag,
pcireg_t pcireg_t
gtpci_conf_read(pci_chipset_tag_t pc, pcitag_t tag, int regno) gtpci_conf_read(pci_chipset_tag_t pc, pcitag_t tag, int regno)
{ {
struct gtpci_chipset *gtpc = (struct gtpci_chipset *)pc;
#ifdef DIAGNOSTIC #ifdef DIAGNOSTIC
if ((regno & 3) || (regno & ~0xff)) if ((regno & 3) || ((regno + 3) & ~0xff))
panic("gtpci_conf_read: bad regno %#x\n", regno); panic("gtpci_conf_read: bad regno %#x\n", regno);
#endif #endif
gtpci_write(pc, pc->pc_md.mdpc_cfgaddr, (int) tag | regno); gtpci_write(gtpc, gtpc->gtpc_cfgaddr, (int) tag | regno);
return gtpci_read(pc, pc->pc_md.mdpc_cfgdata); return gtpci_read(gtpc, gtpc->gtpc_cfgdata);
} }
void void
gtpci_conf_write(pci_chipset_tag_t pc, pcitag_t tag, int regno, pcireg_t data) gtpci_conf_write(pci_chipset_tag_t pc, pcitag_t tag, int regno, pcireg_t data)
{ {
struct gtpci_chipset *gtpc = (struct gtpci_chipset *)pc;
#ifdef DIAGNOSTIC #ifdef DIAGNOSTIC
if ((regno & 3) || (regno & ~0xff)) if ((regno & 3) || ((regno + 3) & ~0xff))
panic("gtpci_conf_write: bad regno %#x\n", regno); panic("gtpci_conf_write: bad regno %#x\n", regno);
#endif #endif
gtpci_write(pc, pc->pc_md.mdpc_cfgaddr, (int) tag | regno); gtpci_write(gtpc, gtpc->gtpc_cfgaddr, (int) tag | regno);
gtpci_write(pc, pc->pc_md.mdpc_cfgdata, data); gtpci_write(gtpc, gtpc->gtpc_cfgdata, data);
} }
const char * const char *

36
sys/dev/marvell/gtpcivar.h
View File

@ -1,4 +1,4 @@
/* $NetBSD: gtpcivar.h,v 1.1 2003/03/05 22:08:22 matt Exp $ */ /* $NetBSD: gtpcivar.h,v 1.2 2003/03/16 07:05:34 matt Exp $ */
/* /*
* Copyright (c) 2002 Allegro Networks, Inc., Wasabi Systems, Inc. * Copyright (c) 2002 Allegro Networks, Inc., Wasabi Systems, Inc.
@ -42,23 +42,40 @@
/* /*
*/ */
struct gtpci_chipset {
struct pci_chipset gtpc_pc;
int gtpc_busno;
bus_space_tag_t gtpc_io_bs;
bus_space_tag_t gtpc_mem_bs;
bus_space_tag_t gtpc_gt_memt;
bus_space_handle_t gtpc_gt_memh;
bus_size_t gtpc_cfgaddr;
bus_size_t gtpc_cfgdata;
bus_size_t gtpc_syncreg;
};
#ifdef _KERNEL
static uint32_t __inline static uint32_t __inline
gtpci_read(pci_chipset_tag_t pc, bus_size_t reg) gtpci_read(struct gtpci_chipset *gtpc, bus_size_t reg)
{ {
uint32_t rv; uint32_t rv;
(void) gt_read(pc->pc_md.mdpc_gt, pc->pc_md.mdpc_syncreg); (void) bus_space_read_4(gtpc->gtpc_gt_memt, gtpc->gtpc_gt_memh,
rv = gt_read(pc->pc_md.mdpc_gt, reg); gtpc->gtpc_syncreg);
(void) gt_read(pc->pc_md.mdpc_gt, pc->pc_md.mdpc_syncreg); rv = bus_space_read_4(gtpc->gtpc_gt_memt, gtpc->gtpc_gt_memh, reg);
(void) bus_space_read_4(gtpc->gtpc_gt_memt, gtpc->gtpc_gt_memh,
gtpc->gtpc_syncreg);
return rv; return rv;
} }
static void __inline static void __inline
gtpci_write(pci_chipset_tag_t pc, bus_size_t reg, uint32_t val) gtpci_write(struct gtpci_chipset *gtpc, bus_size_t reg, uint32_t val)
{ {
(void) gt_read(pc->pc_md.mdpc_gt, pc->pc_md.mdpc_syncreg); (void) bus_space_read_4(gtpc->gtpc_gt_memt, gtpc->gtpc_gt_memh,
gt_write(pc->pc_md.mdpc_gt, reg, val); gtpc->gtpc_syncreg);
(void) gt_read(pc->pc_md.mdpc_gt, pc->pc_md.mdpc_syncreg); bus_space_write_4(gtpc->gtpc_gt_memt, gtpc->gtpc_gt_memh, reg, val);
(void) bus_space_read_4(gtpc->gtpc_gt_memt, gtpc->gtpc_gt_memh,
gtpc->gtpc_syncreg);
} }
pcitag_t gtpci_make_tag(pci_chipset_tag_t, int, int, int); pcitag_t gtpci_make_tag(pci_chipset_tag_t, int, int, int);
@ -70,5 +87,6 @@ void gtpci_md_bus_devorder(pci_chipset_tag_t, int, char []);
int gtpci_md_intr_map(struct pci_attach_args *, pci_intr_handle_t *); int gtpci_md_intr_map(struct pci_attach_args *, pci_intr_handle_t *);
int gtpci_md_conf_hook(pci_chipset_tag_t, int, int, int, pcireg_t); int gtpci_md_conf_hook(pci_chipset_tag_t, int, int, int, pcireg_t);
void gtpci_md_conf_interrupt(pci_chipset_tag_t, int, int, int, int, int *); void gtpci_md_conf_interrupt(pci_chipset_tag_t, int, int, int, int, int *);
#endif /* _KERNEL */
#endif /* _DEV_MARVELL_GTPCIVAR_H */ #endif /* _DEV_MARVELL_GTPCIVAR_H */

110
sys/dev/marvell/gtvar.h
View File

@ -1,4 +1,4 @@
/* $NetBSD: gtvar.h,v 1.1 2003/03/05 22:08:23 matt Exp $ */ /* $NetBSD: gtvar.h,v 1.2 2003/03/16 07:05:34 matt Exp $ */
/* /*
* Copyright (c) 2002 Allegro Networks, Inc., Wasabi Systems, Inc. * Copyright (c) 2002 Allegro Networks, Inc., Wasabi Systems, Inc.
@ -41,36 +41,59 @@
* gtvar.h -- placeholder for GT system controller driver * gtvar.h -- placeholder for GT system controller driver
*/ */
#ifndef _DISCOVERY_DEV_GTVAR_H_ #ifndef _DISCOVERY_DEV_GTVAR_H_
#define _DISCOVERY_DEV_GTVAR_H_ #define _DISCOVERY_DEV_GTVAR_H_
#include <sys/systm.h> #include <sys/systm.h>
#define GTPCI_NBUS 2 #define GTPCI_NBUS 2
struct gt_softc { struct gt_softc {
struct device gt_dev; struct device gt_dev;
vaddr_t gt_vbase; /* mapped GT base address */
#if 0
vaddr_t gt_iobat_vbase; /* I/O BAT virtual base */
paddr_t gt_iobat_pbase; /* I/O BAT physical base */
vsize_t gt_iobat_mask; /* I/O BAT mask (signif. bits only) */
#endif
struct pci_chipset *gt_pcis[GTPCI_NBUS];
bus_dma_tag_t gt_dmat; bus_dma_tag_t gt_dmat;
bus_space_tag_t gt_memt; bus_space_tag_t gt_memt; /* the GT itself */
bus_space_tag_t gt_pci0_memt; bus_space_tag_t gt_pci0_memt; /* PCI0 mem space */
bus_space_tag_t gt_pci0_iot; bus_space_tag_t gt_pci0_iot; /* PCI0 i/o space */
bus_space_tag_t gt_pci1_memt; bus_space_tag_t gt_pci1_memt; /* PCI1 mem space */
bus_space_tag_t gt_pci1_iot; bus_space_tag_t gt_pci1_iot; /* PCI1 i/o space */
bus_space_handle_t gt_memh; /* to access the GT registers */
int gt_childmask; /* what children are present */
}; };
#define GT_CHILDOK(gt, ga, cd, pos, max) \
(((ga)->ga_unit) < (max) && \
!((gt)->gt_childmask & (1 << (((ga)->ga_unit) + (pos)))) && \
!strcmp((ga)->ga_name, (cd)->cd_name))
#define GT_MPSCOK(gt, ga, cd) GT_CHILDOK((gt), (ga), (cd), 0, 2)
#define GT_PCIOK(gt, ga, cd) GT_CHILDOK((gt), (ga), (cd), 2, 2)
#define GT_ETHEROK(gt, ga, cd) GT_CHILDOK((gt), (ga), (cd), 4, 3)
#define GT_OBIOOK(gt, ga, cd) GT_CHILDOK((gt), (ga), (cd), 7, 5)
#define GT_CHILDFOUND(gt, ga, pos) \
((void)(((gt)->gt_childmask |= (1 << (((ga)->ga_unit) + (pos))))))
#define GT_MPSCFOUND(gt, ga) GT_CHILDFOUND((gt), (ga), 0)
#define GT_PCIFOUND(gt, ga) GT_CHILDFOUND((gt), (ga), 2)
#define GT_ETHERFOUND(gt, ga) GT_CHILDFOUND((gt), (ga), 4)
#define GT_OBIOFOUND(gt, ga) GT_CHILDFOUND((gt), (ga), 7)
struct gt_attach_args { struct gt_attach_args {
const char *ga_name; /* class name of device */ const char *ga_name; /* class name of device */
bus_dma_tag_t ga_dmat; /* dma tag */ bus_dma_tag_t ga_dmat; /* dma tag */
bus_space_tag_t ga_memt; /* GT bus space tag */ bus_space_tag_t ga_memt; /* GT bus space tag */
bus_space_handle_t ga_memh; /* GT bus space handle */
int ga_unit; /* instance of ga_name */ int ga_unit; /* instance of ga_name */
}; };
struct obio_attach_args {
const char *oa_name; /* call name of device */
bus_space_tag_t oa_memt; /* bus space tag */
bus_addr_t oa_offset; /* offset (absolute) to device */
bus_size_t oa_size; /* size (strided) of device */
int oa_irq; /* irq */
};
#ifdef _KERNEL #ifdef _KERNEL
#include "locators.h" #include "locators.h"
@ -81,58 +104,39 @@ extern int gtpci_debug;
/* /*
* Locators for GT private devices, as specified to config. * Locators for GT private devices, as specified to config.
*/ */
#define gtcf_dev cf_loc[GTCF_DEV] #define gtcf_unit cf_loc[GTCF_UNIT]
#define GT_UNK_DEV GTCF_DEV_DEFAULT /* wcarded 'dev' */ #define GT_UNK_UNIT GTCF_UNIT_DEFAULT /* wcarded 'function' */
#define gtcf_function cf_loc[GTCF_FUNCTION] #define obiocf_offset cf_loc[OBIOCF_OFFSET]
#define GT_UNK_FUNCTION GTCF_FUNCTION_DEFAULT /* wcarded 'function' */ #define OBIO_UNK_OFFSET OBIOCF_OFFSET_DEFAULT /* wcarded 'offset' */
#define obiocf_size cf_loc[OBIOCF_SIZE]
#define OBIO_UNK_SIZE OBIOCF_SIZE_DEFAULT /* wcarded 'size' */
#define obiocf_irq cf_loc[OBIOCF_IRQ]
#define OBIO_UNK_IRQ OBIOCF_IRQ_DEFAULT /* wcarded 'irq' */
void gt_attach_common(struct gt_softc *); void gt_attach_common(struct gt_softc *);
uint32_t gt_read_mpp(void); uint32_t gt_read_mpp(void);
int gt_cfprint (void *, const char *); int gt_cfprint (void *, const char *);
void gtpci_config(struct gt_softc *, int, struct pci_chipset;
bus_space_tag_t, bus_space_tag_t, bus_dma_tag_t);
void gteth_config (struct gt_softc *, int); void gtpci_config_bus(struct pci_chipset *, int);
void gtmpsc_config (struct gt_softc *, int);
/* int gt_bs_extent_init(struct discovery_bus_space *, char *); AKB */ /* int gt_bs_extent_init(struct discovery_bus_space *, char *); AKB */
int gt_mii_read (struct device *, struct device *, int, int); int gt_mii_read (struct device *, struct device *, int, int);
void gt_mii_write (struct device *, struct device *, int, int, int); void gt_mii_write (struct device *, struct device *, int, int, int);
int gtget_macaddr(struct gt_softc *gt, int function, char *enaddr); int gtget_macaddr(struct gt_softc *,int, char *);
void gtpci_config_bus(struct pci_chipset *pc, int busno);
void gt_setup(struct device *gt);
void gt_watchdog_service(void); void gt_watchdog_service(void);
#define gt_read(a,b) gt_read_4(a,b) #define gt_read(gt,o) \
#define gt_write(a,b,c) gt_write_4(a,b,c) bus_space_read_4((gt)->gt_memt, (gt)->gt_memh, (o))
#define gt_write(gt,o,v) \
static __inline uint32_t bus_space_write_4((gt)->gt_memt, (gt)->gt_memh, (o), (v))
gt_read_4(struct device *dv, bus_addr_t off)
{
struct gt_softc *gt = (struct gt_softc *) dv;
uint32_t rv;
__asm __volatile("eieio; lwbrx %0,%1,%2; eieio;"
: "=r"(rv)
: "b"(gt->gt_vbase), "r"(off));
return rv;
}
static __inline void
gt_write_4(struct device *dv, bus_addr_t off, uint32_t v)
{
struct gt_softc *gt = (struct gt_softc *) dv;
__asm __volatile("eieio; stwbrx %0,%1,%2; eieio;"
:: "r"(v), "b"(gt->gt_vbase), "r"(off));
}
#if defined(__powerpc__) #if defined(__powerpc__)
static volatile inline int atomic_add(volatile int *p, int v); static __inline volatile int
static volatile inline int
atomic_add(volatile int *p, int v) atomic_add(volatile int *p, int v)
{ {
int rv; int rv;

203
sys/dev/marvell/if_gfe.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: if_gfe.c,v 1.1 2003/03/05 22:08:23 matt Exp $ */ /* $NetBSD: if_gfe.c,v 1.2 2003/03/16 07:05:34 matt Exp $ */
/* /*
* Copyright (c) 2002 Allegro Networks, Inc., Wasabi Systems, Inc. * Copyright (c) 2002 Allegro Networks, Inc., Wasabi Systems, Inc.
@ -82,9 +82,11 @@
#include <dev/marvell/if_gfevar.h> #include <dev/marvell/if_gfevar.h>
#define GE_READ(sc, reg) \ #define GE_READ(sc, reg) \
gt_read((sc)->sc_dev.dv_parent, ETH_ ## reg ((sc)->sc_macno)) bus_space_read_4((sc)->sc_gt_memt, (sc)->sc_gt_memh, \
ETH_ ## reg ((sc)->sc_macno))
#define GE_WRITE(sc, reg, v) \ #define GE_WRITE(sc, reg, v) \
gt_write((sc)->sc_dev.dv_parent, ETH_ ## reg ((sc)->sc_macno), (v)) bus_space_write_4((sc)->sc_gt_memt, (sc)->sc_gt_memh, \
ETH_ ## reg ((sc)->sc_macno), (v))
#define GE_DEBUG #define GE_DEBUG
#if 0 #if 0
@ -113,12 +115,21 @@ enum gfe_hash_op {
GE_HASH_ADD, GE_HASH_REMOVE, GE_HASH_ADD, GE_HASH_REMOVE,
}; };
#if 1
#define htogt32(a) htobe32(a)
#define gt32toh(a) be32toh(a)
#else
#define htogt32(a) htole32(a)
#define gt32toh(a) le32toh(a)
#endif
#define STATIC #define STATIC
STATIC int gfe_match (struct device *, struct cfdata *, void *); STATIC int gfe_match (struct device *, struct cfdata *, void *);
STATIC void gfe_attach (struct device *, struct device *, void *); STATIC void gfe_attach (struct device *, struct device *, void *);
STATIC int gfe_dmamem_alloc(struct gfe_softc *, struct gfe_dmamem *, int, size_t); STATIC int gfe_dmamem_alloc(struct gfe_softc *, struct gfe_dmamem *, int,
size_t, int);
STATIC void gfe_dmamem_free(struct gfe_softc *, struct gfe_dmamem *); STATIC void gfe_dmamem_free(struct gfe_softc *, struct gfe_dmamem *);
STATIC int gfe_ifioctl (struct ifnet *, u_long, caddr_t); STATIC int gfe_ifioctl (struct ifnet *, u_long, caddr_t);
@ -163,6 +174,8 @@ STATIC int gfe_hash_alloc(struct gfe_softc *);
CFATTACH_DECL(gfe, sizeof(struct gfe_softc), CFATTACH_DECL(gfe, sizeof(struct gfe_softc),
gfe_match, gfe_attach, NULL, NULL); gfe_match, gfe_attach, NULL, NULL);
extern struct cfdriver gfe_cd;
int int
gfe_match(struct device *parent, struct cfdata *cf, void *aux) gfe_match(struct device *parent, struct cfdata *cf, void *aux)
{ {
@ -170,7 +183,7 @@ gfe_match(struct device *parent, struct cfdata *cf, void *aux)
struct gt_attach_args *ga = aux; struct gt_attach_args *ga = aux;
uint8_t enaddr[6]; uint8_t enaddr[6];
if (ga->ga_unit > 2) if (!GT_ETHEROK(gt, ga, &gfe_cd))
return 0; return 0;
if (gtget_macaddr(gt, ga->ga_unit, enaddr) < 0) if (gtget_macaddr(gt, ga->ga_unit, enaddr) < 0)
@ -198,13 +211,16 @@ gfe_attach(struct device *parent, struct device *self, void *aux)
int phyaddr; int phyaddr;
uint32_t sdcr; uint32_t sdcr;
sc->sc_memt = ga->ga_memt; GT_ETHERFOUND(gt, ga);
sc->sc_gt_memt = ga->ga_memt;
sc->sc_gt_memh = ga->ga_memh;
sc->sc_dmat = ga->ga_dmat; sc->sc_dmat = ga->ga_dmat;
sc->sc_macno = ga->ga_unit; sc->sc_macno = ga->ga_unit;
callout_init(&sc->sc_co); callout_init(&sc->sc_co);
data = gt_read(parent, ETH_EPAR); data = bus_space_read_4(sc->sc_gt_memt, sc->sc_gt_memh, ETH_EPAR);
phyaddr = ETH_EPAR_PhyAD_GET(data, sc->sc_macno); phyaddr = ETH_EPAR_PhyAD_GET(data, sc->sc_macno);
gtget_macaddr(gt, sc->sc_macno, enaddr); gtget_macaddr(gt, sc->sc_macno, enaddr);
@ -213,14 +229,20 @@ gfe_attach(struct device *parent, struct device *self, void *aux)
sc->sc_pcxr = GE_READ(sc, EPCXR); sc->sc_pcxr = GE_READ(sc, EPCXR);
sc->sc_intrmask = GE_READ(sc, EIMR) | ETH_IR_MIIPhySTC; sc->sc_intrmask = GE_READ(sc, EIMR) | ETH_IR_MIIPhySTC;
printf(": address %s, phy %d", ether_sprintf(enaddr), phyaddr); aprint_normal(": address %s", ether_sprintf(enaddr));
#if defined(DEBUG) #if defined(DEBUG)
printf(", pcr %#x, pcxr %#x", sc->sc_pcr, sc->sc_pcxr); aprint_normal(", pcr %#x, pcxr %#x", sc->sc_pcr, sc->sc_pcxr);
#endif #endif
sc->sc_pcxr &= ~ETH_EPCXR_PRIOrx_Override; sc->sc_pcxr &= ~ETH_EPCXR_PRIOrx_Override;
sc->sc_pcxr |= ETH_EPCXR_RMIIEn; if (sc->sc_dev.dv_cfdata->cf_flags & 1) {
aprint_normal(", phy %d (rmii)", phyaddr);
sc->sc_pcxr |= ETH_EPCXR_RMIIEn;
} else {
aprint_normal(", phy %d (mii)", phyaddr);
sc->sc_pcxr &= ~ETH_EPCXR_RMIIEn;
}
sc->sc_pcxr &= ~(3 << 14); sc->sc_pcxr &= ~(3 << 14);
sc->sc_pcxr |= (ETH_EPCXR_MFL_1536 << 14); sc->sc_pcxr |= (ETH_EPCXR_MFL_1536 << 14);
@ -238,7 +260,7 @@ gfe_attach(struct device *parent, struct device *self, void *aux)
sc->sc_pcr &= ~ETH_EPCR_EN; sc->sc_pcr &= ~ETH_EPCR_EN;
#if defined(DEBUG) #if defined(DEBUG)
printf(", pcr %#x, pcxr %#x", sc->sc_pcr, sc->sc_pcxr); aprint_normal(", pcr %#x, pcxr %#x", sc->sc_pcr, sc->sc_pcxr);
#endif #endif
/* /*
@ -252,7 +274,7 @@ gfe_attach(struct device *parent, struct device *self, void *aux)
GE_WRITE(sc, ESDCR, sdcr); GE_WRITE(sc, ESDCR, sdcr);
sc->sc_max_frame_length = 1536; sc->sc_max_frame_length = 1536;
printf("\n"); aprint_normal("\n");
sc->sc_mii.mii_ifp = &sc->sc_ec.ec_if; sc->sc_mii.mii_ifp = &sc->sc_ec.ec_if;
sc->sc_mii.mii_readreg = gfe_mii_read; sc->sc_mii.mii_readreg = gfe_mii_read;
sc->sc_mii.mii_writereg = gfe_mii_write; sc->sc_mii.mii_writereg = gfe_mii_write;
@ -273,6 +295,7 @@ gfe_attach(struct device *parent, struct device *self, void *aux)
ifp = &sc->sc_ec.ec_if; ifp = &sc->sc_ec.ec_if;
strcpy(ifp->if_xname, sc->sc_dev.dv_xname); strcpy(ifp->if_xname, sc->sc_dev.dv_xname);
ifp->if_softc = sc; ifp->if_softc = sc;
/* ifp->if_mowner = &sc->sc_mowner; */
ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
#if 0 #if 0
ifp->if_flags |= IFF_DEBUG; ifp->if_flags |= IFF_DEBUG;
@ -295,13 +318,17 @@ gfe_attach(struct device *parent, struct device *self, void *aux)
int int
gfe_dmamem_alloc(struct gfe_softc *sc, struct gfe_dmamem *gdm, int maxsegs, gfe_dmamem_alloc(struct gfe_softc *sc, struct gfe_dmamem *gdm, int maxsegs,
size_t size) size_t size, int flags)
{ {
int error = 0; int error = 0;
GE_FUNC_ENTER(sc, "gfe_dmamem_alloc"); GE_FUNC_ENTER(sc, "gfe_dmamem_alloc");
gdm->gdm_size = size; gdm->gdm_size = size;
gdm->gdm_maxsegs = maxsegs; gdm->gdm_maxsegs = maxsegs;
#if 1
flags |= BUS_DMA_NOCACHE;
#endif
error = bus_dmamem_alloc(sc->sc_dmat, gdm->gdm_size, NBPG, error = bus_dmamem_alloc(sc->sc_dmat, gdm->gdm_size, NBPG,
gdm->gdm_size, gdm->gdm_segs, gdm->gdm_maxsegs, &gdm->gdm_nsegs, gdm->gdm_size, gdm->gdm_segs, gdm->gdm_maxsegs, &gdm->gdm_nsegs,
BUS_DMA_NOWAIT); BUS_DMA_NOWAIT);
@ -309,7 +336,7 @@ gfe_dmamem_alloc(struct gfe_softc *sc, struct gfe_dmamem *gdm, int maxsegs,
goto fail; goto fail;
error = bus_dmamem_map(sc->sc_dmat, gdm->gdm_segs, gdm->gdm_nsegs, error = bus_dmamem_map(sc->sc_dmat, gdm->gdm_segs, gdm->gdm_nsegs,
gdm->gdm_size, &gdm->gdm_kva, BUS_DMA_COHERENT|BUS_DMA_NOWAIT); gdm->gdm_size, &gdm->gdm_kva, flags | BUS_DMA_NOWAIT);
if (error) if (error)
goto fail; goto fail;
@ -320,19 +347,20 @@ gfe_dmamem_alloc(struct gfe_softc *sc, struct gfe_dmamem *gdm, int maxsegs,
error = bus_dmamap_load(sc->sc_dmat, gdm->gdm_map, gdm->gdm_kva, error = bus_dmamap_load(sc->sc_dmat, gdm->gdm_map, gdm->gdm_kva,
gdm->gdm_size, NULL, BUS_DMA_NOWAIT); gdm->gdm_size, NULL, BUS_DMA_NOWAIT);
if (error)
goto fail;
#if 1 /* invalidate from cache */
{ bus_dmamap_sync(sc->sc_dmat, gdm->gdm_map, 0, gdm->gdm_size,
size_t i; BUS_DMASYNC_PREREAD);
for (i = 0; i < gdm->gdm_size; i += 32)
__asm __volatile("dcbf 0,%0" :: "r" (gdm->gdm_kva + i));
}
#endif
fail: fail:
if (error) { if (error) {
gfe_dmamem_free(sc, gdm); gfe_dmamem_free(sc, gdm);
GE_DPRINTF(sc, (":err=%d", error)); GE_DPRINTF(sc, (":err=%d", error));
} }
GE_DPRINTF(sc, (":kva=%p/%#x,map=%p,nsegs=%d,pa=%x/%x",
gdm->gdm_kva, gdm->gdm_size, gdm->gdm_map, gdm->gdm_map->dm_nsegs,
gdm->gdm_map->dm_segs->ds_addr, gdm->gdm_map->dm_segs->ds_len));
GE_FUNC_EXIT(sc, ""); GE_FUNC_EXIT(sc, "");
return error; return error;
} }
@ -497,7 +525,7 @@ gfe_ifwatchdog(struct ifnet *ifp)
printf("%s: device timeout", printf("%s: device timeout",
sc->sc_dev.dv_xname); sc->sc_dev.dv_xname);
if ((txq = sc->sc_txq[GE_TXPRIO_HI]) != NULL) { if ((txq = sc->sc_txq[GE_TXPRIO_HI]) != NULL) {
unsigned int curtxdnum = (gt_read(sc->sc_dev.dv_parent, txq->txq_ectdp) - txq->txq_desc_busaddr) / 16; unsigned int curtxdnum = (bus_space_read_4(sc->sc_gt_memt, sc->sc_gt_memh, txq->txq_ectdp) - txq->txq_desc_busaddr) / 16;
printf(" (fi=%d,lo=%d,cur=%d(%#x),icm=%#x) ", printf(" (fi=%d,lo=%d,cur=%d(%#x),icm=%#x) ",
txq->txq_fi, txq->txq_lo, curtxdnum, txq->txq_fi, txq->txq_lo, curtxdnum,
txq->txq_descs[curtxdnum].ed_cmdsts, txq->txq_descs[curtxdnum].ed_cmdsts,
@ -521,6 +549,7 @@ gfe_rx_rxqalloc(struct gfe_softc *sc, enum gfe_rxprio rxprio)
bus_size_t boff; bus_size_t boff;
GE_FUNC_ENTER(sc, "gfe_rx_rxqalloc"); GE_FUNC_ENTER(sc, "gfe_rx_rxqalloc");
GE_DPRINTF(sc, ("(%d)", rxprio));
if (sc->sc_rxq[rxprio] != NULL) { if (sc->sc_rxq[rxprio] != NULL) {
GE_FUNC_EXIT(sc, ""); GE_FUNC_EXIT(sc, "");
return 0; return 0;
@ -534,14 +563,15 @@ gfe_rx_rxqalloc(struct gfe_softc *sc, enum gfe_rxprio rxprio)
memset(rxq, 0, sizeof(*rxq)); memset(rxq, 0, sizeof(*rxq));
error = gfe_dmamem_alloc(sc, &rxq->rxq_desc_mem, 1, GE_RXDESC_MEMSIZE); error = gfe_dmamem_alloc(sc, &rxq->rxq_desc_mem, 1,
GE_RXDESC_MEMSIZE, 0);
if (error) { if (error) {
free(rxq, M_DEVBUF); free(rxq, M_DEVBUF);
GE_FUNC_EXIT(sc, "!!"); GE_FUNC_EXIT(sc, "!!");
return error; return error;
} }
error = gfe_dmamem_alloc(sc, &rxq->rxq_buf_mem, GE_RXBUF_NSEGS, error = gfe_dmamem_alloc(sc, &rxq->rxq_buf_mem, GE_RXBUF_NSEGS,
GE_RXBUF_MEMSIZE); GE_RXBUF_MEMSIZE, 0);
if (error) { if (error) {
gfe_dmamem_free(sc, &rxq->rxq_desc_mem); gfe_dmamem_free(sc, &rxq->rxq_desc_mem);
free(rxq, M_DEVBUF); free(rxq, M_DEVBUF);
@ -563,28 +593,27 @@ gfe_rx_rxqalloc(struct gfe_softc *sc, enum gfe_rxprio rxprio)
nxtaddr = rxq->rxq_desc_busaddr + sizeof(*rxd); nxtaddr = rxq->rxq_desc_busaddr + sizeof(*rxd);
idx < GE_RXDESC_MAX; idx < GE_RXDESC_MAX;
idx++, rxd++, nxtaddr += sizeof(*rxd)) { idx++, rxd++, nxtaddr += sizeof(*rxd)) {
rxd->ed_cmdsts = htobe32(RX_CMD_F|RX_CMD_L|RX_CMD_O|RX_CMD_EI); rxd->ed_lencnt = htogt32(GE_RXBUF_SIZE << 16);
rxd->ed_lencnt = htobe32(GE_RXBUF_SIZE << 16); rxd->ed_cmdsts = htogt32(RX_CMD_F|RX_CMD_L|RX_CMD_O|RX_CMD_EI);
rxd->ed_bufptr = htobe32(ds->ds_addr + boff); rxd->ed_bufptr = htogt32(ds->ds_addr + boff);
/* /*
* update the nxtptr to point to the next txd. * update the nxtptr to point to the next txd.
*/ */
if (idx == GE_RXDESC_MAX - 1) if (idx == GE_RXDESC_MAX - 1)
nxtaddr = rxq->rxq_desc_busaddr; nxtaddr = rxq->rxq_desc_busaddr;
rxd->ed_nxtptr = htobe32(nxtaddr); rxd->ed_nxtptr = htogt32(nxtaddr);
boff += GE_RXBUF_SIZE; boff += GE_RXBUF_SIZE;
if (boff == ds->ds_len) { if (boff == ds->ds_len) {
ds++; ds++;
boff = 0; boff = 0;
} }
__asm __volatile("dcbf 0,%0" :: "r" (rxd));
} }
bus_dmamap_sync(sc->sc_dmat, rxq->rxq_desc_mem.gdm_map, 0, bus_dmamap_sync(sc->sc_dmat, rxq->rxq_desc_mem.gdm_map, 0,
rxq->rxq_desc_mem.gdm_map->dm_mapsize, rxq->rxq_desc_mem.gdm_map->dm_mapsize,
BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
bus_dmamap_sync(sc->sc_dmat, rxq->rxq_buf_mem.gdm_map, 0, bus_dmamap_sync(sc->sc_dmat, rxq->rxq_buf_mem.gdm_map, 0,
rxq->rxq_buf_mem.gdm_map->dm_mapsize, rxq->rxq_buf_mem.gdm_map->dm_mapsize,
BUS_DMASYNC_PREWRITE); BUS_DMASYNC_PREREAD);
rxq->rxq_intrbits = ETH_IR_RxBuffer|ETH_IR_RxError; rxq->rxq_intrbits = ETH_IR_RxBuffer|ETH_IR_RxError;
switch (rxprio) { switch (rxprio) {
@ -651,11 +680,10 @@ gfe_rx_get(struct gfe_softc *sc, enum gfe_rxprio rxprio)
unsigned int cmdsts; unsigned int cmdsts;
size_t buflen; size_t buflen;
__asm __volatile("dcbi 0,%0" :: "r" (rxd));
bus_dmamap_sync(sc->sc_dmat, rxq->rxq_desc_mem.gdm_map, bus_dmamap_sync(sc->sc_dmat, rxq->rxq_desc_mem.gdm_map,
rxq->rxq_fi * sizeof(*rxd), sizeof(*rxd), rxq->rxq_fi * sizeof(*rxd), sizeof(*rxd),
BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
cmdsts = be32toh(rxd->ed_cmdsts); cmdsts = gt32toh(rxd->ed_cmdsts);
GE_DPRINTF(sc, (":%d=%#x", rxq->rxq_fi, cmdsts)); GE_DPRINTF(sc, (":%d=%#x", rxq->rxq_fi, cmdsts));
rxq->rxq_cmdsts = cmdsts; rxq->rxq_cmdsts = cmdsts;
/* /*
@ -663,8 +691,11 @@ gfe_rx_get(struct gfe_softc *sc, enum gfe_rxprio rxprio)
* But if the length has been rewritten, the packet is ours * But if the length has been rewritten, the packet is ours
* so pretend the O bit is set. * so pretend the O bit is set.
*/ */
buflen = be32toh(rxd->ed_lencnt) & 0xffff; buflen = gt32toh(rxd->ed_lencnt) & 0xffff;
if ((cmdsts & RX_CMD_O) && buflen == 0) { if ((cmdsts & RX_CMD_O) && buflen == 0) {
bus_dmamap_sync(sc->sc_dmat, rxq->rxq_desc_mem.gdm_map,
rxq->rxq_fi * sizeof(*rxd), sizeof(*rxd),
BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
break; break;
} }
@ -707,7 +738,7 @@ gfe_rx_get(struct gfe_softc *sc, enum gfe_rxprio rxprio)
ifp->if_ibytes += buflen; ifp->if_ibytes += buflen;
bus_dmamap_sync(sc->sc_dmat, rxq->rxq_buf_mem.gdm_map, bus_dmamap_sync(sc->sc_dmat, rxq->rxq_buf_mem.gdm_map,
rxq->rxq_fi * sizeof(*rxb), buflen, BUS_DMASYNC_POSTWRITE); rxq->rxq_fi * sizeof(*rxb), buflen, BUS_DMASYNC_POSTREAD);
KASSERT(m->m_len == 0 && m->m_pkthdr.len == 0); KASSERT(m->m_len == 0 && m->m_pkthdr.len == 0);
memcpy(m->m_data + m->m_len, rxb->rb_data, buflen); memcpy(m->m_data + m->m_len, rxb->rb_data, buflen);
@ -749,8 +780,13 @@ pkt_dump(sc,m->m_data+m->m_len,buflen);
give_it_back: give_it_back:
rxd->ed_lencnt &= ~0xffff; /* zero out length */ rxd->ed_lencnt &= ~0xffff; /* zero out length */
rxd->ed_cmdsts = htobe32(RX_CMD_F|RX_CMD_L|RX_CMD_O|RX_CMD_EI); rxd->ed_cmdsts = htogt32(RX_CMD_F|RX_CMD_L|RX_CMD_O|RX_CMD_EI);
__asm __volatile("dcbf 0,%0" :: "r" (rxd)); #if 0
GE_DPRINTF(sc, ("([%d]->%08lx.%08lx.%08lx.%08lx)",
rxq->rxq_fi,
((unsigned long *)rxd)[0], ((unsigned long *)rxd)[1],
((unsigned long *)rxd)[2], ((unsigned long *)rxd)[3]));
#endif
bus_dmamap_sync(sc->sc_dmat, rxq->rxq_desc_mem.gdm_map, bus_dmamap_sync(sc->sc_dmat, rxq->rxq_desc_mem.gdm_map,
rxq->rxq_fi * sizeof(*rxd), sizeof(*rxd), rxq->rxq_fi * sizeof(*rxd), sizeof(*rxd),
BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
@ -799,16 +835,18 @@ gfe_rx_process(struct gfe_softc *sc, uint32_t cause, uint32_t intrmask)
GE_DPRINTF(sc, ("%s: rx queue %d filled at %u\n", GE_DPRINTF(sc, ("%s: rx queue %d filled at %u\n",
sc->sc_dev.dv_xname, rxprio, rxq->rxq_fi)); sc->sc_dev.dv_xname, rxprio, rxq->rxq_fi));
memset(masks, 0, sizeof(masks)); memset(masks, 0, sizeof(masks));
bus_dmamap_sync(sc->sc_dmat, rxq->rxq_desc_mem.gdm_map,
0, rxq->rxq_desc_mem.gdm_size,
BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
for (idx = 0; idx < GE_RXDESC_MAX; idx++) { for (idx = 0; idx < GE_RXDESC_MAX; idx++) {
volatile struct gt_eth_desc *rxd = &rxq->rxq_descs[idx]; volatile struct gt_eth_desc *rxd = &rxq->rxq_descs[idx];
__asm __volatile("dcbi 0,%0" :: "r" (rxd)); if (RX_CMD_O & gt32toh(rxd->ed_cmdsts))
bus_dmamap_sync(sc->sc_dmat, rxq->rxq_desc_mem.gdm_map,
idx * sizeof(*rxd), sizeof(*rxd),
BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
if (RX_CMD_O & be32toh(rxd->ed_cmdsts))
masks[idx/32] |= 1 << (idx & 31); masks[idx/32] |= 1 << (idx & 31);
} }
bus_dmamap_sync(sc->sc_dmat, rxq->rxq_desc_mem.gdm_map,
0, rxq->rxq_desc_mem.gdm_size,
BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
#if defined(DEBUG) #if defined(DEBUG)
printf("%s: rx queue %d filled at %u=%#x(%#x/%#x)\n", printf("%s: rx queue %d filled at %u=%#x(%#x/%#x)\n",
sc->sc_dev.dv_xname, rxprio, rxq->rxq_fi, sc->sc_dev.dv_xname, rxprio, rxq->rxq_fi,
@ -998,15 +1036,18 @@ gfe_tx_enqueue(struct gfe_softc *sc, enum gfe_txprio txprio)
bus_dmamap_sync(sc->sc_dmat, txq->txq_desc_mem.gdm_map, bus_dmamap_sync(sc->sc_dmat, txq->txq_desc_mem.gdm_map,
txq->txq_fi * sizeof(*txd), sizeof(*txd), txq->txq_fi * sizeof(*txd), sizeof(*txd),
BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
cmdsts = be32toh(txd2->ed_cmdsts); cmdsts = gt32toh(txd2->ed_cmdsts);
if (cmdsts & TX_CMD_O) { if (cmdsts & TX_CMD_O) {
bus_dmamap_sync(sc->sc_dmat, txq->txq_desc_mem.gdm_map,
txq->txq_fi * sizeof(*txd), sizeof(*txd),
BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
GE_FUNC_EXIT(sc, "@"); GE_FUNC_EXIT(sc, "@");
return 0; return 0;
} }
if (++txq->txq_fi == GE_TXDESC_MAX) if (++txq->txq_fi == GE_TXDESC_MAX)
txq->txq_fi = 0; txq->txq_fi = 0;
txq->txq_inptr = be32toh(txd2->ed_bufptr) - txq->txq_buf_busaddr; txq->txq_inptr = gt32toh(txd2->ed_bufptr) - txq->txq_buf_busaddr;
pktlen = (be32toh(txd2->ed_lencnt) >> 16) & 0xffff; pktlen = (gt32toh(txd2->ed_lencnt) >> 16) & 0xffff;
txq->txq_inptr += (pktlen + 7) & ~7; txq->txq_inptr += (pktlen + 7) & ~7;
txq->txq_nactive--; txq->txq_nactive--;
@ -1058,32 +1099,36 @@ GE_DPRINTF(sc,("\n"));
pkt_dump(sc, txq->txq_buf_mem.gdm_kva + txq->txq_outptr, m->m_pkthdr.len); pkt_dump(sc, txq->txq_buf_mem.gdm_kva + txq->txq_outptr, m->m_pkthdr.len);
#endif #endif
bus_dmamap_sync(sc->sc_dmat, txq->txq_buf_mem.gdm_map, bus_dmamap_sync(sc->sc_dmat, txq->txq_buf_mem.gdm_map,
txq->txq_outptr, m->m_pkthdr.len, BUS_DMASYNC_PREREAD); txq->txq_outptr, m->m_pkthdr.len, BUS_DMASYNC_PREWRITE);
txd->ed_bufptr = htobe32(txq->txq_buf_busaddr + txq->txq_outptr); txd->ed_bufptr = htogt32(txq->txq_buf_busaddr + txq->txq_outptr);
txd->ed_lencnt = htobe32(m->m_pkthdr.len << 16); txd->ed_lencnt = htogt32(m->m_pkthdr.len << 16);
#if 0
bus_dmamap_sync(sc->sc_dmat, txq->txq_desc_mem.gdm_map, bus_dmamap_sync(sc->sc_dmat, txq->txq_desc_mem.gdm_map,
txq->txq_lo * sizeof(*txd), sizeof(*txd), txq->txq_lo * sizeof(*txd), sizeof(*txd),
BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
GE_DPRINTF(sc, ("(p/l=%#lx/%d)", #endif
(unsigned long) txq->txq_buf_busaddr + txq->txq_outptr,
m->m_pkthdr.len));
/* /*
* Request a buffer interrupt every 2/3 of the way thru the transmit * Request a buffer interrupt every 2/3 of the way thru the transmit
* buffer. * buffer.
*/ */
txq->txq_ei_gapcount += m->m_pkthdr.len + 7; txq->txq_ei_gapcount += m->m_pkthdr.len + 7;
if (txq->txq_ei_gapcount > 2 * GE_TXBUF_SIZE / 3) { if (txq->txq_ei_gapcount > 2 * GE_TXBUF_SIZE / 3) {
txd->ed_cmdsts = htobe32(TX_CMD_FIRST|TX_CMD_LAST|TX_CMD_EI); txd->ed_cmdsts = htogt32(TX_CMD_FIRST|TX_CMD_LAST|TX_CMD_EI);
txq->txq_ei_gapcount = 0; txq->txq_ei_gapcount = 0;
} else { } else {
txd->ed_cmdsts = htobe32(TX_CMD_FIRST|TX_CMD_LAST); txd->ed_cmdsts = htogt32(TX_CMD_FIRST|TX_CMD_LAST);
} }
#if 0
GE_DPRINTF(sc, ("([%d]->%08lx.%08lx.%08lx.%08lx)", txq->txq_lo,
((unsigned long *)txd)[0], ((unsigned long *)txd)[1],
((unsigned long *)txd)[2], ((unsigned long *)txd)[3]));
#endif
bus_dmamap_sync(sc->sc_dmat, txq->txq_desc_mem.gdm_map, bus_dmamap_sync(sc->sc_dmat, txq->txq_desc_mem.gdm_map,
txq->txq_lo * sizeof(*txd), sizeof(*txd), txq->txq_lo * sizeof(*txd), sizeof(*txd),
BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
txq->txq_outptr += (m->m_pkthdr.len + 7) & ~7; txq->txq_outptr += (m->m_pkthdr.len + 31) & ~31;
/* /*
* Tell the SDMA engine to "Fetch!" * Tell the SDMA engine to "Fetch!"
*/ */
@ -1138,14 +1183,14 @@ gfe_tx_done(struct gfe_softc *sc, enum gfe_txprio txprio, uint32_t intrmask)
} }
while (txq->txq_nactive > 0) { while (txq->txq_nactive > 0) {
volatile struct gt_eth_desc *ed = &txq->txq_descs[txq->txq_fi]; volatile struct gt_eth_desc *txd = &txq->txq_descs[txq->txq_fi];
uint32_t cmdsts; uint32_t cmdsts;
size_t pktlen; size_t pktlen;
bus_dmamap_sync(sc->sc_dmat, txq->txq_desc_mem.gdm_map, bus_dmamap_sync(sc->sc_dmat, txq->txq_desc_mem.gdm_map,
txq->txq_fi * sizeof(*ed), sizeof(*ed), txq->txq_fi * sizeof(*txd), sizeof(*txd),
BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
if ((cmdsts = be32toh(ed->ed_cmdsts)) & TX_CMD_O) { if ((cmdsts = gt32toh(txd->ed_cmdsts)) & TX_CMD_O) {
/* /*
* If the GT owns this descriptor and according * If the GT owns this descriptor and according
* to the status register, the transmit engine * to the status register, the transmit engine
@ -1187,15 +1232,26 @@ gfe_tx_done(struct gfe_softc *sc, enum gfe_txprio txprio, uint32_t intrmask)
GE_DPRINTF(sc, ("*")); GE_DPRINTF(sc, ("*"));
} }
#endif #endif
bus_dmamap_sync(sc->sc_dmat, txq->txq_desc_mem.gdm_map,
txq->txq_fi * sizeof(*txd), sizeof(*txd),
BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
GE_FUNC_EXIT(sc, ""); GE_FUNC_EXIT(sc, "");
return intrmask; return intrmask;
} }
#if 0
GE_DPRINTF(sc, ("([%d]<-%08lx.%08lx.%08lx.%08lx)",
txq->txq_lo,
((unsigned long *)txd)[0], ((unsigned long *)txd)[1],
((unsigned long *)txd)[2], ((unsigned long *)txd)[3]));
#endif
GE_DPRINTF(sc, ("(%d)", txq->txq_fi)); GE_DPRINTF(sc, ("(%d)", txq->txq_fi));
if (++txq->txq_fi == GE_TXDESC_MAX) if (++txq->txq_fi == GE_TXDESC_MAX)
txq->txq_fi = 0; txq->txq_fi = 0;
txq->txq_inptr = be32toh(ed->ed_bufptr) - txq->txq_buf_busaddr; txq->txq_inptr = gt32toh(txd->ed_bufptr) - txq->txq_buf_busaddr;
pktlen = (be32toh(ed->ed_lencnt) >> 16) & 0xffff; pktlen = (gt32toh(txd->ed_lencnt) >> 16) & 0xffff;
txq->txq_inptr += (pktlen + 7) & ~7; txq->txq_inptr += (pktlen + 31) & ~31;
bus_dmamap_sync(sc->sc_dmat, txq->txq_buf_mem.gdm_map,
txq->txq_inptr, pktlen, BUS_DMASYNC_POSTWRITE);
/* statistics */ /* statistics */
sc->sc_ec.ec_if.if_opackets++; sc->sc_ec.ec_if.if_opackets++;
@ -1203,7 +1259,7 @@ gfe_tx_done(struct gfe_softc *sc, enum gfe_txprio txprio, uint32_t intrmask)
if (cmdsts & TX_STS_ES) if (cmdsts & TX_STS_ES)
sc->sc_ec.ec_if.if_oerrors++; sc->sc_ec.ec_if.if_oerrors++;
ed->ed_bufptr = 0; txd->ed_bufptr = 0;
sc->sc_ec.ec_if.if_timer = 5; sc->sc_ec.ec_if.if_timer = 5;
--txq->txq_nactive; --txq->txq_nactive;
@ -1241,14 +1297,14 @@ gfe_tx_start(struct gfe_softc *sc, enum gfe_txprio txprio)
} }
memset(txq, 0, sizeof(*txq)); memset(txq, 0, sizeof(*txq));
error = gfe_dmamem_alloc(sc, &txq->txq_desc_mem, 1, error = gfe_dmamem_alloc(sc, &txq->txq_desc_mem, 1,
GE_TXMEM_SIZE); GE_TXMEM_SIZE, 0);
if (error) { if (error) {
free(txq, M_DEVBUF); free(txq, M_DEVBUF);
GE_FUNC_EXIT(sc, ""); GE_FUNC_EXIT(sc, "");
return error; return error;
} }
error = gfe_dmamem_alloc(sc, &txq->txq_buf_mem, 1, error = gfe_dmamem_alloc(sc, &txq->txq_buf_mem, 1,
GE_TXBUF_SIZE); GE_TXBUF_SIZE, 0);
if (error) { if (error) {
gfe_dmamem_free(sc, &txq->txq_desc_mem); gfe_dmamem_free(sc, &txq->txq_desc_mem);
free(txq, M_DEVBUF); free(txq, M_DEVBUF);
@ -1262,8 +1318,6 @@ gfe_tx_start(struct gfe_softc *sc, enum gfe_txprio txprio)
(volatile struct gt_eth_desc *) txq->txq_desc_mem.gdm_kva; (volatile struct gt_eth_desc *) txq->txq_desc_mem.gdm_kva;
txq->txq_desc_busaddr = txq->txq_desc_mem.gdm_map->dm_segs[0].ds_addr; txq->txq_desc_busaddr = txq->txq_desc_mem.gdm_map->dm_segs[0].ds_addr;
txq->txq_buf_busaddr = txq->txq_buf_mem.gdm_map->dm_segs[0].ds_addr; txq->txq_buf_busaddr = txq->txq_buf_mem.gdm_map->dm_segs[0].ds_addr;
GE_DPRINTF(sc, ("(kva %#08lx, desc_bus %#08lx)", (unsigned long) txq->txq_descs,
(unsigned long) txq->txq_desc_busaddr));
txq->txq_pendq.ifq_maxlen = 10; txq->txq_pendq.ifq_maxlen = 10;
txq->txq_ei_gapcount = 0; txq->txq_ei_gapcount = 0;
@ -1280,12 +1334,12 @@ GE_DPRINTF(sc, ("(kva %#08lx, desc_bus %#08lx)", (unsigned long) txq->txq_descs,
* update the nxtptr to point to the next txd. * update the nxtptr to point to the next txd.
*/ */
txd->ed_cmdsts = 0; txd->ed_cmdsts = 0;
txd->ed_nxtptr = htobe32(addr); txd->ed_nxtptr = htogt32(addr);
} }
txq->txq_descs[GE_TXDESC_MAX-1].ed_nxtptr = txq->txq_descs[GE_TXDESC_MAX-1].ed_nxtptr =
htobe32(txq->txq_desc_busaddr); htogt32(txq->txq_desc_busaddr);
bus_dmamap_sync(sc->sc_dmat, txq->txq_desc_mem.gdm_map, 0, bus_dmamap_sync(sc->sc_dmat, txq->txq_desc_mem.gdm_map, 0,
GE_TXMEM_SIZE, BUS_DMASYNC_PREREAD); GE_TXMEM_SIZE, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
switch (txprio) { switch (txprio) {
case GE_TXPRIO_HI: case GE_TXPRIO_HI:
@ -1510,6 +1564,9 @@ gfe_whack(struct gfe_softc *sc, enum gfe_whack_op op)
GE_WRITE(sc, EPCR, sc->sc_pcr | ETH_EPCR_EN); GE_WRITE(sc, EPCR, sc->sc_pcr | ETH_EPCR_EN);
GE_WRITE(sc, EIMR, sc->sc_intrmask); GE_WRITE(sc, EIMR, sc->sc_intrmask);
gfe_ifstart(&sc->sc_ec.ec_if); gfe_ifstart(&sc->sc_ec.ec_if);
GE_DPRINTF(sc, ("(ectdp0=%#x, ectdp1=%#x)",
GE_READ(sc, ECTDP0), GE_READ(sc, ECTDP1)));
GE_FUNC_EXIT(sc, "");
return error; return error;
case GE_WHACK_STOP: case GE_WHACK_STOP:
break; break;
@ -1681,7 +1738,8 @@ gfe_hash_entry_op(struct gfe_softc *sc, enum gfe_hash_op op,
return EBUSY; return EBUSY;
*he_p = thishe ^ HSH_S; *he_p = thishe ^ HSH_S;
bus_dmamap_sync(sc->sc_dmat, sc->sc_hash_mem.gdm_map, bus_dmamap_sync(sc->sc_dmat, sc->sc_hash_mem.gdm_map,
hash * sizeof(he), sizeof(he), BUS_DMASYNC_PREREAD); hash * sizeof(he), sizeof(he),
BUS_DMASYNC_PREWRITE);
GE_FUNC_EXIT(sc, "^"); GE_FUNC_EXIT(sc, "^");
return 0; return 0;
} }
@ -1718,7 +1776,7 @@ gfe_hash_entry_op(struct gfe_softc *sc, enum gfe_hash_op op,
*/ */
*maybe_he_p = he; *maybe_he_p = he;
bus_dmamap_sync(sc->sc_dmat, sc->sc_hash_mem.gdm_map, bus_dmamap_sync(sc->sc_dmat, sc->sc_hash_mem.gdm_map,
maybe_hash * sizeof(he), sizeof(he), BUS_DMASYNC_PREREAD); maybe_hash * sizeof(he), sizeof(he), BUS_DMASYNC_PREWRITE);
GE_FUNC_EXIT(sc, "+"); GE_FUNC_EXIT(sc, "+");
return 0; return 0;
} }
@ -1838,7 +1896,8 @@ gfe_hash_alloc(struct gfe_softc *sc)
int error; int error;
GE_FUNC_ENTER(sc, "gfe_hash_alloc"); GE_FUNC_ENTER(sc, "gfe_hash_alloc");
sc->sc_hashmask = (sc->sc_pcr & ETH_EPCR_HS_512 ? 16 : 256)*1024 - 1; sc->sc_hashmask = (sc->sc_pcr & ETH_EPCR_HS_512 ? 16 : 256)*1024 - 1;
error = gfe_dmamem_alloc(sc, &sc->sc_hash_mem, 1, sc->sc_hashmask + 1); error = gfe_dmamem_alloc(sc, &sc->sc_hash_mem, 1, sc->sc_hashmask + 1,
BUS_DMA_NOCACHE);
if (error) { if (error) {
printf("%s: failed to allocate %d bytes for hash table: %d\n", printf("%s: failed to allocate %d bytes for hash table: %d\n",
sc->sc_dev.dv_xname, sc->sc_hashmask + 1, error); sc->sc_dev.dv_xname, sc->sc_hashmask + 1, error);
@ -1848,7 +1907,7 @@ gfe_hash_alloc(struct gfe_softc *sc)
sc->sc_hashtable = (uint64_t *) sc->sc_hash_mem.gdm_kva; sc->sc_hashtable = (uint64_t *) sc->sc_hash_mem.gdm_kva;
memset(sc->sc_hashtable, 0, sc->sc_hashmask + 1); memset(sc->sc_hashtable, 0, sc->sc_hashmask + 1);
bus_dmamap_sync(sc->sc_dmat, sc->sc_hash_mem.gdm_map, bus_dmamap_sync(sc->sc_dmat, sc->sc_hash_mem.gdm_map,
0, sc->sc_hashmask + 1, BUS_DMASYNC_PREREAD); 0, sc->sc_hashmask + 1, BUS_DMASYNC_PREWRITE);
GE_FUNC_EXIT(sc, ""); GE_FUNC_EXIT(sc, "");
return 0; return 0;
} }

9
sys/dev/marvell/if_gfevar.h
View File

@ -1,4 +1,4 @@
/* $NetBSD: if_gfevar.h,v 1.1 2003/03/05 22:08:23 matt Exp $ */ /* $NetBSD: if_gfevar.h,v 1.2 2003/03/16 07:05:34 matt Exp $ */
/* /*
* Copyright (c) 2002 Allegro Networks, Inc., Wasabi Systems, Inc. * Copyright (c) 2002 Allegro Networks, Inc., Wasabi Systems, Inc.
@ -37,10 +37,6 @@
* POSSIBILITY OF SUCH DAMAGE. * POSSIBILITY OF SUCH DAMAGE.
*/ */
/*
* gevar.h -- placeholder for ge driver
*/
#define GE_RXDESC_MEMSIZE (1 * NBPG) #define GE_RXDESC_MEMSIZE (1 * NBPG)
#define GE_RXDESC_MAX 64 #define GE_RXDESC_MAX 64
#define GE_RXBUF_SIZE 2048 #define GE_RXBUF_SIZE 2048
@ -127,7 +123,8 @@ struct gfe_softc {
/* /*
* *
*/ */
bus_space_tag_t sc_memt; bus_space_tag_t sc_gt_memt;
bus_space_handle_t sc_gt_memh;
bus_dma_tag_t sc_dmat; bus_dma_tag_t sc_dmat;
int sc_macno; /* which mac? 0, 1, or 2 */ int sc_macno; /* which mac? 0, 1, or 2 */