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Tweak register bit names, in preparation for supporting younger siblings 

of this chip.
This commit is contained in:
thorpej 2021-01-04 21:59:48 +00:00
parent c48d8a0ff1
commit 08733279a9
2 changed files with 71 additions and 71 deletions
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96
sys/dev/i2c/tsl256x.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: tsl256x.c,v 1.8 2020/01/15 05:56:57 thorpej Exp $ */ /* $NetBSD: tsl256x.c,v 1.9 2021/01/04 21:59:48 thorpej Exp $ */
/*- /*-
* Copyright (c) 2018 Jason R. Thorpe * Copyright (c) 2018 Jason R. Thorpe
@ -27,7 +27,7 @@
*/ */
#include <sys/cdefs.h> #include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: tsl256x.c,v 1.8 2020/01/15 05:56:57 thorpej Exp $"); __KERNEL_RCSID(0, "$NetBSD: tsl256x.c,v 1.9 2021/01/04 21:59:48 thorpej Exp $");
#include <sys/param.h> #include <sys/param.h>
#include <sys/systm.h> #include <sys/systm.h>
@ -127,7 +127,7 @@ tsllux_match(device_t parent, cfdata_t match, void *aux)
if (iic_acquire_bus(ia->ia_tag, 0) != 0) if (iic_acquire_bus(ia->ia_tag, 0) != 0)
return (0); return (0);
error = iic_smbus_read_byte(ia->ia_tag, ia->ia_addr, error = iic_smbus_read_byte(ia->ia_tag, ia->ia_addr,
TSL256x_REG_ID | COMMAND_CMD, &id_reg, 0); TSL256x_REG_ID | COMMAND6x_CMD, &id_reg, 0);
iic_release_bus(ia->ia_tag, 0); iic_release_bus(ia->ia_tag, 0);
if (error) if (error)
@ -165,15 +165,15 @@ tsllux_attach(device_t parent, device_t self, void *aux)
have_i2c = true; have_i2c = true;
/* Power on the device and clear any pending interrupts. */ /* Power on the device and clear any pending interrupts. */
if (tsllux_write1(sc, TSL256x_REG_CONTROL | COMMAND_CLEAR, if (tsllux_write1(sc, TSL256x_REG_CONTROL | COMMAND6x_CLEAR,
CONTROL_POWER_ON)) { CONTROL6x_POWER_ON)) {
aprint_error_dev(self, ": unable to power on device\n"); aprint_error_dev(self, ": unable to power on device\n");
goto out; goto out;
} }
sc->sc_poweron = 1; sc->sc_poweron = 1;
/* Make sure interrupts are disabled. */ /* Make sure interrupts are disabled. */
if (tsllux_write1(sc, TSL256x_REG_INTERRUPT | COMMAND_CLEAR, 0)) { if (tsllux_write1(sc, TSL256x_REG_INTERRUPT | COMMAND6x_CLEAR, 0)) {
aprint_error_dev(self, ": unable to disable interrupts\n"); aprint_error_dev(self, ": unable to disable interrupts\n");
goto out; goto out;
} }
@ -184,8 +184,8 @@ tsllux_attach(device_t parent, device_t self, void *aux)
/* Inititalize timing to reasonable defaults. */ /* Inititalize timing to reasonable defaults. */
sc->sc_auto_gain = true; sc->sc_auto_gain = true;
sc->sc_gain = TIMING_GAIN_16X; sc->sc_gain = TIMING6x_GAIN_16X;
if (tsllux_set_integration_time(sc, TIMING_INTEG_101ms)) { if (tsllux_set_integration_time(sc, TIMING6x_INTEG_101ms)) {
aprint_error_dev(self, ": unable to set integration time\n"); aprint_error_dev(self, ": unable to set integration time\n");
goto out; goto out;
} }
@ -289,11 +289,11 @@ tsllux_sysctl_gain(SYSCTLFN_ARGS)
mutex_enter(&sc->sc_lock); mutex_enter(&sc->sc_lock);
switch (sc->sc_gain) { switch (sc->sc_gain) {
case TIMING_GAIN_1X: case TIMING6x_GAIN_1X:
val = 1; val = 1;
break; break;
case TIMING_GAIN_16X: case TIMING6x_GAIN_16X:
val = 16; val = 16;
break; break;
@ -310,11 +310,11 @@ tsllux_sysctl_gain(SYSCTLFN_ARGS)
switch (val) { switch (val) {
case 1: case 1:
new_gain = TIMING_GAIN_1X; new_gain = TIMING6x_GAIN_1X;
break; break;
case 16: case 16:
new_gain = TIMING_GAIN_16X; new_gain = TIMING6x_GAIN_16X;
break; break;
default: default:
@ -349,15 +349,15 @@ tsllux_sysctl_itime(SYSCTLFN_ARGS)
mutex_enter(&sc->sc_lock); mutex_enter(&sc->sc_lock);
switch (sc->sc_itime) { switch (sc->sc_itime) {
case TIMING_INTEG_13_7ms: case TIMING6x_INTEG_13_7ms:
val = 13; val = 13;
break; break;
case TIMING_INTEG_101ms: case TIMING6x_INTEG_101ms:
val = 101; val = 101;
break; break;
case TIMING_INTEG_402ms: case TIMING6x_INTEG_402ms:
default: default:
val = 402; val = 402;
break; break;
@ -372,15 +372,15 @@ tsllux_sysctl_itime(SYSCTLFN_ARGS)
switch (val) { switch (val) {
case 13: case 13:
case 14: case 14:
new_itime = TIMING_INTEG_13_7ms; new_itime = TIMING6x_INTEG_13_7ms;
break; break;
case 101: case 101:
new_itime = TIMING_INTEG_101ms; new_itime = TIMING6x_INTEG_101ms;
break; break;
case 402: case 402:
new_itime = TIMING_INTEG_402ms; new_itime = TIMING6x_INTEG_402ms;
break; break;
default: default:
@ -478,26 +478,26 @@ tsllux_sensors_refresh(struct sysmon_envsys *sme, envsys_data_t *edata)
/* /*
* Allow pending interrupts to be cleared as part of another operation. * Allow pending interrupts to be cleared as part of another operation.
*/ */
#define REGMASK (COMMAND_REGMASK | COMMAND_CLEAR) #define REGMASK6x (COMMAND6x_REGMASK | COMMAND6x_CLEAR)
static int static int
tsllux_read1(struct tsllux_softc *sc, uint8_t reg, uint8_t *valp) tsllux_read1(struct tsllux_softc *sc, uint8_t reg, uint8_t *valp)
{ {
reg = (reg & REGMASK) | COMMAND_CMD; reg = (reg & REGMASK6x) | COMMAND6x_CMD;
return (iic_smbus_read_byte(sc->sc_i2c, sc->sc_addr, reg, valp, 0)); return (iic_smbus_read_byte(sc->sc_i2c, sc->sc_addr, reg, valp, 0));
} }
static int static int
tsllux_read2(struct tsllux_softc *sc, uint8_t reg, uint16_t *valp) tsllux_read2(struct tsllux_softc *sc, uint8_t reg, uint16_t *valp)
{ {
reg = (reg & REGMASK) | COMMAND_CMD | COMMAND_WORD; reg = (reg & REGMASK6x) | COMMAND6x_CMD | COMMAND6x_WORD;
return (iic_smbus_read_word(sc->sc_i2c, sc->sc_addr, reg, valp, 0)); return (iic_smbus_read_word(sc->sc_i2c, sc->sc_addr, reg, valp, 0));
} }
static int static int
tsllux_write1(struct tsllux_softc *sc, uint8_t reg, uint8_t val) tsllux_write1(struct tsllux_softc *sc, uint8_t reg, uint8_t val)
{ {
reg = (reg & REGMASK) | COMMAND_CMD; reg = (reg & REGMASK6x) | COMMAND6x_CMD;
return (iic_smbus_write_byte(sc->sc_i2c, sc->sc_addr, reg, val, 0)); return (iic_smbus_write_byte(sc->sc_i2c, sc->sc_addr, reg, val, 0));
} }
@ -505,7 +505,7 @@ tsllux_write1(struct tsllux_softc *sc, uint8_t reg, uint8_t val)
static int static int
tsllux_write2(struct tsllux_softc *sc, uint8_t reg, uint16_t val) tsllux_write2(struct tsllux_softc *sc, uint8_t reg, uint16_t val)
{ {
reg = (reg & REGMASK) | COMMAND_CMD | COMMAND_WORD; reg = (reg & REGMASK6x) | COMMAND6x_CMD | COMMAND6x_WORD;
return (iic_smbus_write_word(sc->sc_i2c, sc->sc_addr, reg, val, 0)); return (iic_smbus_write_word(sc->sc_i2c, sc->sc_addr, reg, val, 0));
} }
#endif #endif
@ -521,7 +521,7 @@ tsllux_poweron(struct tsllux_softc *sc)
uint8_t val; uint8_t val;
error = tsllux_write1(sc, TSL256x_REG_CONTROL, error = tsllux_write1(sc, TSL256x_REG_CONTROL,
CONTROL_POWER_ON); CONTROL6x_POWER_ON);
if (error) if (error)
return (error); return (error);
@ -529,7 +529,7 @@ tsllux_poweron(struct tsllux_softc *sc)
if (error) if (error)
return (error); return (error);
if (val != CONTROL_POWER_ON) { if (val != CONTROL6x_POWER_ON) {
aprint_error_dev(sc->sc_dev, aprint_error_dev(sc->sc_dev,
"failed to power on sensor\n"); "failed to power on sensor\n");
return (EIO); return (EIO);
@ -543,7 +543,7 @@ tsllux_poweroff(struct tsllux_softc *sc)
{ {
if (sc->sc_poweron && --sc->sc_poweron == 0) if (sc->sc_poweron && --sc->sc_poweron == 0)
return (tsllux_write1(sc, TSL256x_REG_CONTROL, return (tsllux_write1(sc, TSL256x_REG_CONTROL,
CONTROL_POWER_OFF)); CONTROL6x_POWER_OFF));
return (0); return (0);
} }
@ -553,9 +553,9 @@ tsllux_set_integration_time(struct tsllux_softc *sc, uint8_t time)
int error; int error;
switch (time) { switch (time) {
case TIMING_INTEG_13_7ms: case TIMING6x_INTEG_13_7ms:
case TIMING_INTEG_101ms: case TIMING6x_INTEG_101ms:
case TIMING_INTEG_402ms: case TIMING6x_INTEG_402ms:
break; break;
default: default:
@ -595,8 +595,8 @@ tsllux_set_gain(struct tsllux_softc *sc, uint8_t gain)
int error; int error;
switch (gain) { switch (gain) {
case TIMING_GAIN_1X: case TIMING6x_GAIN_1X:
case TIMING_GAIN_16X: case TIMING6x_GAIN_16X:
break; break;
default: default:
@ -630,17 +630,17 @@ tsllux_wait_for_adcs(struct tsllux_softc *sc)
int ms; int ms;
switch (sc->sc_itime) { switch (sc->sc_itime) {
case TIMING_INTEG_13_7ms: case TIMING6x_INTEG_13_7ms:
/* Wait 15ms for 13.7ms integration */ /* Wait 15ms for 13.7ms integration */
ms = 15; ms = 15;
break; break;
case TIMING_INTEG_101ms: case TIMING6x_INTEG_101ms:
/* Wait 120ms for 101ms integration */ /* Wait 120ms for 101ms integration */
ms = 120; ms = 120;
break; break;
case TIMING_INTEG_402ms: case TIMING6x_INTEG_402ms:
default: default:
/* Wait 450ms for 402ms integration */ /* Wait 450ms for 402ms integration */
ms = 450; ms = 450;
@ -757,17 +757,17 @@ tsllux_get_sensor_data(struct tsllux_softc *sc, uint16_t *broadband,
/* Set the hi / lo threshold based on current integration time. */ /* Set the hi / lo threshold based on current integration time. */
switch (sc->sc_itime) { switch (sc->sc_itime) {
case TIMING_INTEG_13_7ms: case TIMING6x_INTEG_13_7ms:
hi = TSL2561_AGC_THI_13MS; hi = TSL2561_AGC_THI_13MS;
lo = TSL2561_AGC_TLO_13MS; lo = TSL2561_AGC_TLO_13MS;
break; break;
case TIMING_INTEG_101ms: case TIMING6x_INTEG_101ms:
hi = TSL2561_AGC_THI_101MS; hi = TSL2561_AGC_THI_101MS;
lo = TSL2561_AGC_TLO_101MS; lo = TSL2561_AGC_TLO_101MS;
break; break;
case TIMING_INTEG_402ms: case TIMING6x_INTEG_402ms:
default: default:
hi = TSL2561_AGC_THI_402MS; hi = TSL2561_AGC_THI_402MS;
lo = TSL2561_AGC_TLO_402MS; lo = TSL2561_AGC_TLO_402MS;
@ -779,19 +779,19 @@ tsllux_get_sensor_data(struct tsllux_softc *sc, uint16_t *broadband,
goto out; goto out;
if (did_adjust_gain == false) { if (did_adjust_gain == false) {
if (adc0 < lo && sc->sc_gain == TIMING_GAIN_1X) { if (adc0 < lo && sc->sc_gain == TIMING6x_GAIN_1X) {
/* Increase the gain and try again. */ /* Increase the gain and try again. */
if ((error = if ((error =
tsllux_set_gain0(sc, tsllux_set_gain0(sc,
TIMING_GAIN_16X)) != 0) TIMING6x_GAIN_16X)) != 0)
goto out; goto out;
did_adjust_gain = true; did_adjust_gain = true;
} else if (adc0 > hi && } else if (adc0 > hi &&
sc->sc_gain == TIMING_GAIN_16X) { sc->sc_gain == TIMING6x_GAIN_16X) {
/* Decrease the gain and try again. */ /* Decrease the gain and try again. */
if ((error = if ((error =
tsllux_set_gain0(sc, tsllux_set_gain0(sc,
TIMING_GAIN_1X)) != 0) TIMING6x_GAIN_1X)) != 0)
goto out; goto out;
did_adjust_gain = true; did_adjust_gain = true;
} else { } else {
@ -955,15 +955,15 @@ tsllux_get_lux(struct tsllux_softc *sc, uint32_t *luxp,
* just return a "max brightness" value. * just return a "max brightness" value.
*/ */
switch (sc->sc_itime) { switch (sc->sc_itime) {
case TIMING_INTEG_13_7ms: case TIMING6x_INTEG_13_7ms:
clip_threshold = TSL2561_CLIPPING_13MS; clip_threshold = TSL2561_CLIPPING_13MS;
break; break;
case TIMING_INTEG_101ms: case TIMING6x_INTEG_101ms:
clip_threshold = TSL2561_CLIPPING_101MS; clip_threshold = TSL2561_CLIPPING_101MS;
break; break;
case TIMING_INTEG_402ms: case TIMING6x_INTEG_402ms:
default: default:
clip_threshold = TSL2561_CLIPPING_402MS; clip_threshold = TSL2561_CLIPPING_402MS;
break; break;
@ -976,21 +976,21 @@ tsllux_get_lux(struct tsllux_softc *sc, uint32_t *luxp,
/* Get correct scale factor based on integration time. */ /* Get correct scale factor based on integration time. */
switch (sc->sc_itime) { switch (sc->sc_itime) {
case TIMING_INTEG_13_7ms: case TIMING6x_INTEG_13_7ms:
scale = TSL2561_LUX_CHSCALE_TINT0; scale = TSL2561_LUX_CHSCALE_TINT0;
break; break;
case TIMING_INTEG_101ms: case TIMING6x_INTEG_101ms:
scale = TSL2561_LUX_CHSCALE_TINT1; scale = TSL2561_LUX_CHSCALE_TINT1;
break; break;
case TIMING_INTEG_402ms: case TIMING6x_INTEG_402ms:
default: default:
scale = (1 << TSL2561_LUX_CHSCALE); scale = (1 << TSL2561_LUX_CHSCALE);
} }
/* Scale for gain. */ /* Scale for gain. */
if (sc->sc_gain == TIMING_GAIN_1X) if (sc->sc_gain == TIMING6x_GAIN_1X)
scale <<= 4; scale <<= 4;
/* Scale the channel values. */ /* Scale the channel values. */

46
sys/dev/i2c/tsl256xreg.h
View File

@ -1,4 +1,4 @@
/* $NetBSD: tsl256xreg.h,v 1.1 2018/05/27 05:31:20 thorpej Exp $ */ /* $NetBSD: tsl256xreg.h,v 1.2 2021/01/04 21:59:48 thorpej Exp $ */
/*- /*-
* Copyright (c) 2018 Jason R. Thorpe * Copyright (c) 2018 Jason R. Thorpe
@ -53,28 +53,28 @@
*/ */
/* COMMAND - Specifies register address and other parameters */ /* COMMAND - Specifies register address and other parameters */
#define COMMAND_REGMASK 0x0f /* register address mask */ #define COMMAND6x_REGMASK 0x0f /* register address mask */
#define COMMAND_BLOCK 0x10 /* transaction uses block read/write */ #define COMMAND6x_BLOCK 0x10 /* transaction uses block read/write */
#define COMMAND_WORD 0x20 /* transaction uses word read/write */ #define COMMAND6x_WORD 0x20 /* transaction uses word read/write */
#define COMMAND_CLEAR 0x40 /* clear pending interrupt */ #define COMMAND6x_CLEAR 0x40 /* clear pending interrupt */
#define COMMAND_CMD 0x80 /* Select command register; MBO */ #define COMMAND6x_CMD 0x80 /* Select command register; MBO */
/* CONTROL - Control of basic functions */ /* CONTROL - Control of basic functions */
#define TSL256x_REG_CONTROL 0x0 #define TSL256x_REG_CONTROL 0x0
#define CONTROL_POWER_OFF 0x00 #define CONTROL6x_POWER_OFF 0x00
#define CONTROL_POWER_ON 0x03 #define CONTROL6x_POWER_ON 0x03
/* TIMING - Integration time / gain control */ /* TIMING - Integration time / gain control */
#define TSL256x_REG_TIMING 0x1 #define TSL256x_REG_TIMING 0x1
#define TIMING_INTEG_13_7ms 0x00 /* 13.7ms integration time */ #define TIMING6x_INTEG_13_7ms 0x00 /* 13.7ms integration time */
#define TIMING_INTEG_101ms 0x01 /* 101ms integration time */ #define TIMING6x_INTEG_101ms 0x01 /* 101ms integration time */
#define TIMING_INTEG_402ms 0x02 /* 402ms integration time */ #define TIMING6x_INTEG_402ms 0x02 /* 402ms integration time */
#define TIMING_INTEG_MANUAL 0x03 /* use manual timing */ #define TIMING6x_INTEG_MANUAL 0x03 /* use manual timing */
#define TIMING_MANUAL 0x08 /* manual timing; 1 starts, 0 stops */ #define TIMING6x_MANUAL 0x08 /* manual timing; 1 starts, 0 stops */
#define TIMING_GAIN_1X 0x00 #define TIMING6x_GAIN_1X 0x00
#define TIMING_GAIN_16X 0x10 #define TIMING6x_GAIN_16X 0x10
/* THRESHLOWLOW - Low byte of low interrupt threshold */ /* THRESHLOWLOW - Low byte of low interrupt threshold */
@ -95,10 +95,10 @@
/* INTERRUPT - Interrupt control */ /* INTERRUPT - Interrupt control */
#define TSL256x_REG_INTERRUPT 0x6 #define TSL256x_REG_INTERRUPT 0x6
#define INTERRUPT_LEVEL 0x01 /* Level-triggered interrupt */ #define INTERRUPT6x_LEVEL 0x01 /* Level-triggered interrupt */
#define INTERRUPT_SMB_ALERT 0x02 /* SMB Alert compliant interrupt */ #define INTERRUPT6x_SMB_ALERT 0x02 /* SMB Alert compliant interrupt */
#define INTERRUPT_TEST 0x03 /* interrupt test */ #define INTERRUPT6x_TEST 0x03 /* interrupt test */
#define INTERRUPT_PERSIST(x) ((x) << 4) #define INTERRUPT6x_PERSIST(x) ((x) << 4)
/* /*
* Interrupt persist settings: * Interrupt persist settings:
* 0 - Every ADC cycle generates an interrupt * 0 - Every ADC cycle generates an interrupt
@ -118,10 +118,10 @@
/* ID - Part number / Rev ID */ /* ID - Part number / Rev ID */
#define TSL256x_REG_ID 0xa #define TSL256x_REG_ID 0xa
#define ID_GET_PARTNO(x) (((x) & 0xf0) >> 4) #define ID6x_GET_PARTNO(x) (((x) & 0xf0) >> 4)
#define ID_PARTNO_TSL2560 0x0 #define ID6x_PARTNO_TSL2560 0x0
#define ID_PARTNO_TSL2561 0x1 #define ID6x_PARTNO_TSL2561 0x1
#define ID_GET_REVNO(x) ((x) & 0x0f) #define ID6x_GET_REVNO(x) ((x) & 0x0f)
/* 0xb - Reserved */ /* 0xb - Reserved */