From 081bd3c0dfd5d1cc540e42529d8b840b47921583 Mon Sep 17 00:00:00 2001
From: skrll <skrll@NetBSD.org>
Date: Sat, 2 May 2015 16:18:49 +0000
Subject: [PATCH] Move /* A5.2.10 Synchronisation primitives */ block earlier
 so it matches correctly

---
 sys/arch/arm/arm/arm_machdep.c | 12 +++++++-----
 sys/arch/arm/arm/disassem.c    | 28 ++++++++++++++--------------
 2 files changed, 21 insertions(+), 19 deletions(-)

diff --git a/sys/arch/arm/arm/arm_machdep.c b/sys/arch/arm/arm/arm_machdep.c
index 7f289172859f..6529c8f6ddb0 100644
--- a/sys/arch/arm/arm/arm_machdep.c
+++ b/sys/arch/arm/arm/arm_machdep.c
@@ -1,4 +1,4 @@
-/*	$NetBSD: arm_machdep.c,v 1.47 2015/04/15 21:26:48 matt Exp $	*/
+/*	$NetBSD: arm_machdep.c,v 1.48 2015/05/02 16:18:49 skrll Exp $	*/
 
 /*
  * Copyright (c) 2001 Wasabi Systems, Inc.
@@ -80,7 +80,7 @@
 
 #include <sys/param.h>
 
-__KERNEL_RCSID(0, "$NetBSD: arm_machdep.c,v 1.47 2015/04/15 21:26:48 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: arm_machdep.c,v 1.48 2015/05/02 16:18:49 skrll Exp $");
 
 #include <sys/exec.h>
 #include <sys/proc.h>
@@ -187,7 +187,7 @@ setregs(struct lwp *l, struct exec_package *pack, vaddr_t stack)
 	tf->tf_spsr = PSR_USR32_MODE | (CPU_IS_ARMV7_P() ? PSR_E_BIT : 0);
 #else
 	tf->tf_spsr = PSR_USR32_MODE;
-#endif /* __ARMEB__ */ 
+#endif /* __ARMEB__ */
 
 #ifdef THUMB_CODE
 	if (pack->ep_entry & 1)
@@ -213,7 +213,7 @@ setregs(struct lwp *l, struct exec_package *pack, vaddr_t stack)
 void
 startlwp(void *arg)
 {
-	ucontext_t *uc = (ucontext_t *)arg; 
+	ucontext_t *uc = (ucontext_t *)arg;
 	lwp_t *l = curlwp;
 	int error __diagused;
 
@@ -243,9 +243,11 @@ cpu_need_resched(struct cpu_info *ci, int flags)
 		 */
 		return;
 	}
+#if 0
+	/* XXXNH??? */
 	if (ci->ci_want_resched && !immed)
 		return;
-
+#endif
 	if (l == ci->ci_data.cpu_idlelwp) {
 #ifdef MULTIPROCESSOR
 		/*
diff --git a/sys/arch/arm/arm/disassem.c b/sys/arch/arm/arm/disassem.c
index 6a7c5a97739d..cc65e141a340 100644
--- a/sys/arch/arm/arm/disassem.c
+++ b/sys/arch/arm/arm/disassem.c
@@ -1,4 +1,4 @@
-/*	$NetBSD: disassem.c,v 1.32 2015/03/31 16:15:07 skrll Exp $	*/
+/*	$NetBSD: disassem.c,v 1.33 2015/05/02 16:18:49 skrll Exp $	*/
 
 /*
  * Copyright (c) 1996 Mark Brinicombe.
@@ -49,7 +49,7 @@
 
 #include <sys/param.h>
 
-__KERNEL_RCSID(0, "$NetBSD: disassem.c,v 1.32 2015/03/31 16:15:07 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: disassem.c,v 1.33 2015/05/02 16:18:49 skrll Exp $");
 
 #include <sys/systm.h>
 
@@ -247,6 +247,18 @@ static const struct arm32_insn arm32_i[] = {
     { 0x0ff00000, 0x03000000, "movw", 	"dZ" },
     { 0x0ff00000, 0x03400000, "movt", 	"dZ" },
 
+    /* A5.2.10 Synchronisation primitives */
+    { 0x0ff00ff0, 0x01000090, "swp",	"dmo" },
+    { 0x0ff00ff0, 0x01400090, "swpb",	"dmo" },
+    { 0x0ff00fff, 0x01900f9f, "ldrex",	"da" },
+    { 0x0ff00fff, 0x01b00f9f, "ldrexd",	"da" },
+    { 0x0ff00fff, 0x01d00f9f, "ldrexb",	"da" },
+    { 0x0ff00fff, 0x01f00f9f, "ldrexh",	"da" },
+    { 0x0ff00ff0, 0x01800f90, "strex",	"dma" },
+    { 0x0ff00ff0, 0x01a00f90, "strexd",	"dma" },
+    { 0x0ff00ff0, 0x01c00f90, "strexb",	"dma" },
+    { 0x0ff00ff0, 0x01e00f90, "strexh",	"dma" },
+
     /* A5.2 non-exceptions */
 
     /* A5.2.1, A5.2.2, and A5.2.3 Data-processing */
@@ -275,18 +287,6 @@ static const struct arm32_insn arm32_i[] = {
     { 0x0fe000f0, 0x00a00090, "umlal",	"Sdnms" },
     { 0x0fe000f0, 0x00e00090, "smlal",	"Sdnms" },
 
-    /* A5.2.10 Synchronisation primitives */
-    { 0x0ff00ff0, 0x01000090, "swp",	"dmo" },
-    { 0x0ff00ff0, 0x01400090, "swpb",	"dmo" },
-    { 0x0ff00fff, 0x01900f9f, "ldrex",	"da" },
-    { 0x0ff00fff, 0x01b00f9f, "ldrexd",	"da" },
-    { 0x0ff00fff, 0x01d00f9f, "ldrexb",	"da" },
-    { 0x0ff00fff, 0x01f00f9f, "ldrexh",	"da" },
-    { 0x0ff00ff0, 0x01800f90, "strex",	"dma" },
-    { 0x0ff00ff0, 0x01a00f90, "strexd",	"dma" },
-    { 0x0ff00ff0, 0x01c00f90, "strexb",	"dma" },
-    { 0x0ff00ff0, 0x01e00f90, "strexh",	"dma" },
-
     /* */
     { 0x0ff08f10, 0x0e000100, "adf",	"PRfgh" },
     { 0x0ff08f10, 0x0e100100, "muf",	"PRfgh" },