There are aarch64 Cortex cpus that do not trap on some floating point

exceptions - so apply the arm handling for aarch64 as well.
This commit is contained in:
martin 2019-01-23 17:36:01 +00:00
parent 9187482ccd
commit 076f00a246
3 changed files with 7 additions and 7 deletions

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@ -1,4 +1,4 @@
/* $NetBSD: t_fpsetmask.c,v 1.17 2018/12/16 02:18:01 sevan Exp $ */
/* $NetBSD: t_fpsetmask.c,v 1.18 2019/01/23 17:36:01 martin Exp $ */
/*-
* Copyright (c) 1995 The NetBSD Foundation, Inc.
@ -58,7 +58,7 @@ ATF_TC_BODY(no_test, tc)
#include <ieeefp.h>
#if __arm__ && !__SOFTFP__
#if (__arm__ && !__SOFTFP__) || __aarch64__
/*
* Some NEON fpus do not implement IEEE exception handling,
* skip these tests if running on them and compiled for

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@ -1,4 +1,4 @@
/* $NetBSD: t_siginfo.c,v 1.32 2018/01/17 00:16:43 maya Exp $ */
/* $NetBSD: t_siginfo.c,v 1.33 2019/01/23 17:36:01 martin Exp $ */
/*-
* Copyright (c) 2010 The NetBSD Foundation, Inc.
@ -309,7 +309,7 @@ ATF_TC_BODY(sigfpe_flt, tc)
if (isQEMU())
atf_tc_skip("Test does not run correctly under QEMU");
#if defined(__arm__) && !__SOFTFP__
#if (__arm__ && !__SOFTFP__) || __aarch64__
/*
* Some NEON fpus do not implement IEEE exception handling,
* skip these tests if running on them and compiled for

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@ -1,4 +1,4 @@
/* $NetBSD: t_fenv.c,v 1.3 2015/12/22 14:20:59 christos Exp $ */
/* $NetBSD: t_fenv.c,v 1.4 2019/01/23 17:36:01 martin Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@ -29,7 +29,7 @@
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <sys/cdefs.h>
__RCSID("$NetBSD: t_fenv.c,v 1.3 2015/12/22 14:20:59 christos Exp $");
__RCSID("$NetBSD: t_fenv.c,v 1.4 2019/01/23 17:36:01 martin Exp $");
#include <atf-c.h>
@ -40,7 +40,7 @@ __RCSID("$NetBSD: t_fenv.c,v 1.3 2015/12/22 14:20:59 christos Exp $");
#include <stdlib.h>
#if __arm__ && !__SOFTFP__
#if (__arm__ && !__SOFTFP__) || __aarch64__
/*
* Some NEON fpus do not implement IEEE exception handling,
* skip these tests if running on them and compiled for