On multiprocessor systems, it is possible that a lev1map might be in use
by two processors concurrently. This means that we cannot modify the lev1map in use by the processor which wishes to use the PROM. Fix this by creating a separate lev1map for PROM users. This lev1map is a copy of the kernel_lev1map, with the exception of the necessary PROM mapping. When a processor wishes to use the PROM, it switches its PTBR to point at the prom_lev1map, performs the PROM operation, and switches back to its previous lev1map. Note that kernels without multiprocessor support use the old method of modifying the current lev1map. Also, serialize access to the PROM via a spin lock.
This commit is contained in:
thorpej
parent
1b92119539
commit
07304bd858
@ -1,4 +1,4 @@
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/* $NetBSD: pmap.c,v 1.81 1999/02/24 19:36:04 thorpej Exp $ */
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/* $NetBSD: pmap.c,v 1.82 1999/02/25 03:43:14 thorpej Exp $ */
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/*-
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* Copyright (c) 1998, 1999 The NetBSD Foundation, Inc.
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@ -156,7 +156,7 @@
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#include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
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__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.81 1999/02/24 19:36:04 thorpej Exp $");
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__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.82 1999/02/25 03:43:14 thorpej Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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@ -793,26 +793,6 @@ pmap_bootstrap(ptaddr, maxasn, ncpuids)
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* Set up level 1 page table
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*/
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#ifdef _PMAP_MAY_USE_PROM_CONSOLE
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{
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extern pt_entry_t rom_pte; /* XXX */
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extern int prom_mapped; /* XXX */
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if (pmap_uses_prom_console()) {
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/* XXX save old pte so that we can remap prom if necessary */
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rom_pte = *(pt_entry_t *)ptaddr & ~PG_ASM; /* XXX */
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}
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prom_mapped = 0;
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/*
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* Actually, this code lies. The prom is still mapped, and will
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* remain so until the context switch after alpha_init() returns.
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* Printfs using the firmware before then will end up frobbing
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* kernel_lev1map unnecessarily, but that's OK.
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*/
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}
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#endif
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/* Map all of the level 2 pte pages */
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for (i = 0; i < howmany(lev2mapsize, NPTEPG); i++) {
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pte = (ALPHA_K0SEG_TO_PHYS(((vaddr_t)lev2map) +
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@ -829,6 +809,44 @@ pmap_bootstrap(ptaddr, maxasn, ncpuids)
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kernel_lev1map[l1pte_index(VPTBASE)] = pte;
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VPT = (pt_entry_t *)VPTBASE;
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#ifdef _PMAP_MAY_USE_PROM_CONSOLE
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{
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#if defined(MULTIPROCESSOR)
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extern pt_entry_t *prom_lev1map; /* XXX */
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#else
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extern pt_entry_t prom_pte; /* XXX */
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#endif
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extern int prom_mapped; /* XXX */
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if (pmap_uses_prom_console()) {
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/*
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* XXX Save old PTE so we can remap the PROM, if
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* XXX necessary.
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* XXX
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* XXX On MP systems, the processor using the PROM
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* XXX actually has to switch to another page table
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* XXX so as to avoid stomping on an existing mapping
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* XXX which may be shared with another processor.
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*/
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#if defined(MULTIPROCESSOR)
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prom_lev1map = (pt_entry_t *)
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pmap_steal_memory(sizeof(pt_entry_t) * NPTEPG, NULL, NULL);
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memcpy(prom_lev1map, kernel_lev1map,
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sizeof(pt_entry_t) * NPTEPG);
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prom_lev1map[0] = *(pt_entry_t *)ptaddr & ~PG_ASM;
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#else
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prom_pte = *(pt_entry_t *)ptaddr & ~PG_ASM;
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#endif
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}
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prom_mapped = 0;
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/*
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* Actually, this code lies. The prom is still mapped, and will
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* remain so until the context switch after alpha_init() returns.
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*/
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}
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#endif
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/*
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* Set up level 2 page table.
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*/
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@ -1,4 +1,4 @@
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/* $NetBSD: prom.c,v 1.33 1999/02/24 19:25:56 thorpej Exp $ */
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/* $NetBSD: prom.c,v 1.34 1999/02/25 03:43:14 thorpej Exp $ */
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/*
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* Copyright (c) 1992, 1994, 1995, 1996 Carnegie Mellon University
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@ -27,11 +27,14 @@
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#include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
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__KERNEL_RCSID(0, "$NetBSD: prom.c,v 1.33 1999/02/24 19:25:56 thorpej Exp $");
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__KERNEL_RCSID(0, "$NetBSD: prom.c,v 1.34 1999/02/25 03:43:14 thorpej Exp $");
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#include "opt_multiprocessor.h"
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <vm/vm.h>
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#include <sys/lock.h>
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#include <sys/proc.h>
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#include <sys/user.h>
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@ -55,23 +58,35 @@ extern struct prom_vec prom_dispatch_v;
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#ifdef _PMAP_MAY_USE_PROM_CONSOLE
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int prom_mapped = 1; /* Is PROM still mapped? */
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pt_entry_t rom_pte, saved_pte[1]; /* XXX */
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static pt_entry_t *rom_lev1map __P((void));
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struct simplelock prom_slock;
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#if defined(MULTIPROCESSOR)
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pt_entry_t *prom_lev1map, *saved_lev1map;
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static pt_entry_t *prom_swaplev1map __P((pt_entry_t *));
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static pt_entry_t *
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rom_lev1map()
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prom_swaplev1map(l1map)
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pt_entry_t *l1map;
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{
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struct alpha_pcb *apcb;
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extern pt_entry_t *kernel_lev1map;
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pt_entry_t *rl1map;
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/*
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* We may be called before the first context switch
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* after alpha_init(), in which case we just need
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* to use the kernel kernel_lev1map.
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*/
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if (curpcb == 0)
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return (kernel_lev1map);
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apcb = (struct alpha_pcb *)ALPHA_PHYS_TO_K0SEG(curpcb);
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rl1map = (pt_entry_t *)ALPHA_PHYS_TO_K0SEG(apcb->apcb_ptbr << PGSHIFT);
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apcb->apcb_ptbr = ALPHA_K0SEG_TO_PHYS((vaddr_t)l1map) >> PGSHIFT;
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(void) alpha_pal_swpctx(curpcb);
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return (rl1map);
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}
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#else /* ! MULTIPROCESSOR */
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pt_entry_t prom_pte, saved_pte[1]; /* XXX */
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static pt_entry_t *prom_lev1map __P((void));
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static pt_entry_t *
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prom_lev1map()
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{
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struct alpha_pcb *apcb;
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/*
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* Find the level 1 map that we're currently running on.
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@ -80,6 +95,7 @@ rom_lev1map()
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return ((pt_entry_t *)ALPHA_PHYS_TO_K0SEG(apcb->apcb_ptbr << PGSHIFT));
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}
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#endif /* MULTIPROCESSOR */
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#endif /* _PMAP_MAY_USE_PROM_CONSOLE */
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void
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@ -92,6 +108,8 @@ init_prom_interface(rpb)
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prom_dispatch_v.routine_arg = c->crb_v_dispatch;
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prom_dispatch_v.routine = c->crb_v_dispatch->entry_va;
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simple_lock_init(&prom_slock);
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}
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void
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@ -115,21 +133,31 @@ static void prom_cache_sync __P((void));
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int
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prom_enter()
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{
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int s = splhigh();
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int s;
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s = splhigh();
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simple_lock(&prom_slock);
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#ifdef _PMAP_MAY_USE_PROM_CONSOLE
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pt_entry_t *lev1map;
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/*
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* XXX THIS IS COMPLETELY BROKEN ON MULTIPROCESSOR SYSTEMS!
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* If we have not yet switched out of the PROM's context
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* (i.e. the first one after alpha_init()), then the PROM
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* is still mapped, regardless of the `prom_mapped' setting.
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*/
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if (!prom_mapped) {
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if (prom_mapped == 0 && curpcb != 0) {
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if (!pmap_uses_prom_console())
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panic("prom_enter");
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lev1map = rom_lev1map(); /* XXX */
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saved_pte[0] = lev1map[0]; /* XXX */
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lev1map[0] = rom_pte; /* XXX */
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#if defined(MULTIPROCESSOR)
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saved_lev1map = prom_swaplev1map(prom_lev1map);
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#else
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{
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pt_entry_t *lev1map;
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lev1map = prom_lev1map(); /* XXX */
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saved_pte[0] = lev1map[0]; /* XXX */
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lev1map[0] = prom_pte; /* XXX */
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}
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#endif
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prom_cache_sync(); /* XXX */
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}
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#endif
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@ -142,16 +170,26 @@ prom_leave(s)
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{
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#ifdef _PMAP_MAY_USE_PROM_CONSOLE
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pt_entry_t *lev1map;
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if (!prom_mapped) {
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/*
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* See comment above.
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*/
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if (prom_mapped == 0 && curpcb != 0) {
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if (!pmap_uses_prom_console())
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panic("prom_leave");
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lev1map = rom_lev1map(); /* XXX */
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lev1map[0] = saved_pte[0]; /* XXX */
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#if defined(MULTIPROCESSOR)
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(void) prom_swaplev1map(saved_lev1map);
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#else
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{
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pt_entry_t *lev1map;
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lev1map = prom_lev1map(); /* XXX */
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lev1map[0] = saved_pte[0]; /* XXX */
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}
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#endif
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prom_cache_sync(); /* XXX */
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}
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#endif
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simple_unlock(&prom_slock);
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splx(s);
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}
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