Misc fixes to support 21041 on Qube2700:
- prepare two TX descriptors to avoid race and also use chaind mode - use a recently added pcicfgread() function to get tulip I/O address - use cobalt model id to see if we have 21041 or 21143 (XXX maybe it's better to see PCI product ID) - add code to reset SIA on 21041 - prepare and send filter setup packet on init - reduce delay in RX polling - bump version again Now netboot works fine on Qube 2700 (even without console). Yay.
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tsutsui
parent
55edbc2411
commit
069af26195
@ -1,4 +1,4 @@
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/* $NetBSD: tlp.c,v 1.4 2008/03/01 20:24:25 tsutsui Exp $ */
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/* $NetBSD: tlp.c,v 1.5 2008/03/01 20:39:25 tsutsui Exp $ */
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/*-
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* Copyright (c) 2007 The NetBSD Foundation, Inc.
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@ -72,6 +72,7 @@ do { \
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#define T1_FS (1U<<29) /* first segment */
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#define T1_SET (1U<<27) /* "setup packet" */
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#define T1_TER (1U<<25) /* end of ring mark */
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#define T1_TCH (1U<<24) /* Second address chained */
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#define T1_TBS_MASK 0x7ff /* segment size 10:0 */
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#define R0_OWN (1U<<31) /* desc is empty */
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#define R0_FS (1U<<30) /* first desc of frame */
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@ -90,18 +91,21 @@ struct desc {
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#endif
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};
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#define TLP_BMR 0x000 /* 0: bus mode */
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#define TLP_BMR 0x00 /* 0: bus mode */
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#define BMR_RST (1U<< 0) /* software reset */
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#define TLP_TPD 0x008 /* 1: instruct Tx to start */
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#define BMR_BAR (1U<< 1) /* bus arbitration */
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#define BMR_PBL8 (1U<<11) /* burst length 8 longword */
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#define BMR_CAL8 (1U<<13) /* cache alignment 8 longword */
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#define TLP_TPD 0x08 /* 1: instruct Tx to start */
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#define TPD_POLL (1U<< 0) /* transmit poll demand */
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#define TLP_RPD 0x010 /* 2: instruct Rx to start */
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#define TLP_RPD 0x10 /* 2: instruct Rx to start */
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#define RPD_POLL (1U<< 0) /* receive poll demand */
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#define TLP_RRBA 0x018 /* 3: Rx descriptor base */
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#define TLP_TRBA 0x020 /* 4: Tx descriptor base */
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#define TLP_STS 0x028 /* 5: status */
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#define TLP_RRBA 0x18 /* 3: Rx descriptor base */
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#define TLP_TRBA 0x20 /* 4: Tx descriptor base */
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#define TLP_STS 0x28 /* 5: status */
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#define STS_TS 0x00700000 /* Tx status */
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#define STS_RS 0x000e0000 /* Rx status */
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#define TLP_OMR 0x030 /* 6: operation mode */
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#define TLP_OMR 0x30 /* 6: operation mode */
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#define OMR_SDP (1U<<25) /* always ON */
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#define OMR_PS (1U<<18) /* port select */
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#define OMR_PM (1U<< 6) /* promicuous */
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@ -109,27 +113,40 @@ struct desc {
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#define OMR_REN (1U<< 1) /* instruct start/stop Rx */
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#define OMR_FD (1U<< 9) /* FDX */
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#define TLP_IEN 0x38 /* 7: interrupt enable mask */
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#define TLP_APROM 0x048 /* 9: SEEPROM and MII management */
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#define TLP_APROM 0x48 /* 9: SEEPROM and MII management */
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#define SROM_RD (1U <<14) /* read operation */
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#define SROM_WR (1U <<13) /* write openration */
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#define SROM_SR (1U <<11) /* SEEPROM select */
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#define TLP_CSR12 0x60 /* SIA status */
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#define TLP_CSR13 0x68 /* SIA connectivity register */
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#define SIACONN_10BT 0x0000ef01 /* 10BASE-T for 21041 */
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#define TLP_CSR14 0x70 /* SIA TX RX register */
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#define SIATXRX_10BT 0x0000ffff /* 10BASE-T for 21041 pass 2 */
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#define TLP_CSR15 0x78 /* SIA general register */
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#define SIAGEN_MD0 (1U<<16)
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#define SIAGEN_CWE (1U<<28)
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#define SIAGEN_10BT 0x00000000 /* 10BASE-T for 21041 */
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#define TLP_SETUP_NADDR 16
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#define TLP_SETUPLEN 192 /* 16 * 3 * sizeof(uint32_t) */
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#define FRAMESIZE 1536
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#define BUFSIZE 2048
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#define NTXBUF 2
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#define NEXT_TXBUF(x) (((x) + 1) & (NTXBUF - 1))
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#define NRXBUF 2
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#define NEXT_RXBUF(x) (((x) + 1) & (NRXBUF - 1))
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struct local {
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struct desc txd;
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struct desc txd[NTXBUF];
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struct desc rxd[NRXBUF];
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uint8_t txstore[BUFSIZE];
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uint8_t txstore[TLP_SETUPLEN];
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uint8_t rxstore[NRXBUF][BUFSIZE];
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uint32_t csr, omr;
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u_int tx;
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u_int rx;
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u_int sromsft;
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u_int phy;
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@ -150,25 +167,33 @@ static void mii_initphy(struct local *);
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void *
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tlp_init(void *cookie)
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{
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uint32_t val;
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uint32_t val, tag;
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struct local *l;
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struct desc *txd, *rxd;
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uint8_t *en;
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uint8_t *en, *p;
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int i;
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int is21041;
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if (cobalt_id == COBALT_ID_QUBE2700)
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is21041 = 1;
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else
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is21041 = 0;
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l = ALLOC(struct local, CACHELINESIZE);
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memset(l, 0, sizeof(struct local));
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DPRINTF(("tlp: l = %p, txd = %p, rxd[0] = %p, rxd[1] = %p\n",
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l, &l->txd, &l->rxd[0], &l->rxd[1]));
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DPRINTF(("tlp: l = %p, txd[0] = %p, txd[1] = %p\n",
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l, &l->txd[0], &l->txd[1]));
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DPRINTF(("tlp: rxd[0] = %p, rxd[1] = %p\n",
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&l->rxd[0], &l->rxd[1]));
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DPRINTF(("tlp: txstore = %p, rxstore[0] = %p, rxstore[1] = %p\n",
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l->txstore, l->rxstore[0], l->rxstore[1]));
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#if 0
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#if 1
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/* XXX assume tlp0 at pci0 dev 7 function 0 */
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tag = (0 << 16) | ( 7 << 11) | (0 << 8);
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/* memory map is not initialized by the firmware on cobalt */
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l->csr = MIPS_PHYS_TO_KSEG1(pcicfgread(tag, 0x10) & 0xfffffffc);
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l->csr = MIPS_PHYS_TO_KSEG1(pcicfgread(tag, 0x10) & ~3U);
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DPRINTF(("%s: CSR = 0x%x\n", __func__, l->csr));
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#else
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l->csr = MIPS_PHYS_TO_KSEG1(COBALT_TLP0_BASE);
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@ -181,10 +206,25 @@ tlp_init(void *cookie)
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DELAY(1000);
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(void)CSR_READ(l, TLP_BMR);
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if (is21041) {
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/* reset SIA for 10BASE-T */
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CSR_WRITE(l, TLP_CSR13, 0);
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DELAY(1000);
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CSR_WRITE(l, TLP_CSR15, SIAGEN_10BT);
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CSR_WRITE(l, TLP_CSR14, SIATXRX_10BT);
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CSR_WRITE(l, TLP_CSR13, SIACONN_10BT);
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} else {
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/* reset PHY (cobalt quirk from if_tlp_pci.c) */
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CSR_WRITE(l, TLP_CSR15, SIAGEN_CWE | SIAGEN_MD0);
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DELAY(10);
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CSR_WRITE(l, TLP_CSR15, SIAGEN_CWE);
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DELAY(10);
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}
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l->omr = OMR_PS | OMR_SDP;
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CSR_WRITE(l, TLP_OMR, l->omr);
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CSR_WRITE(l, TLP_STS, ~0);
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CSR_WRITE(l, TLP_IEN, 0);
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CSR_WRITE(l, TLP_STS, ~0);
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#if 0
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mii_initphy(l);
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@ -213,37 +253,51 @@ tlp_init(void *cookie)
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rxd[i].xd1 = htole32(R1_RCH|FRAMESIZE);
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rxd[i].xd0 = htole32(R0_OWN);
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}
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CSR_WRITE(l, TLP_RRBA, VTOPHYS(rxd));
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/* "setup packet" to have own station address */
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txd = &l->txd;
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txd->xd3 = htole32(VTOPHYS(txd));
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txd = &l->txd[0];
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for (i = 0; i < NTXBUF; i++) {
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txd[i].xd3 = htole32(VTOPHYS(&txd[NEXT_TXBUF(i)]));
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txd[i].xd0 = htole32(0);
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}
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/* prepare setup packet */
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p = l->txstore;
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memset(p, 0, TLP_SETUPLEN);
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/* put broadcast first */
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p[0] = p[1] = p[4] = p[5] = p[8] = p[9] = 0xff;
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for (i = 1; i < TLP_SETUP_NADDR; i++) {
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/* put own station address to the rest */
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p[i * 12 + 0] = en[0];
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p[i * 12 + 1] = en[1];
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p[i * 12 + 4] = en[2];
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p[i * 12 + 5] = en[3];
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p[i * 12 + 8] = en[4];
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p[i * 12 + 9] = en[5];
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}
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txd = &l->txd[0];
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txd->xd2 = htole32(VTOPHYS(l->txstore));
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txd->xd1 = htole32(T1_SET | T1_TER);
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txd->xd0 = htole32(0);
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CSR_WRITE(l, TLP_TRBA, VTOPHYS(txd));
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memset(l->txstore, 0, FRAMESIZE);
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txd->xd1 = htole32(T1_SET | T1_TCH | TLP_SETUPLEN);
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txd->xd0 = htole32(T0_OWN);
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/* make sure the entire descriptors transfered to memory */
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wbinv(l, sizeof(struct local));
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l->rx = 0;
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l->omr |= OMR_FD | OMR_TEN | OMR_REN;
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CSR_WRITE(l, TLP_RRBA, VTOPHYS(rxd));
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CSR_WRITE(l, TLP_TRBA, VTOPHYS(txd));
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#if 1
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/* reset PHY (cobalt quirk from if_tlp_pci.c) */
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CSR_WRITE(l, TLP_CSR15, SIAGEN_CWE | SIAGEN_MD0);
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DELAY(10);
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CSR_WRITE(l, TLP_CSR15, SIAGEN_CWE);
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DELAY(10);
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#endif
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/* start Tx/Rx */
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l->tx = NEXT_TXBUF(0);
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l->rx = 0;
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l->omr |= OMR_TEN | OMR_REN;
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if (!is21041)
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l->omr |= OMR_FD;
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/* enable Tx/Rx */
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CSR_WRITE(l, TLP_OMR, l->omr);
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#if 0
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/* start TX and send setup packet */
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CSR_WRITE(l, TLP_TPD, TPD_POLL);
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#endif
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DELAY(1000);
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/* start RX */
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CSR_WRITE(l, TLP_RPD, RPD_POLL);
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return l;
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@ -256,23 +310,14 @@ tlp_send(void *dev, char *buf, u_int len)
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struct desc *txd;
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u_int loop;
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#if 1
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wb(buf, len);
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txd = &l->txd;
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txd->xd3 = htole32(VTOPHYS(txd));
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txd = &l->txd[l->tx];
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txd->xd2 = htole32(VTOPHYS(buf));
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txd->xd1 = htole32(T1_FS | T1_LS | T1_TER | (len & T1_TBS_MASK));
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#else
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memcpy(l->txstore, buf, len);
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wb(l->txstore, len);
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txd = &l->txd;
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txd->xd3 = htole32(VTOPHYS(txd));
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txd->xd2 = htole32(VTOPHYS(l->txstore));
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txd->xd1 = htole32(T1_FS | T1_LS | T1_TER | (len & T1_TBS_MASK));
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#endif
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txd->xd1 = htole32(T1_FS | T1_LS | T1_TCH | (len & T1_TBS_MASK));
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txd->xd0 = htole32(T0_OWN);
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wbinv(txd, sizeof(struct desc));
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CSR_WRITE(l, TLP_TPD, TPD_POLL);
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l->tx = NEXT_TXBUF(l->tx);
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loop = 100;
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do {
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if ((le32toh(txd->xd0) & T0_OWN) == 0)
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@ -295,7 +340,7 @@ tlp_recv(void *dev, char *buf, u_int maxlen, u_int timo)
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uint32_t rxstat;
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uint8_t *ptr;
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bound = 1000 * timo;
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bound = timo * 1000000;
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again:
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rxd = &l->rxd[l->rx];
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@ -304,7 +349,7 @@ tlp_recv(void *dev, char *buf, u_int maxlen, u_int timo)
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inv(rxd, sizeof(struct desc));
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if ((rxstat & R0_OWN) == 0)
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goto gotone;
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DELAY(1000); /* 1 milli second */
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DELAY(1);
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} while (--bound > 0);
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errno = 0;
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CSR_WRITE(l, TLP_RPD, RPD_POLL);
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@ -1,4 +1,4 @@
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$NetBSD: version,v 1.7 2008/03/01 17:45:11 tsutsui Exp $
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$NetBSD: version,v 1.8 2008/03/01 20:39:25 tsutsui Exp $
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NOTE ANY CHANGES YOU MAKE TO THE BOOTBLOCKS HERE. The format of this
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file is important - make sure the entries are appended on end, last item
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@ -11,3 +11,4 @@ is taken as the current.
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set default boot device accordingly
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0.5: Add support for netboot via tlp0
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0.6: Print a cobalt model name in banner
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0.7: Add support for netboot via 21041 on Qube2700
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