Add P2020/P2010 truth table definition.
Remove trailing whitespace.
This commit is contained in:
matt
parent
48389a60f2
commit
065e8fe680
@ -1,4 +1,4 @@
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/* $NetBSD: pq3pci.c,v 1.2 2011/01/18 01:02:53 matt Exp $ */
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/* $NetBSD: pq3pci.c,v 1.3 2011/02/08 06:19:13 matt Exp $ */
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/*-
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* Copyright (c) 2010, 2011 The NetBSD Foundation, Inc.
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* All rights reserved.
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@ -44,7 +44,7 @@
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: pq3pci.c,v 1.2 2011/01/18 01:02:53 matt Exp $");
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__KERNEL_RCSID(0, "$NetBSD: pq3pci.c,v 1.3 2011/02/08 06:19:13 matt Exp $");
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#include <sys/param.h>
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#include <sys/device.h>
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@ -69,91 +69,111 @@ __KERNEL_RCSID(0, "$NetBSD: pq3pci.c,v 1.2 2011/01/18 01:02:53 matt Exp $");
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#define PORDEVSR_MPC8536_TRUTH_ENCODE(inst, field, value, result) \
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TRUTH_ENCODE(SVR_MPC8536v1, inst, PORDEVSR_##field, \
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__SHIFTIN(field##_##MPC8536##_##value, PORDEVSR_##field), result)
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__SHIFTIN(field##_##MPC8536##_##value, PORDEVSR_##field), result)
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#define PORDEVSR_MPC8544_TRUTH_ENCODE(inst, field, value, result) \
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TRUTH_ENCODE(SVR_MPC8544v1, inst, PORDEVSR_##field, \
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__SHIFTIN(field##_##MPC8544##_##value, PORDEVSR_##field), result)
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__SHIFTIN(field##_##MPC8544##_##value, PORDEVSR_##field), result)
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#define PORDEVSR_MPC8548_TRUTH_ENCODE(inst, field, value, result) \
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TRUTH_ENCODE(SVR_MPC8548v1, inst, PORDEVSR_##field, \
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__SHIFTIN(field##_##MPC8548##_##value, PORDEVSR_##field), result)
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__SHIFTIN(field##_##MPC8548##_##value, PORDEVSR_##field), result)
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#define PORDEVSR_MPC8555_TRUTH_ENCODE(inst, field, value, result) \
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TRUTH_ENCODE(SVR_MPC8555v1, inst, PORDEVSR_##field, \
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__SHIFTIN(field##_##MPC8555##_##value, PORDEVSR_##field), result)
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__SHIFTIN(field##_##MPC8555##_##value, PORDEVSR_##field), result)
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#define PORDEVSR_MPC8572_TRUTH_ENCODE(inst, field, value, result) \
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TRUTH_ENCODE(SVR_MPC8572v1, inst, PORDEVSR_##field, \
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__SHIFTIN(field##_##MPC8572##_##value, PORDEVSR_##field), result)
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__SHIFTIN(field##_##MPC8572##_##value, PORDEVSR_##field), result)
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#define PORDEVSR_P20x0_TRUTH_ENCODE(inst, field, value, result) \
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TRUTH_ENCODE(SVR_P2020, inst, PORDEVSR_##field, \
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__SHIFTIN(field##_##P20x0##_##value, PORDEVSR_##field), result), \
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TRUTH_ENCODE(SVR_P2010, inst, PORDEVSR_##field, \
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__SHIFTIN(field##_##P20x0##_##value, PORDEVSR_##field), result)
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#define PORDEVSR_TRUTH_ENCODE(svr, inst, field, value, result) \
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TRUTH_ENCODE(svr, inst, PORDEVSR_##field, \
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__SHIFTIN(field##_##value, PORDEVSR_##field), result)
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__SHIFTIN(field##_##value, PORDEVSR_##field), result)
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const struct e500_truthtab pq3pci_pcie_lanes[] = {
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#ifdef MPC8548
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PORDEVSR_MPC8548_TRUTH_ENCODE(0, IOSEL, SRIO2500_PCIE1_X4, 4),
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PORDEVSR_MPC8548_TRUTH_ENCODE(0, IOSEL, SRIO1250_PCIE1_X4, 4),
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PORDEVSR_MPC8548_TRUTH_ENCODE(0, IOSEL, PCIE1_X8, 8),
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PORDEVSR_MPC8548_TRUTH_ENCODE(0, IOSEL, SRIO2500_PCIE1_X4, 4),
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PORDEVSR_MPC8548_TRUTH_ENCODE(0, IOSEL, SRIO1250_PCIE1_X4, 4),
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PORDEVSR_MPC8548_TRUTH_ENCODE(0, IOSEL, PCIE1_X8, 8),
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#endif
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#ifdef MPC8544
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PORDEVSR_MPC8544_TRUTH_ENCODE(1, IOSEL, PCIE1_ON, 4),
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PORDEVSR_MPC8544_TRUTH_ENCODE(1, IOSEL, PCIE1_SGMII_ON, 4),
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PORDEVSR_MPC8544_TRUTH_ENCODE(1, IOSEL, PCIE12_ON, 4),
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PORDEVSR_MPC8544_TRUTH_ENCODE(1, IOSEL, PCIE12_SGMII_ON, 4),
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PORDEVSR_MPC8544_TRUTH_ENCODE(1, IOSEL, PCIE1_ON, 4),
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PORDEVSR_MPC8544_TRUTH_ENCODE(1, IOSEL, PCIE1_SGMII_ON, 4),
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PORDEVSR_MPC8544_TRUTH_ENCODE(1, IOSEL, PCIE12_ON, 4),
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PORDEVSR_MPC8544_TRUTH_ENCODE(1, IOSEL, PCIE12_SGMII_ON, 4),
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PORDEVSR_MPC8544_TRUTH_ENCODE(1, IOSEL, PCIE123_ON, 4),
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PORDEVSR_MPC8544_TRUTH_ENCODE(1, IOSEL, PCIE123_SGMII_ON, 4),
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PORDEVSR_MPC8544_TRUTH_ENCODE(2, IOSEL, PCIE12_ON, 4),
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PORDEVSR_MPC8544_TRUTH_ENCODE(2, IOSEL, PCIE12_SGMII_ON, 4),
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PORDEVSR_MPC8544_TRUTH_ENCODE(2, IOSEL, PCIE12_ON, 4),
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PORDEVSR_MPC8544_TRUTH_ENCODE(2, IOSEL, PCIE12_SGMII_ON, 4),
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PORDEVSR_MPC8544_TRUTH_ENCODE(2, IOSEL, PCIE123_ON, 4),
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PORDEVSR_MPC8544_TRUTH_ENCODE(2, IOSEL, PCIE123_SGMII_ON, 4),
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PORDEVSR_MPC8544_TRUTH_ENCODE(3, IOSEL, PCIE123_ON, 1),
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PORDEVSR_MPC8544_TRUTH_ENCODE(3, IOSEL, PCIE123_ON, 1),
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PORDEVSR_MPC8544_TRUTH_ENCODE(3, IOSEL, PCIE123_SGMII_ON, 1),
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#endif
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#ifdef MPC8536
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PORDEVSR_MPC8536_TRUTH_ENCODE(1, IOSEL, PCIE1_X4, 4),
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PORDEVSR_MPC8536_TRUTH_ENCODE(1, IOSEL, PCIE1_X8, 8),
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PORDEVSR_MPC8536_TRUTH_ENCODE(1, IOSEL, PCIE1_X4, 4),
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PORDEVSR_MPC8536_TRUTH_ENCODE(1, IOSEL, PCIE1_X8, 8),
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PORDEVSR_MPC8536_TRUTH_ENCODE(1, IOSEL, PCIE12_X4, 4),
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PORDEVSR_MPC8536_TRUTH_ENCODE(1, IOSEL, PCIE1_X4_PCI23_X2, 4),
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PORDEVSR_MPC8536_TRUTH_ENCODE(2, IOSEL, PCIE12_X4, 4),
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PORDEVSR_MPC8536_TRUTH_ENCODE(2, IOSEL, PCIE12_X4, 4),
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PORDEVSR_MPC8536_TRUTH_ENCODE(2, IOSEL, PCIE1_X4_PCI23_X2, 2),
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PORDEVSR_MPC8536_TRUTH_ENCODE(3, IOSEL, PCIE1_X4_PCI23_X2, 2),
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#endif
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#ifdef MPC8572
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PORDEVSR_MPC8572_TRUTH_ENCODE(1, IOSEL, SRIO2500_PCIE1_X4, 4),
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PORDEVSR_MPC8572_TRUTH_ENCODE(1, IOSEL, SRIO1250_PCIE1_X4, 4),
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PORDEVSR_MPC8572_TRUTH_ENCODE(1, IOSEL, PCIE1_X4, 4),
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PORDEVSR_MPC8572_TRUTH_ENCODE(1, IOSEL, PCIE12_X4, 4),
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PORDEVSR_MPC8572_TRUTH_ENCODE(1, IOSEL, PCIE1_X4_23_X2, 4),
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PORDEVSR_MPC8572_TRUTH_ENCODE(1, IOSEL, PCIE1_X8, 8),
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PORDEVSR_MPC8572_TRUTH_ENCODE(1, IOSEL, SRIO2500_PCIE1_X4, 4),
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PORDEVSR_MPC8572_TRUTH_ENCODE(1, IOSEL, SRIO1250_PCIE1_X4, 4),
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PORDEVSR_MPC8572_TRUTH_ENCODE(1, IOSEL, PCIE1_X4, 4),
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PORDEVSR_MPC8572_TRUTH_ENCODE(1, IOSEL, PCIE12_X4, 4),
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PORDEVSR_MPC8572_TRUTH_ENCODE(1, IOSEL, PCIE1_X4_23_X2, 4),
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PORDEVSR_MPC8572_TRUTH_ENCODE(1, IOSEL, PCIE1_X8, 8),
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PORDEVSR_MPC8572_TRUTH_ENCODE(2, IOSEL, PCIE12_X4, 4),
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PORDEVSR_MPC8572_TRUTH_ENCODE(2, IOSEL, PCIE1_X4_23_X2, 2),
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PORDEVSR_MPC8572_TRUTH_ENCODE(2, IOSEL, PCIE12_X4, 4),
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PORDEVSR_MPC8572_TRUTH_ENCODE(2, IOSEL, PCIE1_X4_23_X2, 2),
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PORDEVSR_MPC8572_TRUTH_ENCODE(3, IOSEL, PCIE1_X4_23_X2, 2),
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PORDEVSR_MPC8572_TRUTH_ENCODE(3, IOSEL, PCIE1_X4_23_X2, 2),
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#endif
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#ifdef P2020
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PORDEVSR_P20x0_TRUTH_ENCODE(1, IOSEL, PCIE1_X1, 1),
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PORDEVSR_P20x0_TRUTH_ENCODE(1, IOSEL, PCIE12_X1_3_X2, 1),
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PORDEVSR_P20x0_TRUTH_ENCODE(1, IOSEL, PCIE13_X2, 2),
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PORDEVSR_P20x0_TRUTH_ENCODE(1, IOSEL, PCIE1_X4, 4),
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PORDEVSR_P20x0_TRUTH_ENCODE(1, IOSEL, PCIE1_X1_SRIO2500_1X, 1),
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PORDEVSR_P20x0_TRUTH_ENCODE(1, IOSEL, PCIE12_X1_SGMII23, 1),
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PORDEVSR_P20x0_TRUTH_ENCODE(1, IOSEL, PCIE1_X2_SGMII23, 2),
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PORDEVSR_P20x0_TRUTH_ENCODE(2, IOSEL, PCIE12_X1_3_X2, 1),
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PORDEVSR_P20x0_TRUTH_ENCODE(2, IOSEL, PCIE12_X1_SGMII23, 1),
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PORDEVSR_P20x0_TRUTH_ENCODE(3, IOSEL, PCIE12_X1_3_X2, 2),
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PORDEVSR_P20x0_TRUTH_ENCODE(3, IOSEL, PCIE13_X2, 2),
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#endif
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};
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static const struct e500_truthtab pq3pci_pci_pcix[] = {
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#ifdef MPC8548
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PORDEVSR_TRUTH_ENCODE(SVR_MPC8548v1, 1, PCI1, PCIX, 1),
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PORDEVSR_TRUTH_ENCODE(SVR_MPC8548v1, 1, PCI1, PCIX, 1),
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#endif
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};
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static const struct e500_truthtab pq3pci_pci_pci32[] = {
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#ifdef MPC8548
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PORDEVSR_TRUTH_ENCODE(SVR_MPC8548v1, 1, PCI32, FALSE, 64),
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PORDEVSR_TRUTH_ENCODE(SVR_MPC8548v1, 1, PCI32, TRUE, 32),
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PORDEVSR_TRUTH_ENCODE(SVR_MPC8548v1, 1, PCI32, FALSE, 64),
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PORDEVSR_TRUTH_ENCODE(SVR_MPC8548v1, 1, PCI32, TRUE, 32),
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#endif
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#ifdef MPC8555
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PORDEVSR_TRUTH_ENCODE(SVR_MPC8555v1, 0, PCI32, FALSE, 64),
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PORDEVSR_TRUTH_ENCODE(SVR_MPC8555v1, 0, PCI32, TRUE, 32),
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PORDEVSR_TRUTH_ENCODE(SVR_MPC8555v1, 0, PCI32, FALSE, 64),
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PORDEVSR_TRUTH_ENCODE(SVR_MPC8555v1, 0, PCI32, TRUE, 32),
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#endif
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};
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@ -370,7 +390,7 @@ pq3pci_owin_setup(struct pq3pci_softc *sc, u_int winnum,
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"outbound window %u: potar=%#x, potear=%#x, powbar=%x, powar=%#x\n",
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winnum, owin->potar, owin->potear, owin->powbar, owin->powar);
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aprint_normal_dev(sc->sc_dev,
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"outbound window %u: maps %u%cB of PCI %s space @ %#"PRIx64" onto local addresses @ %#"PRIx64".\n",
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"outbound window %u: maps %u%cB of PCI %s space @ %#"PRIx64" onto local addresses @ %#"PRIx64".\n",
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winnum, 1 << (win_size_log2 % 10), units[win_size_log2 / 10],
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(owin->powar & PEXOWAR_RTT) == PEXOWAR_RTT_IO ? "I/O" : "memory",
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local_base, pci_base);
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@ -418,7 +438,7 @@ pq3pci_iwin_setup(struct pq3pci_softc *sc, u_int winnum,
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"inbound window %u: pitar=%#x, piwbar=%x, piwbear=%#x, piwar=%#x\n",
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winnum, iwin->pitar, iwin->piwbar, iwin->piwbear, iwin->piwar);
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aprint_normal_dev(sc->sc_dev,
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"inbound window %u: maps %u%cB of PCI address space @ %#"PRIx64" to local memory @ %#"PRIx64".\n",
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"inbound window %u: maps %u%cB of PCI address space @ %#"PRIx64" to local memory @ %#"PRIx64".\n",
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winnum, 1 << (win_size_log2 % 10), units[win_size_log2 / 10],
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pci_base, local_base);
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#endif /* DEBUG */
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@ -561,7 +581,7 @@ pq3pci_pis_intr(void *v)
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#if 0
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printf("%s %d:%s %"PRIu64": %p(%p) %"PRIu64": %d\n", __func__,
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curcpu()->ci_idepth,
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pis->pis_ev.ev_group, pis->pis_ev.ev_count,
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pis->pis_ev.ev_group, pis->pis_ev.ev_count,
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pih->pih_ih.ih_func, pih->pih_ih.ih_arg, pih->pih_count, rv);
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#endif
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if (rv != 0) {
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@ -618,7 +638,7 @@ pq3pci_intrmap_setup(struct pq3pci_softc *sc,
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if (sc->sc_ih == NULL)
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panic("%s: failed to establish interrupt %d\n",
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device_xname(sc->sc_dev), cnl->cnl_intrs[0]);
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return true;
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}
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@ -833,10 +853,10 @@ pq3pci_cpunode_attach(device_t parent, device_t self, void *aux)
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M_DEVBUF, NULL, 0, EX_NOWAIT);
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struct extent *memext = extent_create("pcimem", membase,
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membase + PCI_MEMSIZE, M_DEVBUF, NULL, 0, EX_NOWAIT);
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error = pci_configure_bus(pc, ioext, memext, NULL, 0,
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curcpu()->ci_ci.dcache_line_size);
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extent_destroy(ioext);
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extent_destroy(memext);
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@ -1452,7 +1472,7 @@ pq3pci_pci_chipset_init(struct pq3pci_softc *sc)
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pc->pc_bus = 0;
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pc->pc_memt = &sc->sc_pci_mem_bst.bs_tag;
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pc->pc_iot = &sc->sc_pci_io_bst.bs_tag;
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SIMPLEQ_INIT(&pc->pc_pbi);
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return pc;
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