Somehow these were missed by me / cvs in the nick-hppapmap merge.
This commit is contained in:
skrll
parent
8516d55745
commit
0608921b49
770
sys/arch/hp700/dev/astro.c
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770
sys/arch/hp700/dev/astro.c
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@ -0,0 +1,770 @@
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/* $NetBSD: astro.c,v 1.2 2009/04/30 07:03:12 skrll Exp $ */
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/* $OpenBSD: astro.c,v 1.8 2007/10/06 23:50:54 krw Exp $ */
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/*
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* Copyright (c) 2007 Mark Kettenis
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*
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* Permission to use, copy, modify, and distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/device.h>
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#include <sys/extent.h>
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#include <sys/malloc.h>
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#include <sys/reboot.h>
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#include <sys/tree.h>
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#include <uvm/uvm_extern.h>
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#include <machine/iomod.h>
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#include <machine/autoconf.h>
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#include <machine/pdc.h>
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#include <machine/endian.h>
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#include <hp700/dev/cpudevs.h>
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struct astro_regs {
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uint32_t rid;
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uint32_t pad0000;
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uint32_t ioc_ctrl;
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uint32_t pad0008;
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uint8_t resv1[0x0300 - 0x0010];
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uint64_t lmmio_direct0_base;
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uint64_t lmmio_direct0_mask;
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uint64_t lmmio_direct0_route;
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uint64_t lmmio_direct1_base;
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uint64_t lmmio_direct1_mask;
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uint64_t lmmio_direct1_route;
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uint64_t lmmio_direct2_base;
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uint64_t lmmio_direct2_mask;
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uint64_t lmmio_direct2_route;
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uint64_t lmmio_direct3_base;
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uint64_t lmmio_direct3_mask;
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uint64_t lmmio_direct3_route;
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uint64_t lmmio_dist_base;
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uint64_t lmmio_dist_mask;
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uint64_t lmmio_dist_route;
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uint64_t gmmio_dist_base;
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uint64_t gmmio_dist_mask;
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uint64_t gmmio_dist_route;
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uint64_t ios_dist_base;
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uint64_t ios_dist_mask;
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uint64_t ios_dist_route;
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uint8_t resv2[0x03c0 - 0x03a8];
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uint64_t ios_direct_base;
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uint64_t ios_direct_mask;
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uint64_t ios_direct_route;
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uint8_t resv3[0x22000 - 0x03d8];
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uint64_t func_id;
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uint64_t func_class;
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uint8_t resv4[0x22040 - 0x22010];
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uint64_t rope_config;
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uint8_t resv5[0x22050 - 0x22048];
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uint64_t rope_debug;
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uint8_t resv6[0x22200 - 0x22058];
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uint64_t rope0_control;
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uint64_t rope1_control;
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uint64_t rope2_control;
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uint64_t rope3_control;
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uint64_t rope4_control;
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uint64_t rope5_control;
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uint64_t rope6_control;
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uint64_t rope7_control;
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uint8_t resv7[0x22300 - 0x22240];
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uint32_t tlb_ibase;
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uint32_t pad22300;
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uint32_t tlb_imask;
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uint32_t pad22308;
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uint32_t tlb_pcom;
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uint32_t pad22310;
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uint32_t tlb_tcnfg;
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uint32_t pad22318;
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uint64_t tlb_pdir_base;
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};
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#define ASTRO_IOC_CTRL_TE 0x0001 /* TOC Enable */
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#define ASTRO_IOC_CTRL_CE 0x0002 /* Coalesce Enable */
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#define ASTRO_IOC_CTRL_DE 0x0004 /* Dillon Enable */
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#define ASTRO_IOC_CTRL_IE 0x0008 /* IOS Enable */
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#define ASTRO_IOC_CTRL_OS 0x0010 /* Outbound Synchronous */
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#define ASTRO_IOC_CTRL_IS 0x0020 /* Inbound Synchronous */
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#define ASTRO_IOC_CTRL_RC 0x0040 /* Read Current Enable */
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#define ASTRO_IOC_CTRL_L0 0x0080 /* 0-length Read Enable */
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#define ASTRO_IOC_CTRL_RM 0x0100 /* Real Mode */
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#define ASTRO_IOC_CTRL_NC 0x0200 /* Non-coherent Mode */
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#define ASTRO_IOC_CTRL_ID 0x0400 /* Interrupt Disable */
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#define ASTRO_IOC_CTRL_D4 0x0800 /* Disable 4-byte Coalescing */
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#define ASTRO_IOC_CTRL_CC 0x1000 /* Increase Coalescing counter value */
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#define ASTRO_IOC_CTRL_DD 0x2000 /* Disable distr. range coalescing */
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#define ASTRO_IOC_CTRL_DC 0x4000 /* Disable the coalescing counter */
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#define IOTTE_V 0x8000000000000000LL /* Entry valid */
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#define IOTTE_PAMASK 0x000000fffffff000LL
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#define IOTTE_CI 0x00000000000000ffLL /* Coherent index */
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struct astro_softc {
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struct device sc_dv;
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bus_dma_tag_t sc_dmat;
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struct astro_regs volatile *sc_regs;
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uint64_t *sc_pdir;
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char sc_dvmamapname[20];
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struct extent *sc_dvmamap;
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struct hppa_bus_dma_tag sc_dmatag;
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};
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/*
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* per-map DVMA page table
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*/
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struct iommu_page_entry {
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SPLAY_ENTRY(iommu_page_entry) ipe_node;
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paddr_t ipe_pa;
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vaddr_t ipe_va;
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bus_addr_t ipe_dva;
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};
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struct iommu_page_map {
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SPLAY_HEAD(iommu_page_tree, iommu_page_entry) ipm_tree;
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int ipm_maxpage; /* Size of allocated page map */
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int ipm_pagecnt; /* Number of entries in use */
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struct iommu_page_entry ipm_map[1];
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};
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/*
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* per-map IOMMU state
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*/
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struct iommu_map_state {
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struct astro_softc *ims_sc;
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bus_addr_t ims_dvmastart;
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bus_size_t ims_dvmasize;
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struct iommu_page_map ims_map; /* map must be last (array at end) */
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};
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int astro_match(struct device *, struct cfdata *, void *);
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void astro_attach(struct device *, struct device *, void *);
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static void astro_callback(struct device *self, struct confargs *ca);
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CFATTACH_DECL(astro, sizeof(struct astro_softc),
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astro_match, astro_attach, NULL, NULL);
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extern struct cfdriver astro_cd;
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int iommu_dvmamap_create(void *, bus_size_t, int, bus_size_t, bus_size_t,
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int, bus_dmamap_t *);
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void iommu_dvmamap_destroy(void *, bus_dmamap_t);
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int iommu_dvmamap_load(void *, bus_dmamap_t, void *, bus_size_t,
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struct proc *, int);
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int iommu_dvmamap_load_mbuf(void *, bus_dmamap_t, struct mbuf *, int);
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int iommu_dvmamap_load_uio(void *, bus_dmamap_t, struct uio *, int);
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int iommu_dvmamap_load_raw(void *, bus_dmamap_t, bus_dma_segment_t *,
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int, bus_size_t, int);
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void iommu_dvmamap_unload(void *, bus_dmamap_t);
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void iommu_dvmamap_sync(void *, bus_dmamap_t, bus_addr_t, bus_size_t, int);
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int iommu_dvmamem_alloc(void *, bus_size_t, bus_size_t, bus_size_t,
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bus_dma_segment_t *, int, int *, int);
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void iommu_dvmamem_free(void *, bus_dma_segment_t *, int);
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int iommu_dvmamem_map(void *, bus_dma_segment_t *, int, size_t,
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void **, int);
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void iommu_dvmamem_unmap(void *, void *, size_t);
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paddr_t iommu_dvmamem_mmap(void *, bus_dma_segment_t *, int, off_t, int, int);
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void iommu_enter(struct astro_softc *, bus_addr_t, paddr_t, vaddr_t, int);
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void iommu_remove(struct astro_softc *, bus_addr_t);
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struct iommu_map_state *iommu_iomap_create(int);
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void iommu_iomap_destroy(struct iommu_map_state *);
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int iommu_iomap_insert_page(struct iommu_map_state *, vaddr_t, paddr_t);
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bus_addr_t iommu_iomap_translate(struct iommu_map_state *, paddr_t);
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void iommu_iomap_clear_pages(struct iommu_map_state *);
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static int iommu_iomap_load_map(struct astro_softc *, bus_dmamap_t, int);
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const struct hppa_bus_dma_tag astro_dmat = {
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NULL,
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iommu_dvmamap_create, iommu_dvmamap_destroy,
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iommu_dvmamap_load, iommu_dvmamap_load_mbuf,
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iommu_dvmamap_load_uio, iommu_dvmamap_load_raw,
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iommu_dvmamap_unload, iommu_dvmamap_sync,
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iommu_dvmamem_alloc, iommu_dvmamem_free, iommu_dvmamem_map,
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iommu_dvmamem_unmap, iommu_dvmamem_mmap
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};
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int
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astro_match(struct device *parent, struct cfdata *cf, void *aux)
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{
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struct confargs *ca = aux;
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/* Astro is a U-Turn variant. */
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if (ca->ca_type.iodc_type != HPPA_TYPE_IOA ||
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ca->ca_type.iodc_sv_model != HPPA_IOA_UTURN)
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return 0;
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if (ca->ca_type.iodc_model == 0x58 &&
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ca->ca_type.iodc_revision >= 0x20)
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return 1;
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return 0;
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}
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void
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astro_attach(struct device *parent, struct device *self, void *aux)
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{
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struct confargs *ca = aux, nca;
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struct astro_softc *sc = (struct astro_softc *)self;
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volatile struct astro_regs *r;
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bus_space_handle_t ioh;
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uint32_t rid, ioc_ctrl;
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psize_t size;
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vaddr_t va;
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paddr_t pa;
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struct vm_page *m;
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struct pglist mlist;
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int iova_bits;
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sc->sc_dmat = ca->ca_dmatag;
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if (bus_space_map(ca->ca_iot, ca->ca_hpa, sizeof(struct astro_regs),
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0, &ioh)) {
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printf(": can't map IO space\n");
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return;
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}
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sc->sc_regs = r = (struct astro_regs *)ca->ca_hpa;
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rid = le32toh(r->rid);
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printf(": Astro rev %d.%d\n", (rid & 7) + 1, (rid >> 3) & 3);
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ioc_ctrl = le32toh(r->ioc_ctrl);
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ioc_ctrl &= ~ASTRO_IOC_CTRL_CE;
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ioc_ctrl &= ~ASTRO_IOC_CTRL_RM;
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ioc_ctrl &= ~ASTRO_IOC_CTRL_NC;
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r->ioc_ctrl = htole32(ioc_ctrl);
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/*
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* Setup the iommu.
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*/
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/* XXX This gives us 256MB of iova space. */
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iova_bits = 28;
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r->tlb_ibase = htole32(0);
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r->tlb_imask = htole32(0xffffffff << iova_bits);
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/* Page size is 4K. */
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r->tlb_tcnfg = htole32(0);
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/* Flush TLB. */
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r->tlb_pcom = htole32(31);
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/*
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* Allocate memory for I/O pagetables. They need to be physically
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* contiguous.
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*/
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size = (1 << (iova_bits - PAGE_SHIFT)) * sizeof(uint64_t);
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TAILQ_INIT(&mlist);
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if (uvm_pglistalloc(size, 0, -1, PAGE_SIZE, 0, &mlist, 1, 0) != 0)
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panic("astrottach: no memory");
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va = uvm_km_alloc(kernel_map, size, 0, UVM_KMF_VAONLY | UVM_KMF_NOWAIT);
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if (va == 0)
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panic("astroattach: no memory");
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sc->sc_pdir = (uint64_t *)va;
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m = TAILQ_FIRST(&mlist);
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r->tlb_pdir_base = htole64(VM_PAGE_TO_PHYS(m));
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/* Map the pages. */
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for (; m != NULL; m = TAILQ_NEXT(m, pageq.queue)) {
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pa = VM_PAGE_TO_PHYS(m);
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pmap_enter(pmap_kernel(), va, pa,
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VM_PROT_READ|VM_PROT_WRITE, PMAP_WIRED);
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va += PAGE_SIZE;
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}
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pmap_update(pmap_kernel());
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memset(sc->sc_pdir, 0, size);
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/*
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* The PDC might have set up some devices to do DMA. It will do
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* this for the onboard USB controller if an USB keyboard is used
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* for console input. In that case, bad things will happen if we
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* enable iova space. So reset the PDC devices before we do that.
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* Don't do this if we're using a serial console though, since it
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* will stop working if we do. This is fine since the serial port
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* doesn't do DMA.
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*/
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if (PAGE0->mem_cons.pz_class != PCL_DUPLEX)
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pdc_call((iodcio_t)pdc, 0, PDC_IO, PDC_IO_RESET_DEVICES);
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/* Enable iova space. */
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r->tlb_ibase = htole32(1);
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/*
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* Now all the hardware's working we need to allocate a dvma map.
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*/
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snprintf(sc->sc_dvmamapname, sizeof(sc->sc_dvmamapname),
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"%s_dvma", sc->sc_dv.dv_xname);
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sc->sc_dvmamap = extent_create(sc->sc_dvmamapname, 0, (1 << iova_bits),
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M_DEVBUF, 0, 0, EX_NOWAIT);
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sc->sc_dmatag = astro_dmat;
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sc->sc_dmatag._cookie = sc;
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nca = *ca; /* clone from us */
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// nca.ca_hpamask = HPPA_IOBEGIN;
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nca.ca_dmatag = &sc->sc_dmatag;
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nca.ca_hpabase = 0; /* HPPA_UNDEF */
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nca.ca_nmodules = MAXMODBUS;
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pdc_scanbus(self, &nca, astro_callback);
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}
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static void
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astro_callback(struct device *self, struct confargs *ca)
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{
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config_found_sm_loc(self, "gedoens", NULL, ca, mbprint, mbsubmatch);
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}
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int
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iommu_dvmamap_create(void *v, bus_size_t size, int nsegments,
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bus_size_t maxsegsz, bus_size_t boundary, int flags, bus_dmamap_t *dmamap)
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{
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struct astro_softc *sc = v;
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bus_dmamap_t map;
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struct iommu_map_state *ims;
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int error;
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error = bus_dmamap_create(sc->sc_dmat, size, nsegments, maxsegsz,
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boundary, flags, &map);
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if (error)
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return (error);
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ims = iommu_iomap_create(atop(round_page(size)));
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if (ims == NULL) {
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bus_dmamap_destroy(sc->sc_dmat, map);
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return (ENOMEM);
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}
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ims->ims_sc = sc;
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map->_dm_cookie = ims;
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*dmamap = map;
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return (0);
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}
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void
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iommu_dvmamap_destroy(void *v, bus_dmamap_t map)
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{
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struct astro_softc *sc = v;
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/*
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* The specification (man page) requires a loaded
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* map to be unloaded before it is destroyed.
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*/
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if (map->dm_nsegs)
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iommu_dvmamap_unload(sc, map);
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if (map->_dm_cookie)
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iommu_iomap_destroy(map->_dm_cookie);
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map->_dm_cookie = NULL;
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bus_dmamap_destroy(sc->sc_dmat, map);
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}
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static int
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iommu_iomap_load_map(struct astro_softc *sc, bus_dmamap_t map, int flags)
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{
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struct iommu_map_state *ims = map->_dm_cookie;
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struct iommu_page_map *ipm = &ims->ims_map;
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struct iommu_page_entry *e;
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int err, seg, s;
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paddr_t pa, paend;
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vaddr_t va;
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bus_size_t sgsize;
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bus_size_t align, boundary;
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u_long dvmaddr;
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bus_addr_t dva;
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int i;
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/* XXX */
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boundary = map->_dm_boundary;
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align = PAGE_SIZE;
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iommu_iomap_clear_pages(ims);
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for (seg = 0; seg < map->dm_nsegs; seg++) {
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struct hppa_bus_dma_segment *ds = &map->dm_segs[seg];
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paend = round_page(ds->ds_addr + ds->ds_len);
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for (pa = trunc_page(ds->ds_addr), va = trunc_page(ds->_ds_va);
|
||||
pa < paend; pa += PAGE_SIZE, va += PAGE_SIZE) {
|
||||
err = iommu_iomap_insert_page(ims, va, pa);
|
||||
if (err) {
|
||||
printf("iomap insert error: %d for "
|
||||
"va 0x%lx pa 0x%lx\n", err, va, pa);
|
||||
bus_dmamap_unload(sc->sc_dmat, map);
|
||||
iommu_iomap_clear_pages(ims);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
sgsize = ims->ims_map.ipm_pagecnt * PAGE_SIZE;
|
||||
/* XXXNH */
|
||||
s = splhigh();
|
||||
err = extent_alloc(sc->sc_dvmamap, sgsize, align, boundary,
|
||||
EX_NOWAIT | EX_BOUNDZERO, &dvmaddr);
|
||||
splx(s);
|
||||
if (err)
|
||||
return (err);
|
||||
|
||||
ims->ims_dvmastart = dvmaddr;
|
||||
ims->ims_dvmasize = sgsize;
|
||||
|
||||
dva = dvmaddr;
|
||||
for (i = 0, e = ipm->ipm_map; i < ipm->ipm_pagecnt; ++i, ++e) {
|
||||
e->ipe_dva = dva;
|
||||
iommu_enter(sc, e->ipe_dva, e->ipe_pa, e->ipe_va, flags);
|
||||
dva += PAGE_SIZE;
|
||||
}
|
||||
|
||||
for (seg = 0; seg < map->dm_nsegs; seg++) {
|
||||
struct hppa_bus_dma_segment *ds = &map->dm_segs[seg];
|
||||
ds->ds_addr = iommu_iomap_translate(ims, ds->ds_addr);
|
||||
}
|
||||
|
||||
return (0);
|
||||
}
|
||||
|
||||
int
|
||||
iommu_dvmamap_load(void *v, bus_dmamap_t map, void *addr, bus_size_t size,
|
||||
struct proc *p, int flags)
|
||||
{
|
||||
struct astro_softc *sc = v;
|
||||
int err;
|
||||
|
||||
err = bus_dmamap_load(sc->sc_dmat, map, addr, size, p, flags);
|
||||
if (err)
|
||||
return (err);
|
||||
|
||||
return iommu_iomap_load_map(sc, map, flags);
|
||||
}
|
||||
|
||||
int
|
||||
iommu_dvmamap_load_mbuf(void *v, bus_dmamap_t map, struct mbuf *m, int flags)
|
||||
{
|
||||
struct astro_softc *sc = v;
|
||||
int err;
|
||||
|
||||
err = bus_dmamap_load_mbuf(sc->sc_dmat, map, m, flags);
|
||||
if (err)
|
||||
return (err);
|
||||
|
||||
return iommu_iomap_load_map(sc, map, flags);
|
||||
}
|
||||
|
||||
int
|
||||
iommu_dvmamap_load_uio(void *v, bus_dmamap_t map, struct uio *uio, int flags)
|
||||
{
|
||||
struct astro_softc *sc = v;
|
||||
|
||||
printf("load_uio\n");
|
||||
|
||||
return (bus_dmamap_load_uio(sc->sc_dmat, map, uio, flags));
|
||||
}
|
||||
|
||||
int
|
||||
iommu_dvmamap_load_raw(void *v, bus_dmamap_t map, bus_dma_segment_t *segs,
|
||||
int nsegs, bus_size_t size, int flags)
|
||||
{
|
||||
struct astro_softc *sc = v;
|
||||
|
||||
printf("load_raw\n");
|
||||
|
||||
return (bus_dmamap_load_raw(sc->sc_dmat, map, segs, nsegs, size, flags));
|
||||
}
|
||||
|
||||
void
|
||||
iommu_dvmamap_unload(void *v, bus_dmamap_t map)
|
||||
{
|
||||
struct astro_softc *sc = v;
|
||||
struct iommu_map_state *ims = map->_dm_cookie;
|
||||
struct iommu_page_map *ipm = &ims->ims_map;
|
||||
struct iommu_page_entry *e;
|
||||
int err, i, s;
|
||||
|
||||
/* Remove the IOMMU entries. */
|
||||
for (i = 0, e = ipm->ipm_map; i < ipm->ipm_pagecnt; ++i, ++e)
|
||||
iommu_remove(sc, e->ipe_dva);
|
||||
|
||||
/* Clear the iomap. */
|
||||
iommu_iomap_clear_pages(ims);
|
||||
|
||||
bus_dmamap_unload(sc->sc_dmat, map);
|
||||
|
||||
s = splhigh();
|
||||
err = extent_free(sc->sc_dvmamap, ims->ims_dvmastart,
|
||||
ims->ims_dvmasize, EX_NOWAIT);
|
||||
ims->ims_dvmastart = 0;
|
||||
ims->ims_dvmasize = 0;
|
||||
splx(s);
|
||||
if (err)
|
||||
printf("warning: %ld of DVMA space lost\n", ims->ims_dvmasize);
|
||||
}
|
||||
|
||||
void
|
||||
iommu_dvmamap_sync(void *v, bus_dmamap_t map, bus_addr_t off,
|
||||
bus_size_t len, int ops)
|
||||
{
|
||||
/* Nothing to do; DMA is cache-coherent. */
|
||||
}
|
||||
|
||||
int
|
||||
iommu_dvmamem_alloc(void *v, bus_size_t size, bus_size_t alignment,
|
||||
bus_size_t boundary, bus_dma_segment_t *segs,
|
||||
int nsegs, int *rsegs, int flags)
|
||||
{
|
||||
struct astro_softc *sc = v;
|
||||
|
||||
return (bus_dmamem_alloc(sc->sc_dmat, size, alignment, boundary,
|
||||
segs, nsegs, rsegs, flags));
|
||||
}
|
||||
|
||||
void
|
||||
iommu_dvmamem_free(void *v, bus_dma_segment_t *segs, int nsegs)
|
||||
{
|
||||
struct astro_softc *sc = v;
|
||||
|
||||
bus_dmamem_free(sc->sc_dmat, segs, nsegs);
|
||||
}
|
||||
|
||||
int
|
||||
iommu_dvmamem_map(void *v, bus_dma_segment_t *segs, int nsegs, size_t size,
|
||||
void **kvap, int flags)
|
||||
{
|
||||
struct astro_softc *sc = v;
|
||||
|
||||
return (bus_dmamem_map(sc->sc_dmat, segs, nsegs, size, kvap, flags));
|
||||
}
|
||||
|
||||
void
|
||||
iommu_dvmamem_unmap(void *v, void *kva, size_t size)
|
||||
{
|
||||
struct astro_softc *sc = v;
|
||||
|
||||
bus_dmamem_unmap(sc->sc_dmat, kva, size);
|
||||
}
|
||||
|
||||
paddr_t
|
||||
iommu_dvmamem_mmap(void *v, bus_dma_segment_t *segs, int nsegs, off_t off,
|
||||
int prot, int flags)
|
||||
{
|
||||
struct astro_softc *sc = v;
|
||||
|
||||
return (bus_dmamem_mmap(sc->sc_dmat, segs, nsegs, off, prot, flags));
|
||||
}
|
||||
|
||||
/*
|
||||
* Utility function used by splay tree to order page entries by pa.
|
||||
*/
|
||||
static inline int
|
||||
iomap_compare(struct iommu_page_entry *a, struct iommu_page_entry *b)
|
||||
{
|
||||
return ((a->ipe_pa > b->ipe_pa) ? 1 :
|
||||
(a->ipe_pa < b->ipe_pa) ? -1 : 0);
|
||||
}
|
||||
|
||||
SPLAY_PROTOTYPE(iommu_page_tree, iommu_page_entry, ipe_node, iomap_compare);
|
||||
|
||||
SPLAY_GENERATE(iommu_page_tree, iommu_page_entry, ipe_node, iomap_compare);
|
||||
|
||||
/*
|
||||
* Create a new iomap.
|
||||
*/
|
||||
struct iommu_map_state *
|
||||
iommu_iomap_create(int n)
|
||||
{
|
||||
struct iommu_map_state *ims;
|
||||
|
||||
/* Safety for heavily fragmented data, such as mbufs */
|
||||
n += 4;
|
||||
if (n < 16)
|
||||
n = 16;
|
||||
|
||||
ims = malloc(sizeof(*ims) + (n - 1) * sizeof(ims->ims_map.ipm_map[0]),
|
||||
M_DEVBUF, M_NOWAIT | M_ZERO);
|
||||
if (ims == NULL)
|
||||
return (NULL);
|
||||
|
||||
/* Initialize the map. */
|
||||
ims->ims_map.ipm_maxpage = n;
|
||||
SPLAY_INIT(&ims->ims_map.ipm_tree);
|
||||
|
||||
return (ims);
|
||||
}
|
||||
|
||||
/*
|
||||
* Destroy an iomap.
|
||||
*/
|
||||
void
|
||||
iommu_iomap_destroy(struct iommu_map_state *ims)
|
||||
{
|
||||
#ifdef DIAGNOSTIC
|
||||
if (ims->ims_map.ipm_pagecnt > 0)
|
||||
printf("iommu_iomap_destroy: %d page entries in use\n",
|
||||
ims->ims_map.ipm_pagecnt);
|
||||
#endif
|
||||
|
||||
free(ims, M_DEVBUF);
|
||||
}
|
||||
|
||||
/*
|
||||
* Insert a pa entry in the iomap.
|
||||
*/
|
||||
int
|
||||
iommu_iomap_insert_page(struct iommu_map_state *ims, vaddr_t va, paddr_t pa)
|
||||
{
|
||||
struct iommu_page_map *ipm = &ims->ims_map;
|
||||
struct iommu_page_entry *e;
|
||||
|
||||
if (ipm->ipm_pagecnt >= ipm->ipm_maxpage) {
|
||||
struct iommu_page_entry ipe;
|
||||
|
||||
ipe.ipe_pa = pa;
|
||||
if (SPLAY_FIND(iommu_page_tree, &ipm->ipm_tree, &ipe))
|
||||
return (0);
|
||||
|
||||
return (ENOMEM);
|
||||
}
|
||||
|
||||
e = &ipm->ipm_map[ipm->ipm_pagecnt];
|
||||
|
||||
e->ipe_pa = pa;
|
||||
e->ipe_va = va;
|
||||
e->ipe_dva = 0;
|
||||
|
||||
e = SPLAY_INSERT(iommu_page_tree, &ipm->ipm_tree, e);
|
||||
|
||||
/* Duplicates are okay, but only count them once. */
|
||||
if (e)
|
||||
return (0);
|
||||
|
||||
++ipm->ipm_pagecnt;
|
||||
|
||||
return (0);
|
||||
}
|
||||
|
||||
/*
|
||||
* Translate a physical address (pa) into a DVMA address.
|
||||
*/
|
||||
bus_addr_t
|
||||
iommu_iomap_translate(struct iommu_map_state *ims, paddr_t pa)
|
||||
{
|
||||
struct iommu_page_map *ipm = &ims->ims_map;
|
||||
struct iommu_page_entry *e;
|
||||
struct iommu_page_entry pe;
|
||||
paddr_t offset = pa & PAGE_MASK;
|
||||
|
||||
pe.ipe_pa = trunc_page(pa);
|
||||
|
||||
e = SPLAY_FIND(iommu_page_tree, &ipm->ipm_tree, &pe);
|
||||
|
||||
if (e == NULL) {
|
||||
panic("couldn't find pa %lx\n", pa);
|
||||
return 0;
|
||||
}
|
||||
|
||||
return (e->ipe_dva | offset);
|
||||
}
|
||||
|
||||
/*
|
||||
* Clear the iomap table and tree.
|
||||
*/
|
||||
void
|
||||
iommu_iomap_clear_pages(struct iommu_map_state *ims)
|
||||
{
|
||||
ims->ims_map.ipm_pagecnt = 0;
|
||||
SPLAY_INIT(&ims->ims_map.ipm_tree);
|
||||
}
|
||||
|
||||
/*
|
||||
* Add an entry to the IOMMU table.
|
||||
*/
|
||||
void
|
||||
iommu_enter(struct astro_softc *sc, bus_addr_t dva, paddr_t pa, vaddr_t va,
|
||||
int flags)
|
||||
{
|
||||
volatile uint64_t *tte_ptr = &sc->sc_pdir[dva >> PAGE_SHIFT];
|
||||
uint64_t tte;
|
||||
uint32_t ci;
|
||||
|
||||
#ifdef DEBUG
|
||||
printf("iommu_enter dva %lx, pa %lx, va %lx\n", dva, pa, va);
|
||||
#endif
|
||||
|
||||
#ifdef DIAGNOSTIC
|
||||
tte = le64toh(*tte_ptr);
|
||||
|
||||
if (tte & IOTTE_V) {
|
||||
printf("Overwriting valid tte entry (dva %lx pa %lx "
|
||||
"&tte %p tte %llx)\n", dva, pa, tte_ptr, tte);
|
||||
extent_print(sc->sc_dvmamap);
|
||||
panic("IOMMU overwrite");
|
||||
}
|
||||
#endif
|
||||
|
||||
mtsp(HPPA_SID_KERNEL, 1);
|
||||
__asm volatile("lci 0(%%sr1, %1), %0" : "=r" (ci) : "r" (va));
|
||||
|
||||
tte = (pa & IOTTE_PAMASK) | ((ci >> 12) & IOTTE_CI);
|
||||
tte |= IOTTE_V;
|
||||
|
||||
*tte_ptr = htole64(tte);
|
||||
__asm volatile("fdc 0(%%sr1, %0)\n\tsync" : : "r" (tte_ptr));
|
||||
}
|
||||
|
||||
/*
|
||||
* Remove an entry from the IOMMU table.
|
||||
*/
|
||||
void
|
||||
iommu_remove(struct astro_softc *sc, bus_addr_t dva)
|
||||
{
|
||||
volatile struct astro_regs *r = sc->sc_regs;
|
||||
uint64_t *tte_ptr = &sc->sc_pdir[dva >> PAGE_SHIFT];
|
||||
uint64_t tte;
|
||||
|
||||
#ifdef DIAGNOSTIC
|
||||
if (dva != trunc_page(dva)) {
|
||||
printf("iommu_remove: unaligned dva: %lx\n", dva);
|
||||
dva = trunc_page(dva);
|
||||
}
|
||||
#endif
|
||||
|
||||
tte = le64toh(*tte_ptr);
|
||||
|
||||
#ifdef DIAGNOSTIC
|
||||
if ((tte & IOTTE_V) == 0) {
|
||||
printf("Removing invalid tte entry (dva %lx &tte %p "
|
||||
"tte %llx)\n", dva, tte_ptr, tte);
|
||||
extent_print(sc->sc_dvmamap);
|
||||
panic("IOMMU remove overwrite");
|
||||
}
|
||||
#endif
|
||||
|
||||
*tte_ptr = htole64(tte & ~IOTTE_V);
|
||||
|
||||
/* Flush IOMMU. */
|
||||
r->tlb_pcom = htole32(dva | PAGE_SHIFT);
|
||||
}
|
||||
139
sys/arch/hp700/dev/uturn.c
Normal file
139
sys/arch/hp700/dev/uturn.c
Normal file
@ -0,0 +1,139 @@
|
||||
/* $NetBSD: uturn.c,v 1.2 2009/04/30 07:03:12 skrll Exp $ */
|
||||
|
||||
/* $OpenBSD: uturn.c,v 1.6 2007/12/29 01:26:14 kettenis Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 2004 Michael Shalayeff
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
|
||||
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
|
||||
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
|
||||
* IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT,
|
||||
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
|
||||
* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
|
||||
* THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
/* TODO IOA programming */
|
||||
|
||||
#include <sys/param.h>
|
||||
#include <sys/systm.h>
|
||||
#include <sys/device.h>
|
||||
#include <sys/reboot.h>
|
||||
|
||||
#include <machine/iomod.h>
|
||||
#include <machine/autoconf.h>
|
||||
|
||||
#include <hp700/dev/cpudevs.h>
|
||||
|
||||
struct uturn_regs {
|
||||
u_int64_t resv0[2];
|
||||
u_int64_t status; /* 0x10: */
|
||||
u_int64_t resv1[5];
|
||||
u_int64_t debug; /* 0x40: */
|
||||
};
|
||||
|
||||
struct uturn_softc {
|
||||
struct device sc_dv;
|
||||
|
||||
struct uturn_regs volatile *sc_regs;
|
||||
};
|
||||
|
||||
int uturnmatch(struct device *, struct cfdata *, void *);
|
||||
void uturnattach(struct device *, struct device *, void *);
|
||||
static void uturn_callback(struct device *self, struct confargs *ca);
|
||||
|
||||
CFATTACH_DECL(uturn, sizeof(struct uturn_softc),
|
||||
uturnmatch, uturnattach, NULL, NULL);
|
||||
|
||||
extern struct cfdriver uturn_cd;
|
||||
|
||||
int
|
||||
uturnmatch(struct device *parent, struct cfdata *cf, void *aux)
|
||||
{
|
||||
struct confargs *ca = aux;
|
||||
|
||||
/* there will be only one */
|
||||
if (ca->ca_type.iodc_type != HPPA_TYPE_IOA ||
|
||||
ca->ca_type.iodc_sv_model != HPPA_IOA_UTURN)
|
||||
return 0;
|
||||
|
||||
if (ca->ca_type.iodc_model == 0x58 &&
|
||||
ca->ca_type.iodc_revision >= 0x20)
|
||||
return 0;
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
void
|
||||
uturnattach(struct device *parent, struct device *self, void *aux)
|
||||
{
|
||||
struct confargs *ca = aux, nca;
|
||||
struct uturn_softc *sc = (struct uturn_softc *)self;
|
||||
bus_space_handle_t ioh;
|
||||
|
||||
if (bus_space_map(ca->ca_iot, ca->ca_hpa, IOMOD_HPASIZE, 0, &ioh)) {
|
||||
printf(": can't map IO space\n");
|
||||
return;
|
||||
}
|
||||
|
||||
sc->sc_regs = (struct uturn_regs *)ca->ca_hpa;
|
||||
|
||||
printf(": %s rev %d\n",
|
||||
ca->ca_type.iodc_revision < 0x10? "U2" : "UTurn",
|
||||
ca->ca_type.iodc_revision & 0xf);
|
||||
|
||||
/* keep it real */
|
||||
((struct iomod *)ioh)->io_control = 0x80;
|
||||
|
||||
/*
|
||||
* U2/UTurn is actually a combination of an Upper Bus
|
||||
* Converter (UBC) and a Lower Bus Converter (LBC). This
|
||||
* driver attaches to the UBC; the LBC isn't very interesting,
|
||||
* so we skip it. This is easy, since it always is module 63,
|
||||
* hence the MAXMODBUS - 1 below.
|
||||
*/
|
||||
nca = *ca;
|
||||
nca.ca_hpabase = 0;
|
||||
nca.ca_nmodules = MAXMODBUS - 1;
|
||||
pdc_scanbus(self, &nca, uturn_callback);
|
||||
|
||||
/* XXX On some machines, PDC doesn't tell us about all devices. */
|
||||
switch (cpu_hvers) {
|
||||
case HPPA_BOARD_HP809:
|
||||
case HPPA_BOARD_HP819:
|
||||
case HPPA_BOARD_HP829:
|
||||
case HPPA_BOARD_HP839:
|
||||
case HPPA_BOARD_HP849:
|
||||
case HPPA_BOARD_HP859:
|
||||
case HPPA_BOARD_HP869:
|
||||
|
||||
case HPPA_BOARD_HP800D:
|
||||
nca.ca_hpabase = ((struct iomod *)ioh)->io_io_low << 16;
|
||||
pdc_scanbus(self, &nca, uturn_callback);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
static void
|
||||
uturn_callback(struct device *self, struct confargs *ca)
|
||||
{
|
||||
|
||||
config_found_sm_loc(self, "gedoens", NULL, ca, mbprint, mbsubmatch);
|
||||
}
|
||||
Loading…
x
Reference in New Issue
Block a user