Use the right microsecond delay address. To achieve this, also map that

piece of hardware into kernel virtual memory (was only a guess 'til now).
XXX Unfortunately, the hardware vendor reserves the right to change this in
future DraCo revisions. We must rethink delay() and DELAY(), at least for the
DraCo, soon.
This commit is contained in:
is 1996-06-20 09:31:58 +00:00
parent fc7c84da3a
commit 0569d3582c
3 changed files with 25 additions and 10 deletions

View File

@ -1,4 +1,4 @@
/* $NetBSD: amiga_init.c,v 1.43 1996/05/25 21:54:24 is Exp $ */
/* $NetBSD: amiga_init.c,v 1.44 1996/06/20 09:32:00 is Exp $ */
/*
* Copyright (c) 1994 Michael L. Hitch
@ -610,7 +610,7 @@ start_c(id, fphystart, fphysize, cphysize, esym_addr, flags, inh_sync)
#ifdef DRACO
if ((id >> 24) == 0x7D) {
pg_proto = DRCCBASE | PG_RW | PG_CI | PG_V;
while (pg_proto < DRCIATOP) {
while (pg_proto < DRZ2BASE) {
*pg++ = pg_proto;
pg_proto += DRCCSTRIDE;
}
@ -852,7 +852,7 @@ start_c(id, fphystart, fphysize, cphysize, esym_addr, flags, inh_sync)
if ((id >> 24) == 0x7D) { /* mapping on, is_draco() is valid */
int i;
/* XXX experimental Altais register mapping only */
altaiscolpt = (volatile u_int8_t *)(DRCCADDR+NBPG*8+0x3c8);
altaiscolpt = (volatile u_int8_t *)(DRCCADDR+NBPG*9+0x3c8);
altaiscol = altaiscolpt + 1;
for (i=0; i<140000; i++) {
*altaiscolpt = 0;

View File

@ -1,5 +1,5 @@
/*
* $NetBSD: drcustom.h,v 1.1 1996/05/09 20:30:36 is Exp $
* $NetBSD: drcustom.h,v 1.2 1996/06/20 09:31:58 is Exp $
*
* Motherboard addresses for the DraCo.
*
@ -17,10 +17,10 @@
#define DRCIATOP 0x02802000
#define NDRCIAPG ((DRCIATOP - DRCIABASE) / NBPG) /* which is 1 */
#define NDRCCPG (7+1+1) /* (3 int+msc+ctrl+superio+cia)+scsi+altais */
#define NDRCCPG (8+1+1) /* (3 int+msc+ctrl+superio+cia+1stkick)+scsi+altais */
#define DRCCBASE 0x01000000
#define DRCCSTRIDE 0x00400000 /* for up to and including CIA */
#define DRCCSTRIDE 0x00400000 /* for up to and including 1st kick pg */
#define DRZ2BASE 0x03000000 /*
* not really used, appears as Z3 to
@ -44,7 +44,11 @@
#define DRIOCTLPG 4
#define DRSUPIOPG 5
#define DRCIAPG 6
#define DRSCSIPG 7
#define DRKICKPG 7 /*
* kick page, used only as a stopgap delay address
* for early DraCos
*/
#define DRSCSIPG 8
#ifdef _KERNEL
#ifndef _LOCORE

View File

@ -1,4 +1,4 @@
/* $NetBSD: clock.c,v 1.16 1996/06/18 11:41:48 is Exp $ */
/* $NetBSD: clock.c,v 1.17 1996/06/20 09:32:03 is Exp $ */
/*
* Copyright (c) 1988 University of Utah.
@ -364,9 +364,20 @@ DELAY(mic)
short hpos;
#ifdef DRACO
volatile u_int8_t *kickaddr;
u_int8_t drain;
if (is_draco()) {
while (--mic > 0)
n = *draco_intena;
/*
* XXX This might not work in future DraCos.
* We need to rethink the DELAY()/delay() stuff.
*/
kickaddr = (volatile u_int8_t *)(DRCCADDR + NBPG * DRKICKPG);
while (--mic >= 0) {
drain = *kickaddr;
drain = *kickaddr;
}
return;
}
#endif