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Fix a bug in the 68020+68851 / 68030 branch of the buserr handler:

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For these CPU's, you have to use the ptest operation to search the mmu
tables in order to decide whether it is a real bus error or just a
page fault or write protection violation.

Our old code assumed user space always when calling ptest, and
erroneously assumed the BUSERR bit in the ptest output (mmusr
register) is the only indication for bus errors to check.

In fact, we have to follow a multistage decision tree to decide. 68060
CPUs are much easier to handle correctly.
This commit is contained in:
is 1996-06-13 19:12:25 +00:00
parent 4d9a6e0930
commit 052a8aa0ba
1 changed files with 30 additions and 10 deletions
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40
sys/arch/amiga/amiga/locore.s
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@ -1,4 +1,4 @@
/* $NetBSD: locore.s,v 1.58 1996/05/25 17:08:48 is Exp $ */
/* $NetBSD: locore.s,v 1.59 1996/06/13 19:12:25 is Exp $ */
/*
* Copyright (c) 1988 University of Utah.
@ -205,18 +205,38 @@ Lbe10:
cmpw #12,d0 | address error vector?
jeq Lisaerr | yes, go to it
movl d1,a0 | fault address
ptestr #1,a0@,#7 | do a table search
movl sp@,d0 | function code from ssw
btst #8,d0 | data fault?
jne Lbe10a
movql #1,d0 | user program access FC
| (we dont seperate data/program)
btst #5,a1@ | supervisor mode?
jeq Lbe10a | if no, done
movql #5,d0 | else supervisor program access
Lbe10a:
ptestr d0,a0@,#7 | do a table search
pmove psr,sp@ | save result
btst #7,sp@ | bus error bit set?
jeq Lismerr | no, must be MMU fault
clrw sp@ | yes, re-clear pad word
jra Lisberr | and process as normal bus error
movb sp@,d1
btst #2,d1 | invalid (incl. limit viol. and berr)?
jeq Lmightnotbemerr | no -> wp check
btst #7,d1 | is it MMU table berr?
jeq Lismerr | no, must be fast
jra Lisberr1 | real bus err needs not be fast.
Lmightnotbemerr:
btst #3,d1 | write protect bit set?
jeq Lisberr1 | no: must be bus error
movl sp@,d0 | ssw into low word of d0
andw #0xc0,d0 | Write protect is set on page:
cmpw #0x40,d0 | was it read cycle?
jeq Lisberr1 | yes, was not WPE, must be bus err
Lismerr:
movl #T_MMUFLT,sp@- | show that we are an MMU fault
jra Ltrapnstkadj | and deal with it
Lisaerr:
movl #T_ADDRERR,sp@- | mark address error
jra Ltrapnstkadj | and deal with it
Lisberr1:
clrw sp@ | re-clear pad word
Lisberr:
movl #T_BUSERR,sp@- | mark bus error
Ltrapnstkadj:
@ -2283,12 +2303,12 @@ _intrnames:
.asciz "clock" | clock interrupts
.asciz "spur6" | spurious level 6
#ifdef DRACO
.asciz "kbd/soft" | 1
.asciz "cia/z-l2" | 2: cia, PORTS
.asciz "lcl-l3" | 3: local bus, e.g. Altais vbl
.asciz "kbd/soft" | 1: native keyboard, soft ints
.asciz "cia/zbus" | 2: cia, PORTS
.asciz "lclbus" | 3: local bus, e.g. Altais vbl
.asciz "drscsi" | 4: mainboard scsi
.asciz "superio" | 5: superio chip
.asciz "z+lcl-l6" | 6: lcl/zorro lev6
.asciz "lcl/zbus" | 6: lcl/zorro lev6
.asciz "buserr" | 7: nmi: bus timeout
#endif
_eintrnames: