New code to enable PCI devices.
This commit is contained in:
thomas
parent
db15e9d609
commit
051cc552ae
@ -1,4 +1,4 @@
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/* $NetBSD: pci_machdep.c,v 1.13 1998/08/15 03:02:35 mycroft Exp $ */
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/* $NetBSD: pci_machdep.c,v 1.14 1998/12/20 14:24:52 thomas Exp $ */
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/*
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* Copyright (c) 1996 Leo Weppelman. All rights reserved.
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@ -37,6 +37,7 @@
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#include <sys/systm.h>
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#include <sys/errno.h>
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#include <sys/device.h>
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#include <sys/malloc.h>
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#include <vm/vm.h>
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#include <vm/vm_kern.h>
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@ -52,16 +53,40 @@
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#include <atari/atari/device.h>
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/*
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* I/O and memory we assume 'reserved' when an vga card is detected on
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* the PCI-bus.
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* Sizes of pci memory and I/O area.
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*/
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#define MAX_VGA_MEM 0x1000000 /* 16 MB mem */
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#define MAX_VGA_IO 0x0010000 /* 64 KB io */
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#define PCI_MEM_END 0x10000000 /* 256 MByte */
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#define PCI_IO_END 0x10000000 /* 256 MByte */
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/*
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* We preserve some space at the begin of the pci area for 32BIT_1M
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* devices and standard vga.
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*/
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#define PCI_MEM_START 0x00100000 /* 1 MByte */
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#define PCI_IO_START 0x00010000 /* 64 kByte */
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/*
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* Struct to hold the memory and I/O datas of the pci devices
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*/
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struct pci_memreg {
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LIST_ENTRY(pci_memreg) link;
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int dev;
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pcitag_t tag;
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pcireg_t reg, address, mask;
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u_int32_t size;
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u_int32_t csr;
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};
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typedef LIST_HEAD(pci_memreg_head, pci_memreg) PCI_MEMREG;
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int pcibusprint __P((void *auxp, const char *));
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int pcibusmatch __P((struct device *, struct cfdata *, void *));
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void pcibusattach __P((struct device *, struct device *, void *));
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static void enable_pci_devices __P((void));
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static void insert_into_list __P((PCI_MEMREG *head, struct pci_memreg *elem));
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static int overlap_pci_areas __P((struct pci_memreg *p,
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struct pci_memreg *self, u_int addr, u_int size, u_int what));
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static int pci_config_offset __P((pcitag_t));
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struct cfattach pcibus_ca = {
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@ -90,6 +115,8 @@ void *auxp;
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bus_space_tag_t leb_alloc_bus_space_tag __P((void));
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enable_pci_devices();
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pba.pba_busname = "pci";
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pba.pba_pc = NULL;
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pba.pba_bus = 0;
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@ -130,118 +157,358 @@ pci_attach_hook(parent, self, pba)
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/*
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* Initialize the PCI-bus. The Atari-BIOS does not do this, so....
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* We only disable all devices here. Memory and I/O enabling is done
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* later at pcibusattach.
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*/
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void
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init_pci_bus()
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{
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pci_chipset_tag_t pc = NULL; /* XXX */
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pcitag_t tag;
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pcireg_t csr, address, mask;
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int device, id, class, maxndevs;
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int reg;
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u_int32_t membase, iobase;
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pcireg_t csr;
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int device, id, maxndevs;
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tag = 0;
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id = class = 0;
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tag = 0;
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id = 0;
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membase = iobase = 0;
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maxndevs = pci_bus_maxdevs(pc, 0);
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/*
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* Scan the bus for prehistory (usually VGA) devices.
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*/
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for (device = 0; device < maxndevs; device++) {
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tag = pci_make_tag(pc, 0, device, 0);
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id = pci_conf_read(pc, tag, PCI_ID_REG);
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if (id == 0 || id == 0xffffffff)
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continue;
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class = pci_conf_read(pc, tag, PCI_CLASS_REG);
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switch (PCI_CLASS(class)) {
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case PCI_CLASS_PREHISTORIC:
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case PCI_CLASS_DISPLAY:
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membase = MAX_VGA_MEM;
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iobase = MAX_VGA_IO;
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}
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}
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for (device = 0; device < maxndevs; device++) {
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tag = pci_make_tag(pc, 0, device, 0);
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id = pci_conf_read(pc, tag, PCI_ID_REG);
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if (id == 0 || id == 0xffffffff)
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continue;
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class = pci_conf_read(pc, tag, PCI_CLASS_REG);
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switch (PCI_CLASS(class)) {
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case PCI_CLASS_PREHISTORIC:
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case PCI_CLASS_DISPLAY:
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/*
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* XXX: We rely on the BIOS to do the
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* right thing here. Eventually, we should
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* take the initiative...
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*/
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continue;
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}
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csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
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csr &= ~(PCI_COMMAND_MEM_ENABLE|PCI_COMMAND_IO_ENABLE);
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csr &= ~PCI_COMMAND_MASTER_ENABLE;
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pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, csr);
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}
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}
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for (reg = PCI_MAPREG_START; reg < PCI_MAPREG_END; reg += 4) {
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int size, type;
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/*
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* insert a new element in an existing list that the ID's (size in struct
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* pci_memreg) are sorted.
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*/
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static void
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insert_into_list(head, elem)
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PCI_MEMREG *head;
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struct pci_memreg *elem;
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{
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struct pci_memreg *p, *q;
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address = pci_conf_read(pc, tag, reg);
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pci_conf_write(pc, tag, reg, 0xffffffff);
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mask = pci_conf_read(pc, tag, reg);
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pci_conf_write(pc, tag, reg, address);
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if (mask == 0)
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continue; /* Register unused */
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p = LIST_FIRST(head);
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q = NULL;
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if (mask & PCI_MAPREG_TYPE_IO) {
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csr |= PCI_COMMAND_IO_ENABLE;
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address = PCI_MAPREG_IO_ADDR(mask);
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mask = (~address << 1) | 1;
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size = (mask & address) & 0xffffffff;
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address = iobase | PCI_MAPREG_TYPE_IO;
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iobase += roundup(size, 4096); /* XXX */
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}
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else {
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type = PCI_MAPREG_MEM_TYPE(address);
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switch (type) {
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case PCI_MAPREG_MEM_TYPE_32BIT:
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break;
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case PCI_MAPREG_MEM_TYPE_64BIT:
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reg++;
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case PCI_MAPREG_MEM_TYPE_32BIT_1M:
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/*
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* XXX: We can do better here!
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*/
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if (membase >= 0x100000)
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continue;
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}
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csr |= PCI_COMMAND_MEM_ENABLE;
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size = PCI_MAPREG_MEM_SIZE(mask);
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address = membase | PCI_MAPREG_TYPE_MEM;
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membase += roundup(size, 4096); /* XXX */
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}
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pci_conf_write(pc, tag, reg, address);
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for (; p != NULL && p->size < elem->size; q = p, p = LIST_NEXT(p, link));
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if (q == NULL) {
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LIST_INSERT_HEAD(head, elem, link);
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} else {
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LIST_INSERT_AFTER(q, elem, link);
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}
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}
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/*
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* Test if a new selected area overlaps with an already (probably preselected)
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* pci area.
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*/
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static int
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overlap_pci_areas(p, self, addr, size, what)
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struct pci_memreg *p, *self;
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u_int addr, size, what;
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{
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struct pci_memreg *q;
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if (p == NULL)
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return 0;
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q = p;
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while (q != NULL) {
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if ((q != self) && (q->csr & what)) {
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if ((addr >= q->address) && (addr < (q->address + q->size))) {
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#ifdef DEBUG_PCI_MACHDEP
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printf("\noverlap area dev %d reg 0x%02x with dev %d reg 0x%02x",
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self->dev, self->reg, q->dev, q->reg);
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#endif
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return 1;
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}
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if ((q->address >= addr) && (q->address < (addr + size))) {
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#ifdef DEBUG_PCI_MACHDEP
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printf("\noverlap area dev %d reg 0x%02x with dev %d reg 0x%02x",
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self->dev, self->reg, q->dev, q->reg);
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#endif
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return 1;
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}
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}
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q = LIST_NEXT(q, link);
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}
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return 0;
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}
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/*
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* Enable memory and I/O on pci devices. Care about already enabled devices
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* (probabaly by the console driver).
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*
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* The idea behind the following code is:
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* We build a by sizes sorted list of the requirements of the different
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* pci devices. After that we choose the start addresses of that areas
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* in such a way that they are placed as closed as possible together.
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*/
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static void
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enable_pci_devices()
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{
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PCI_MEMREG memlist;
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PCI_MEMREG iolist;
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struct pci_memreg *p, *q;
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int dev, reg, id, class;
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pcitag_t tag;
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pcireg_t csr, address, mask;
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pci_chipset_tag_t pc;
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int sizecnt, membase_1m;
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pc = 0;
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csr = 0;
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tag = 0;
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LIST_INIT(&memlist);
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LIST_INIT(&iolist);
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/*
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* first step: go through all devices and gather memory and I/O
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* sizes
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*/
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for (dev = 0; dev < pci_bus_maxdevs(pc,0); dev++) {
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tag = pci_make_tag(pc, 0, dev, 0);
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id = pci_conf_read(pc, tag, PCI_ID_REG);
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if (id == 0 || id == 0xffffffff)
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continue;
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csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
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/*
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* special case: if a display card is found and memory is enabled
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* preserve 128k at 0xa0000 as vga memory.
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*/
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class = pci_conf_read(pc, tag, PCI_CLASS_REG);
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switch (PCI_CLASS(class)) {
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case PCI_CLASS_PREHISTORIC:
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case PCI_CLASS_DISPLAY:
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if (csr & (PCI_COMMAND_MEM_ENABLE | PCI_COMMAND_MASTER_ENABLE)) {
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p = (struct pci_memreg *)malloc(sizeof(struct pci_memreg),
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M_TEMP, M_WAITOK);
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memset(p, '\0', sizeof(struct pci_memreg));
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p->dev = dev;
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p->csr = csr;
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p->tag = tag;
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p->reg = 0; /* there is no register about this */
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p->size = 0x20000; /* 128kByte */
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p->mask = 0xfffe0000;
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p->address = 0xa0000;
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insert_into_list(&memlist, p);
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}
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csr |= PCI_COMMAND_MASTER_ENABLE;
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pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, csr);
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}
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for (reg = PCI_MAPREG_START; reg < PCI_MAPREG_END; reg += 4) {
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address = pci_conf_read(pc, tag, reg);
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pci_conf_write(pc, tag, reg, 0xffffffff);
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mask = pci_conf_read(pc, tag, reg);
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pci_conf_write(pc, tag, reg, address);
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if (mask == 0)
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continue; /* Register unused */
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p = (struct pci_memreg *)malloc(sizeof(struct pci_memreg),
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M_TEMP, M_WAITOK);
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memset(p, '\0', sizeof(struct pci_memreg));
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p->dev = dev;
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p->csr = csr;
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p->tag = tag;
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p->reg = reg;
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p->mask = mask;
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p->address = 0;
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if (mask & PCI_MAPREG_TYPE_IO) {
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p->size = PCI_MAPREG_IO_SIZE(mask);
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/*
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* Both interrupt pin & line are set to the device (== slot)
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* number. This makes sense on the atari because the
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* individual slots are hard-wired to a specific MFP-pin.
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* if I/O is already enabled (probably by the console driver)
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* save the address in order to take care about it later.
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*/
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csr = (device << PCI_INTERRUPT_PIN_SHIFT);
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csr |= (device << PCI_INTERRUPT_LINE_SHIFT);
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pci_conf_write(pc, tag, PCI_INTERRUPT_REG, csr);
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if (csr & PCI_COMMAND_IO_ENABLE)
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p->address = address;
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insert_into_list(&iolist, p);
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} else {
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p->size = PCI_MAPREG_MEM_SIZE(mask);
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/*
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* if memory is already enabled (probably by the console driver)
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* save the address in order to take care about it later.
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*/
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if (csr & PCI_COMMAND_MEM_ENABLE)
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p->address = address;
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insert_into_list(&memlist, p);
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if (PCI_MAPREG_MEM_TYPE(mask) == PCI_MAPREG_MEM_TYPE_64BIT)
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reg++;
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}
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}
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/*
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* Both interrupt pin & line are set to the device (== slot)
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* number. This makes sense on the atari because the
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* individual slots are hard-wired to a specific MFP-pin.
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*/
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csr = (dev << PCI_INTERRUPT_PIN_SHIFT);
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csr |= (dev << PCI_INTERRUPT_LINE_SHIFT);
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pci_conf_write(pc, tag, PCI_INTERRUPT_REG, csr);
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}
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/*
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* second step: calculate the memory and I/O adresses beginning from
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* PCI_MEM_START and PCI_IO_START. Care about already mapped areas.
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*
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* beginn with memory list
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*/
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address = PCI_MEM_START;
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sizecnt = 0;
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membase_1m = 0;
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p = LIST_FIRST(&memlist);
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while (p != NULL) {
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if (!(p->csr & PCI_COMMAND_MEM_ENABLE)) {
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if (PCI_MAPREG_MEM_TYPE(p->mask) == PCI_MAPREG_MEM_TYPE_32BIT_1M) {
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if (p->size > membase_1m)
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membase_1m = p->size;
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do {
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p->address = membase_1m;
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membase_1m += p->size;
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} while (overlap_pci_areas(LIST_FIRST(&memlist), p, p->address,
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p->size, PCI_COMMAND_MEM_ENABLE));
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if (membase_1m > 0x00100000) {
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/*
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* Should we panic here?
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*/
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printf("\npcibus0: dev %d reg %d: memory not configured",
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p->dev, p->reg);
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p->reg = 0;
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}
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} else {
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if (sizecnt && (p->size > sizecnt))
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sizecnt = ((p->size + sizecnt) & p->mask) &
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PCI_MAPREG_MEM_ADDR_MASK;
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if (sizecnt > address) {
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address = sizecnt;
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sizecnt = 0;
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}
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do {
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p->address = address + sizecnt;
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sizecnt += p->size;
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} while (overlap_pci_areas(LIST_FIRST(&memlist), p, p->address,
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p->size, PCI_COMMAND_MEM_ENABLE));
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if ((address + sizecnt) > PCI_MEM_END) {
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/*
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* Should we panic here?
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*/
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printf("\npcibus0: dev %d reg %d: memory not configured",
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p->dev, p->reg);
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p->reg = 0;
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}
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}
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if (p->reg > 0) {
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pci_conf_write(pc, p->tag, p->reg, p->address);
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csr = pci_conf_read(pc, p->tag, PCI_COMMAND_STATUS_REG);
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csr |= PCI_COMMAND_MEM_ENABLE | PCI_COMMAND_MASTER_ENABLE;
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pci_conf_write(pc, p->tag, PCI_COMMAND_STATUS_REG, csr);
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}
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}
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p = LIST_NEXT(p, link);
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}
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/*
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* now the I/O list
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*/
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address = PCI_IO_START;
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sizecnt = 0;
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p = LIST_FIRST(&iolist);
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while (p != NULL) {
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if (!(p->csr & PCI_COMMAND_IO_ENABLE)) {
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if (sizecnt && (p->size > sizecnt))
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sizecnt = ((p->size + sizecnt) & p->mask) &
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PCI_MAPREG_IO_ADDR_MASK;
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if (sizecnt > address) {
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address = sizecnt;
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sizecnt = 0;
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}
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do {
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p->address = address + sizecnt;
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sizecnt += p->size;
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} while (overlap_pci_areas(LIST_FIRST(&iolist), p, p->address,
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p->size, PCI_COMMAND_IO_ENABLE));
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if ((address + sizecnt) > PCI_IO_END) {
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/*
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* Should we panic here?
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*/
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printf("\npcibus0: dev %d reg %d: io not configured",
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p->dev, p->reg);
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} else {
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pci_conf_write(pc, p->tag, p->reg, p->address);
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csr = pci_conf_read(pc, p->tag, PCI_COMMAND_STATUS_REG);
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csr |= PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MASTER_ENABLE;
|
||||
pci_conf_write(pc, p->tag, PCI_COMMAND_STATUS_REG, csr);
|
||||
}
|
||||
}
|
||||
p = LIST_NEXT(p, link);
|
||||
}
|
||||
|
||||
#ifdef DEBUG_PCI_MACHDEP
|
||||
printf("\nI/O List:\n");
|
||||
p = LIST_FIRST(&iolist);
|
||||
|
||||
while (p != NULL) {
|
||||
printf("\ndev: %d, reg: 0x%02x, size: 0x%08x, addr: 0x%08x", p->dev,
|
||||
p->reg, p->size, p->address);
|
||||
p = LIST_NEXT(p, link);
|
||||
}
|
||||
printf("\nMemlist:");
|
||||
p = LIST_FIRST(&memlist);
|
||||
|
||||
while (p != NULL) {
|
||||
printf("\ndev: %d, reg: 0x%02x, size: 0x%08x, addr: 0x%08x", p->dev,
|
||||
p->reg, p->size, p->address);
|
||||
p = LIST_NEXT(p, link);
|
||||
}
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Free the lists
|
||||
*/
|
||||
p = LIST_FIRST(&iolist);
|
||||
while (p != NULL) {
|
||||
q = p;
|
||||
LIST_REMOVE(q, link);
|
||||
free(p, M_WAITOK);
|
||||
p = LIST_FIRST(&iolist);
|
||||
}
|
||||
p = LIST_FIRST(&memlist);
|
||||
while (p != NULL) {
|
||||
q = p;
|
||||
LIST_REMOVE(q, link);
|
||||
free(p, M_WAITOK);
|
||||
p = LIST_FIRST(&memlist);
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user