Update pcf8584 driver from OpenBSD
This commit is contained in:
martin
parent
66539057af
commit
046723f091
@ -1,239 +1,308 @@
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/* $NetBSD: pcf8584.c,v 1.5 2008/04/28 20:23:51 martin Exp $ */
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/*-
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* Copyright (c) 2007 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Tobias Nygren.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/* $NetBSD: pcf8584.c,v 1.6 2010/02/28 11:47:28 martin Exp $ */
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/* $OpenBSD: pcf8584.c,v 1.9 2007/10/20 18:46:21 kettenis Exp $ */
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/*
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* Philips PCF8584 I2C Bus Controller
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* Copyright (c) 2006 David Gwynne <dlg@openbsd.org>
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*
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* This driver does not yet support multi-master arbitration, concurrent access
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* or interrupts, but it should be usable for single-master applications.
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* It is currently used by the envctrl(4) driver on sparc64.
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* Permission to use, copy, modify, and distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: pcf8584.c,v 1.5 2008/04/28 20:23:51 martin Exp $");
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#include <sys/param.h>
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#include <sys/device.h>
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#include <sys/kernel.h>
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#include <sys/systm.h>
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#include <sys/condvar.h>
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#include <sys/mutex.h>
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#include <sys/bus.h>
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#include <machine/param.h>
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#include <sys/device.h>
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#include <sys/malloc.h>
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#include <sys/kernel.h>
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#include <sys/rwlock.h>
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#include <sys/proc.h>
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#include <machine/bus.h>
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#include <dev/i2c/i2cvar.h>
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#include <dev/ic/pcf8584reg.h>
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#include <dev/ic/pcf8584var.h>
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static void pcf8584_bus_reset(struct pcf8584_handle *, int);
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static int pcf8584_exec(void *, i2c_op_t, i2c_addr_t, const void *, size_t,
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void *, size_t, int);
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static int pcf8584_acquire_bus(void *, int);
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static void pcf8584_release_bus(void *, int);
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static void pcf8584_wait(struct pcf8584_handle *, int);
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#define PCF_S0 0x00
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#define PCF_S1 0x01
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#define PCF_S2 0x02
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#define PCF_S3 0x03
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/* Must delay for 500 ns between bus accesses according to manual. */
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#define DATA_W(x) (DELAY(1), bus_space_write_1(ha->ha_iot, ha->ha_ioh, 0, x))
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#define DATA_R() (DELAY(1), bus_space_read_1(ha->ha_iot, ha->ha_ioh, 0))
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#define CSR_W(x) (DELAY(1), bus_space_write_1(ha->ha_iot, ha->ha_ioh, 1, x))
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#define STATUS_R() (DELAY(1), bus_space_read_1(ha->ha_iot, ha->ha_ioh, 1))
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#define BUSY() ((STATUS_R() & PCF8584_STATUS_BBN) == 0)
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#define PENDING() ((STATUS_R() & PCF8584_STATUS_PIN) == 0)
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#define NAK() ((STATUS_R() & PCF8584_STATUS_LRB) != 0)
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#define PCF_CTRL_ACK (1<<0)
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#define PCF_CTRL_STO (1<<1)
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#define PCF_CTRL_STA (1<<2)
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#define PCF_CTRL_ENI (1<<3)
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#define PCF_CTRL_ES2 (1<<4)
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#define PCF_CTRL_ES1 (1<<5)
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#define PCF_CTRL_ESO (1<<6)
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#define PCF_CTRL_PIN (1<<7)
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/*
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* Wait for an interrupt.
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*/
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static void
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pcf8584_wait(struct pcf8584_handle *ha, int flags)
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#define PCF_CTRL_START (PCF_CTRL_PIN | PCF_CTRL_ESO | \
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PCF_CTRL_STA | PCF_CTRL_ACK)
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#define PCF_CTRL_STOP (PCF_CTRL_PIN | PCF_CTRL_ESO | \
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PCF_CTRL_STO | PCF_CTRL_ACK)
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#define PCF_CTRL_REPSTART (PCF_CTRL_ESO | PCF_CTRL_STA | PCF_CTRL_ACK)
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#define PCF_CTRL_IDLE (PCF_CTRL_PIN | PCF_CTRL_ESO | PCF_CTRL_ACK)
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#define PCF_STAT_nBB (1<<0)
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#define PCF_STAT_LAB (1<<1)
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#define PCF_STAT_AAS (1<<2)
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#define PCF_STAT_AD0 (1<<3)
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#define PCF_STAT_LRB (1<<3)
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#define PCF_STAT_BER (1<<4)
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#define PCF_STAT_STS (1<<5)
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#define PCF_STAT_PIN (1<<7)
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void pcfiic_init(struct pcfiic_softc *);
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int pcfiic_i2c_acquire_bus(void *, int);
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void pcfiic_i2c_release_bus(void *, int);
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int pcfiic_i2c_exec(void *, i2c_op_t, i2c_addr_t, const void *,
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size_t, void *, size_t, int);
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int pcfiic_xmit(struct pcfiic_softc *, u_int8_t, const u_int8_t *,
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size_t);
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int pcfiic_recv(struct pcfiic_softc *, u_int8_t, u_int8_t *,
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size_t);
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u_int8_t pcfiic_read(struct pcfiic_softc *, bus_size_t);
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void pcfiic_write(struct pcfiic_softc *, bus_size_t, u_int8_t);
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void pcfiic_choose_bus(struct pcfiic_softc *, u_int8_t);
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int pcfiic_wait_nBB(struct pcfiic_softc *);
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int pcfiic_wait_pin(struct pcfiic_softc *, volatile u_int8_t *);
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void
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pcfiic_init(struct pcfiic_softc *sc)
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{
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int timeo;
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/* init S1 */
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pcfiic_write(sc, PCF_S1, PCF_CTRL_PIN);
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/* own address */
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pcfiic_write(sc, PCF_S0, sc->sc_addr);
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if (flags & I2C_F_POLL) {
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timeo = 20;
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while (timeo && !PENDING()) {
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DELAY(1000);
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timeo--;
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}
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/* select clock reg */
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pcfiic_write(sc, PCF_S1, PCF_CTRL_PIN|PCF_CTRL_ES1);
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pcfiic_write(sc, PCF_S0, sc->sc_clock);
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pcfiic_write(sc, PCF_S1, PCF_CTRL_IDLE);
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delay(200000); /* Multi-Master mode, wait for longest i2c message */
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}
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void
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pcfiic_attach(struct pcfiic_softc *sc, i2c_addr_t addr, u_int8_t clock,
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int swapregs)
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{
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struct i2cbus_attach_args iba;
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if (swapregs) {
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sc->sc_regmap[PCF_S1] = PCF_S0;
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sc->sc_regmap[PCF_S0] = PCF_S1;
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} else {
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mutex_enter(&ha->ha_intrmtx);
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cv_timedwait(&ha->ha_intrcond, &ha->ha_intrmtx, mstohz(20));
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mutex_exit(&ha->ha_intrmtx);
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sc->sc_regmap[PCF_S0] = PCF_S0;
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sc->sc_regmap[PCF_S1] = PCF_S1;
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}
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}
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sc->sc_clock = clock;
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sc->sc_addr = addr;
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#ifdef notyet
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static void
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pcf8584_intr(struct pcf8584_handle *ha) {
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pcfiic_init(sc);
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cv_wakeup(&ha->ha_intrcond);
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printf("\n");
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if (sc->sc_master)
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pcfiic_choose_bus(sc, 0);
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rw_init(&sc->sc_lock);
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sc->sc_i2c.ic_cookie = sc;
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sc->sc_i2c.ic_acquire_bus = pcfiic_i2c_acquire_bus;
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sc->sc_i2c.ic_release_bus = pcfiic_i2c_release_bus;
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sc->sc_i2c.ic_exec = pcfiic_i2c_exec;
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bzero(&iba, sizeof(iba));
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iba.iba_tag = &sc->sc_i2c;
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config_found(sc->sc_dev, &iba, iicbus_print);
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}
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#endif
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int
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pcf8584_init(struct pcf8584_handle *ha)
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pcfiic_intr(void *arg)
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{
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return (0);
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}
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ha->ha_i2c.ic_cookie = ha;
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ha->ha_i2c.ic_acquire_bus = pcf8584_acquire_bus;
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ha->ha_i2c.ic_release_bus = pcf8584_release_bus;
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ha->ha_i2c.ic_exec = pcf8584_exec;
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int
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pcfiic_i2c_acquire_bus(void *arg, int flags)
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{
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struct pcfiic_softc *sc = arg;
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mutex_init(&ha->ha_intrmtx, MUTEX_DEFAULT, IPL_NONE);
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cv_init(&ha->ha_intrcond, "pcf8584");
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pcf8584_bus_reset(ha, I2C_F_POLL);
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if (cold || sc->sc_poll || (flags & I2C_F_POLL))
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return (0);
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rw_enter(&sc->sc_lock, RW_WRITER);
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return 0;
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}
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/*
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* Reset i2c bus.
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*/
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static void
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pcf8584_bus_reset(struct pcf8584_handle *ha, int flags)
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void
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pcfiic_i2c_release_bus(void *arg, int flags)
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{
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struct pcfiic_softc *sc = arg;
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/* initialize PCF8584 */
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CSR_W(PCF8584_CTRL_PIN);
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DATA_W(0x55);
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CSR_W(PCF8584_CTRL_PIN | PCF8584_REG_S2);
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DATA_W(PCF8584_CLK_12 | PCF8584_SCL_90);
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CSR_W(PCF8584_CTRL_PIN | PCF8584_CTRL_ESO | PCF8584_CTRL_ACK);
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if (cold || sc->sc_poll || (flags & I2C_F_POLL))
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return;
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/* XXX needs multi-master synchronization delay here */
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/*
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* Blindly attempt a write at a nonexistent i2c address (0x7F).
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* This allows hung i2c devices to pick up the stop condition.
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*/
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DATA_W(0x7F << 1);
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CSR_W(PCF8584_CMD_START);
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pcf8584_wait(ha, flags);
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CSR_W(PCF8584_CMD_STOP);
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pcf8584_wait(ha, flags);
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rw_exit(&sc->sc_lock);
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}
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static int
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pcf8584_exec(void *cookie, i2c_op_t op, i2c_addr_t addr,
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const void *cmdbuf, size_t cmdlen, void *buf,
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size_t len, int flags)
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int
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pcfiic_i2c_exec(void *arg, i2c_op_t op, i2c_addr_t addr,
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const void *cmdbuf, size_t cmdlen, void *buf, size_t len, int flags)
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{
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int i;
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struct pcf8584_handle *ha = cookie;
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uint8_t *p = buf;
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struct pcfiic_softc *sc = arg;
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int ret = 0;
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KASSERT(cmdlen == 0);
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KASSERT(op == I2C_OP_READ_WITH_STOP || op == I2C_OP_WRITE_WITH_STOP);
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#if 0
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printf("%s: exec op: %d addr: 0x%x cmdlen: %d len: %d flags 0x%x\n",
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sc->sc_dev.dv_xname, op, addr, cmdlen, len, flags);
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#endif
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if (BUSY()) {
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/* We're the only master on the bus, something is wrong. */
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printf("*%s: i2c bus busy!\n", device_xname(ha->ha_parent));
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pcf8584_bus_reset(ha, flags);
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if (cold || sc->sc_poll)
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flags |= I2C_F_POLL;
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if (sc->sc_master)
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pcfiic_choose_bus(sc, addr >> 7);
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if (cmdlen > 0)
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if (pcfiic_xmit(sc, addr & 0x7f, cmdbuf, cmdlen) != 0)
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return (1);
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if (len > 0) {
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if (I2C_OP_WRITE_P(op))
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ret = pcfiic_xmit(sc, addr & 0x7f, buf, len);
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else
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ret = pcfiic_recv(sc, addr & 0x7f, buf, len);
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}
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if (op == I2C_OP_READ_WITH_STOP)
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DATA_W((addr << 1) | 1);
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else
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DATA_W(addr << 1);
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CSR_W(PCF8584_CMD_START);
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pcf8584_wait(ha, flags);
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if (!PENDING()) {
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printf("%s: no intr after i2c sla\n", device_xname(ha->ha_parent));
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}
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if (NAK())
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goto fail;
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if (op == I2C_OP_READ_WITH_STOP) {
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(void) DATA_R();/* dummy read */
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for (i = 0; i < len; i++) {
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/* wait for a byte to arrive */
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pcf8584_wait(ha, flags);
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if (!PENDING()) {
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printf("%s: lost intr during i2c read\n",
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device_xname(ha->ha_parent));
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goto fail;
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}
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if (NAK())
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goto fail;
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if (i == len - 1) {
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/*
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* we're about to read the final byte, so we
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* set the controller to NAK the following
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* byte, if any.
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*/
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CSR_W(PCF8584_CMD_NAK);
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}
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*p++ = DATA_R();
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}
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pcf8584_wait(ha, flags);
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if (!PENDING()) {
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printf("%s: no intr on final i2c nak\n",
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device_xname(ha->ha_parent));
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goto fail;
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}
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CSR_W(PCF8584_CMD_STOP);
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(void) DATA_R();/* dummy read */
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} else {
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for (i = 0; i < len; i++) {
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DATA_W(*p++);
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pcf8584_wait(ha, flags);
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if (!PENDING()) {
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printf("%s: no intr during i2c write\n",
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device_xname(ha->ha_parent));
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goto fail;
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}
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if (NAK())
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goto fail;
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}
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CSR_W(PCF8584_CMD_STOP);
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}
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pcf8584_wait(ha, flags);
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return 0;
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fail:
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CSR_W(PCF8584_CMD_STOP);
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pcf8584_wait(ha, flags);
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return 1;
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return (ret);
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}
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static int
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pcf8584_acquire_bus(void *cookie, int flags)
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int
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pcfiic_xmit(struct pcfiic_softc *sc, u_int8_t addr, const u_int8_t *buf,
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size_t len)
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{
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int i, err = 0;
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volatile u_int8_t r;
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/* XXX concurrent access not yet implemented */
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return 0;
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if (pcfiic_wait_nBB(sc) != 0)
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return (1);
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pcfiic_write(sc, PCF_S0, addr << 1);
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pcfiic_write(sc, PCF_S1, PCF_CTRL_START);
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for (i = 0; i <= len; i++) {
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if (pcfiic_wait_pin(sc, &r) != 0) {
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pcfiic_write(sc, PCF_S1, PCF_CTRL_STOP);
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return (1);
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}
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if (r & PCF_STAT_LRB) {
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err = 1;
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break;
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}
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if (i < len)
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pcfiic_write(sc, PCF_S0, buf[i]);
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}
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pcfiic_write(sc, PCF_S1, PCF_CTRL_STOP);
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return (err);
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}
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static void
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pcf8584_release_bus(void *cookie, int flags)
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int
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pcfiic_recv(struct pcfiic_softc *sc, u_int8_t addr, u_int8_t *buf, size_t len)
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{
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int i = 0, err = 0;
|
||||
volatile u_int8_t r;
|
||||
|
||||
if (pcfiic_wait_nBB(sc) != 0)
|
||||
return (1);
|
||||
|
||||
pcfiic_write(sc, PCF_S0, (addr << 1) | 0x01);
|
||||
pcfiic_write(sc, PCF_S1, PCF_CTRL_START);
|
||||
|
||||
for (i = 0; i <= len; i++) {
|
||||
if (pcfiic_wait_pin(sc, &r) != 0) {
|
||||
pcfiic_write(sc, PCF_S1, PCF_CTRL_STOP);
|
||||
return (1);
|
||||
}
|
||||
|
||||
if ((i != len) && (r & PCF_STAT_LRB)) {
|
||||
pcfiic_write(sc, PCF_S1, PCF_CTRL_STOP);
|
||||
return (1);
|
||||
}
|
||||
|
||||
if (i == len - 1) {
|
||||
pcfiic_write(sc, PCF_S1, PCF_CTRL_ESO);
|
||||
} else if (i == len) {
|
||||
pcfiic_write(sc, PCF_S1, PCF_CTRL_STOP);
|
||||
}
|
||||
|
||||
r = pcfiic_read(sc, PCF_S0);
|
||||
if (i > 0)
|
||||
buf[i - 1] = r;
|
||||
}
|
||||
return (err);
|
||||
}
|
||||
|
||||
u_int8_t
|
||||
pcfiic_read(struct pcfiic_softc *sc, bus_size_t r)
|
||||
{
|
||||
bus_space_barrier(sc->sc_iot, sc->sc_ioh, sc->sc_regmap[r], 1,
|
||||
BUS_SPACE_BARRIER_READ);
|
||||
return (bus_space_read_1(sc->sc_iot, sc->sc_ioh, sc->sc_regmap[r]));
|
||||
}
|
||||
|
||||
void
|
||||
pcfiic_write(struct pcfiic_softc *sc, bus_size_t r, u_int8_t v)
|
||||
{
|
||||
bus_space_write_1(sc->sc_iot, sc->sc_ioh, sc->sc_regmap[r], v);
|
||||
bus_space_barrier(sc->sc_iot, sc->sc_ioh, sc->sc_regmap[r], 1,
|
||||
BUS_SPACE_BARRIER_WRITE);
|
||||
}
|
||||
|
||||
void
|
||||
pcfiic_choose_bus(struct pcfiic_softc *sc, u_int8_t bus)
|
||||
{
|
||||
bus_space_write_1(sc->sc_iot, sc->sc_ioh2, 0, bus);
|
||||
bus_space_barrier(sc->sc_iot, sc->sc_ioh2, 0, 1,
|
||||
BUS_SPACE_BARRIER_WRITE);
|
||||
}
|
||||
|
||||
int
|
||||
pcfiic_wait_nBB(struct pcfiic_softc *sc)
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i = 0; i < 1000; i++) {
|
||||
if (pcfiic_read(sc, PCF_S1) & PCF_STAT_nBB)
|
||||
return (0);
|
||||
delay(1000);
|
||||
}
|
||||
return (1);
|
||||
}
|
||||
|
||||
int
|
||||
pcfiic_wait_pin(struct pcfiic_softc *sc, volatile u_int8_t *r)
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i = 0; i < 1000; i++) {
|
||||
*r = pcfiic_read(sc, PCF_S1);
|
||||
if ((*r & PCF_STAT_PIN) == 0)
|
||||
return (0);
|
||||
delay(1000);
|
||||
}
|
||||
return (1);
|
||||
}
|
||||
|
||||
@ -1,42 +1,51 @@
|
||||
/* $NetBSD: pcf8584var.h,v 1.3 2008/04/28 20:23:51 martin Exp $ */
|
||||
/* $NetBSD: pcf8584var.h,v 1.4 2010/02/28 11:47:28 martin Exp $ */
|
||||
/* $OpenBSD: pcf8584var.h,v 1.5 2007/10/20 18:46:21 kettenis Exp $ */
|
||||
|
||||
/*-
|
||||
* Copyright (c) 2007 The NetBSD Foundation, Inc.
|
||||
* All rights reserved.
|
||||
/*
|
||||
* Copyright (c) 2006 David Gwynne <dlg@openbsd.org>
|
||||
*
|
||||
* This code is derived from software contributed to The NetBSD Foundation
|
||||
* by Tobias Nygren.
|
||||
* Permission to use, copy, modify, and distribute this software for any
|
||||
* purpose with or without fee is hereby granted, provided that the above
|
||||
* copyright notice and this permission notice appear in all copies.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
|
||||
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
|
||||
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
|
||||
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
|
||||
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
|
||||
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
|
||||
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
|
||||
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
|
||||
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
|
||||
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
|
||||
*/
|
||||
|
||||
struct pcf8584_handle {
|
||||
device_t ha_parent;
|
||||
bus_space_tag_t ha_iot;
|
||||
bus_space_handle_t ha_ioh;
|
||||
struct i2c_controller ha_i2c;
|
||||
struct pcfiic_softc {
|
||||
device_t sc_dev;
|
||||
|
||||
kcondvar_t ha_intrcond;
|
||||
kmutex_t ha_intrmtx;
|
||||
bus_space_tag_t sc_iot;
|
||||
bus_space_handle_t sc_ioh;
|
||||
bus_space_handle_t sc_ioh2;
|
||||
int sc_master;
|
||||
u_int8_t sc_addr;
|
||||
u_int8_t sc_clock;
|
||||
u_int8_t sc_regmap[2];
|
||||
|
||||
int sc_poll;
|
||||
|
||||
struct i2c_controller sc_i2c;
|
||||
krwlock_t sc_lock;
|
||||
};
|
||||
|
||||
int pcf8584_init(struct pcf8584_handle *);
|
||||
/* clock divisor settings */
|
||||
#define PCF_CLOCK_3 0x00 /* 3 MHz */
|
||||
#define PCF_CLOCK_4_43 0x10 /* 4.43 MHz */
|
||||
#define PCF_CLOCK_6 0x14 /* 6 MHz */
|
||||
#define PCF_CLOCK_8 0x18 /* 8 MHz */
|
||||
#define PCF_CLOCK_12 0x1c /* 12 MHz */
|
||||
|
||||
/* SCL frequency settings */
|
||||
#define PCF_FREQ_90 0x00 /* 90 kHz */
|
||||
#define PCF_FREQ_45 0x01 /* 45 kHz */
|
||||
#define PCF_FREQ_11 0x02 /* 11 kHz */
|
||||
#define PCF_FREQ_1_5 0x03 /* 1.5 kHz */
|
||||
|
||||
void pcfiic_attach(struct pcfiic_softc *, i2c_addr_t, u_int8_t, int);
|
||||
int pcfiic_intr(void *);
|
||||
|
||||
Loading…
Reference in New Issue
Block a user