Make this work with an ISO C preprocessor.
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04076e5943
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@ -1,4 +1,4 @@
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/* $NetBSD: mipsX_subr.S,v 1.3 2002/06/01 13:52:23 simonb Exp $ */
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/* $NetBSD: mipsX_subr.S,v 1.4 2002/06/04 21:44:40 thorpej Exp $ */
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/*
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/*
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* Copyright 2002 Wasabi Systems, Inc.
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* Copyright 2002 Wasabi Systems, Inc.
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@ -219,46 +219,41 @@
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/*
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/*
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* CPP function renaming macros.
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* CPP function renaming macros.
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*/
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*/
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#if defined(LOSING_WITH_CPP)
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#if defined(MIPS3)
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#if defined(MIPS3)
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#define MIPSX_PREFIX mips3
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#endif
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#if defined(MIPS32)
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#define MIPSX_PREFIX mips32
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#endif
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#if defined(MIPS64)
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#define MIPSX_PREFIX mips64
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#endif
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#ifdef __STDC__
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#ifdef __STDC__
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#define MIPSX(name) MIPSX_PREFIX ## _ ## name
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#define MIPSX(name) mips3_ ## name
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#else
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#else
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#define MIPSX(name) MIPSX_PREFIX/**/_/**/name
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#endif
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#else /* LOSING_WITH_CPP */
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#if defined(MIPS3)
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#define MIPSX(name) mips3_/**/name
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#define MIPSX(name) mips3_/**/name
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#endif
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#endif
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#endif
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#if defined(MIPS3_5900)
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#if defined(MIPS3_5900)
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#undef MIPSX
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#undef MIPSX
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#ifdef __STDC__
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#define MIPSX(name) mips5900_ ## name
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#else
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#define MIPSX(name) mips5900_/**/name
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#define MIPSX(name) mips5900_/**/name
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#endif
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#endif
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#endif
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#if defined(MIPS32)
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#if defined(MIPS32)
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#ifdef __STDC__
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#define MIPSX(name) mips32_ ## name
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#else
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#define MIPSX(name) mips32_/**/name
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#define MIPSX(name) mips32_/**/name
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#endif
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#endif
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#endif
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#if defined(MIPS64)
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#if defined(MIPS64)
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#ifdef __STDC__
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#define MIPSX(name) mips64_ ## name
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#else
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#define MIPSX(name) mips64_/**/name
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#define MIPSX(name) mips64_/**/name
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#endif
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#endif
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#endif
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#endif /* LOSING_WITH_CPP */
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#define _VECTOR_END(name) VECTOR_END(name)
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/*
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/*
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* XXX We need a cleaner way of handling the instruction hazards of
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* XXX We need a cleaner way of handling the instruction hazards of
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@ -363,7 +358,7 @@ VECTOR(MIPSX(TLBMiss), unknown)
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5: j slowfault #1e: no page table present
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5: j slowfault #1e: no page table present
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nop #1f: branch delay slot
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nop #1f: branch delay slot
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.set at
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.set at
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VECTOR_END(MIPSX(TLBMiss))
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_VECTOR_END(MIPSX(TLBMiss))
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#if defined(USE_64BIT_CP0_FUNCTIONS)
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#if defined(USE_64BIT_CP0_FUNCTIONS)
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/*
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/*
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@ -416,7 +411,7 @@ VECTOR(MIPSX(XTLBMiss), unknown)
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5: j slowfault #1e: no page table present
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5: j slowfault #1e: no page table present
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nop #1f: branch delay slot
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nop #1f: branch delay slot
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.set at
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.set at
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VECTOR_END(MIPSX(XTLBMiss))
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_VECTOR_END(MIPSX(XTLBMiss))
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#endif /* USE_64BIT_CP0_FUNCTIONS */
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#endif /* USE_64BIT_CP0_FUNCTIONS */
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/*
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/*
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@ -430,7 +425,7 @@ VECTOR(MIPSX(cache), unknown)
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or k0, k1
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or k0, k1
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j k0
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j k0
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nop
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nop
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VECTOR_END(MIPSX(cache))
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_VECTOR_END(MIPSX(cache))
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/*
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/*
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* Handle MIPS32/MIPS64 style interrupt exception vector.
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* Handle MIPS32/MIPS64 style interrupt exception vector.
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@ -439,7 +434,7 @@ VECTOR(MIPSX(intr), unknown)
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la k0, MIPSX(KernIntr)
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la k0, MIPSX(KernIntr)
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j k0
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j k0
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nop
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nop
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VECTOR_END(MIPSX(intr))
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_VECTOR_END(MIPSX(intr))
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/*
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/*
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*----------------------------------------------------------------------------
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*----------------------------------------------------------------------------
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@ -480,7 +475,7 @@ VECTOR(MIPSX(exception), unknown)
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j k0 #09: jump to the function
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j k0 #09: jump to the function
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nop #0a: branch delay slot
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nop #0a: branch delay slot
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.set at
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.set at
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VECTOR_END(MIPSX(exception))
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_VECTOR_END(MIPSX(exception))
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/*----------------------------------------------------------------------------
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/*----------------------------------------------------------------------------
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*
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*
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