4-line HD44780 LCD display support. Work needed for the NetBSD toaster port.
The HD44780 actually doesn't support 4 lines, but the 4 line displays use two chips, one for the top two lines and one for the bottom two lines. The chips share the databus, register-select, and write signals but have separate enable signals.
This commit is contained in:
joff
parent
e446808533
commit
02e79f9fb1
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@ -1,4 +1,4 @@
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/* $NetBSD: hd44780_subr.c,v 1.6 2005/02/27 00:27:01 perry Exp $ */
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/* $NetBSD: hd44780_subr.c,v 1.7 2005/08/14 02:56:06 joff Exp $ */
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/*
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* Copyright (c) 2002 Dennis I. Chernoivanov
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@ -32,7 +32,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: hd44780_subr.c,v 1.6 2005/02/27 00:27:01 perry Exp $");
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__KERNEL_RCSID(0, "$NetBSD: hd44780_subr.c,v 1.7 2005/08/14 02:56:06 joff Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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@ -57,15 +57,14 @@ __KERNEL_RCSID(0, "$NetBSD: hd44780_subr.c,v 1.6 2005/02/27 00:27:01 perry Exp $
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#define COORD_TO_IDX(x, y) ((y) * sc->sc_cols + (x))
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#define COORD_TO_DADDR(x, y) ((y) * HD_ROW2_ADDR + (x))
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#define IDX_TO_ROW(idx) (((idx) >= sc->sc_cols) ? 1 : 0)
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#define IDX_TO_COL(idx) (((idx) >= sc->sc_cols) ? \
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((idx) - sc->sc_cols) : (idx))
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#define IDX_TO_DDADDR(idx) ((IDX_TO_ROW((idx)) == 1) ? \
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(HD_ROW2_ADDR + IDX_TO_COL((idx))) : \
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(IDX_TO_COL((idx))))
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#define DADDR_TO_ROW(daddr) (((daddr) >= HD_ROW2_ADDR) ? 1 : 0)
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#define DADDR_TO_COL(daddr) ((DADDR_TO_ROW((daddr)) == 1) ? \
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((daddr) - HD_ROW2_ADDR) : (daddr))
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#define IDX_TO_ROW(idx) ((idx) / sc->sc_cols)
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#define IDX_TO_COL(idx) ((idx) % sc->sc_cols)
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#define IDX_TO_DADDR(idx) (IDX_TO_ROW((idx)) * HD_ROW2_ADDR + \
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IDX_TO_COL((idx)))
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#define DADDR_TO_ROW(daddr) ((daddr) / HD_ROW2_ADDR)
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#define DADDR_TO_COL(daddr) ((daddr) % HD_ROW2_ADDR)
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#define DADDR_TO_CHIPDADDR(daddr) ((daddr) % (HD_ROW2_ADDR * 2))
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#define DADDR_TO_CHIPNO(daddr) ((daddr) / (HD_ROW2_ADDR * 2))
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static void hlcd_cursor(void *, int, int, int);
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static int hlcd_mapchar(void *, int, unsigned int *);
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@ -142,7 +141,7 @@ hlcd_putchar(id, row, col, c, attr)
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struct hlcd_screen *hdscr = id;
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c &= 0xff;
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if (row > 0 && (hdscr->hlcd_sc->sc_flags & HD_MULTILINE))
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if (row > 0 && (hdscr->hlcd_sc->sc_flags & (HD_MULTILINE|HD_MULTICHIP)))
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hdscr->image[hdscr->hlcd_sc->sc_cols * row + col] = c;
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else
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hdscr->image[col] = c;
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@ -161,7 +160,7 @@ hlcd_copycols(id, row, srccol, dstcol, ncols)
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if ((dstcol + ncols - 1) > hdscr->hlcd_sc->sc_cols)
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ncols = hdscr->hlcd_sc->sc_cols - srccol;
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if (row > 0 && (hdscr->hlcd_sc->sc_flags & HD_MULTILINE))
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if (row > 0 && (hdscr->hlcd_sc->sc_flags & (HD_MULTILINE|HD_MULTICHIP)))
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bcopy(&hdscr->image[hdscr->hlcd_sc->sc_cols * row + srccol],
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&hdscr->image[hdscr->hlcd_sc->sc_cols * row + dstcol], ncols);
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else
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@ -183,7 +182,7 @@ hlcd_erasecols(id, row, startcol, ncols, fillattr)
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if ((startcol + ncols) > hdscr->hlcd_sc->sc_cols)
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ncols = hdscr->hlcd_sc->sc_cols - startcol;
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if (row > 0 && (hdscr->hlcd_sc->sc_flags & HD_MULTILINE))
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if (row > 0 && (hdscr->hlcd_sc->sc_flags & (HD_MULTILINE|HD_MULTICHIP)))
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memset(&hdscr->image[hdscr->hlcd_sc->sc_cols * row + startcol],
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' ', ncols);
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else
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@ -199,7 +198,7 @@ hlcd_copyrows(id, srcrow, dstrow, nrows)
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struct hlcd_screen *hdscr = id;
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int ncols = hdscr->hlcd_sc->sc_cols;
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if (!(hdscr->hlcd_sc->sc_flags & HD_MULTILINE))
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if (!(hdscr->hlcd_sc->sc_flags & (HD_MULTILINE|HD_MULTICHIP)))
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return;
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bcopy(&hdscr->image[srcrow * ncols], &hdscr->image[dstrow * ncols],
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nrows * ncols);
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@ -307,14 +306,16 @@ hlcd_updatechar(sc, daddr, c)
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struct hd44780_chip *sc;
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int daddr, c;
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{
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int curdaddr;
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int curdaddr, en, chipdaddr;
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curdaddr = COORD_TO_DADDR(sc->sc_screen.hlcd_curx,
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sc->sc_screen.hlcd_cury);
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en = DADDR_TO_CHIPNO(daddr);
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chipdaddr = DADDR_TO_CHIPDADDR(daddr);
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if (daddr != curdaddr)
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hd44780_ir_write(sc, cmd_ddramset(daddr));
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hd44780_ir_write(sc, en, cmd_ddramset(chipdaddr));
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hd44780_dr_write(sc, c);
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hd44780_dr_write(sc, en, c);
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daddr++;
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sc->sc_screen.hlcd_curx = DADDR_TO_COL(daddr);
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@ -327,6 +328,7 @@ hlcd_redraw(arg)
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{
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struct hd44780_chip *sc = arg;
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int len, crsridx, startidx, x, y;
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int old_en, new_en;
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u_char *img, *curimg;
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if (sc->sc_curscr == NULL)
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@ -337,13 +339,20 @@ hlcd_redraw(arg)
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else
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len = sc->sc_cols;
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if (sc->sc_flags & HD_MULTICHIP)
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len = len * 2;
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x = sc->sc_screen.hlcd_curx;
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y = sc->sc_screen.hlcd_cury;
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old_en = DADDR_TO_CHIPNO(COORD_TO_DADDR(x, y));
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img = sc->sc_screen.image;
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curimg = sc->sc_curscr->image;
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startidx = crsridx =
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COORD_TO_IDX(sc->sc_screen.hlcd_curx, sc->sc_screen.hlcd_cury);
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do {
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if (img[crsridx] != curimg[crsridx]) {
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hlcd_updatechar(sc, IDX_TO_DDADDR(crsridx),
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hlcd_updatechar(sc, IDX_TO_DADDR(crsridx),
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curimg[crsridx]);
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img[crsridx] = curimg[crsridx];
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}
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@ -352,19 +361,33 @@ hlcd_redraw(arg)
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crsridx = 0;
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} while (crsridx != startidx);
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x = sc->sc_curscr->hlcd_curx;
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y = sc->sc_curscr->hlcd_cury;
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new_en = DADDR_TO_CHIPNO(COORD_TO_DADDR(x, y));
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if (sc->sc_screen.hlcd_curx != sc->sc_curscr->hlcd_curx ||
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sc->sc_screen.hlcd_cury != sc->sc_curscr->hlcd_cury) {
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x = sc->sc_screen.hlcd_curx = sc->sc_curscr->hlcd_curx;
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y = sc->sc_screen.hlcd_cury = sc->sc_curscr->hlcd_cury;
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hd44780_ir_write(sc, cmd_ddramset(COORD_TO_DADDR(x, y)));
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hd44780_ir_write(sc, new_en, cmd_ddramset(
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DADDR_TO_CHIPDADDR(COORD_TO_DADDR(x, y))));
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}
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/* visible cursor switched to other chip */
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if (old_en != new_en && sc->sc_screen.hlcd_curon) {
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hd44780_ir_write(sc, old_en, cmd_dispctl(1, 0, 0));
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hd44780_ir_write(sc, new_en, cmd_dispctl(1, 1, 1));
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}
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if (sc->sc_screen.hlcd_curon != sc->sc_curscr->hlcd_curon) {
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sc->sc_screen.hlcd_curon = sc->sc_curscr->hlcd_curon;
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if (sc->sc_screen.hlcd_curon)
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hd44780_ir_write(sc, cmd_dispctl(1, 1, 1));
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hd44780_ir_write(sc, new_en, cmd_dispctl(1, 1, 1));
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else
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hd44780_ir_write(sc, cmd_dispctl(1, 0, 0));
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hd44780_ir_write(sc, new_en, cmd_dispctl(1, 0, 0));
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}
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callout_schedule(&sc->redraw, 1);
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@ -403,26 +426,39 @@ hd44780_attach_subr(sc)
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sc->sc_screen.image = malloc(PAGE_SIZE, M_DEVBUF, M_WAITOK);
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memset(sc->sc_screen.image, ' ', PAGE_SIZE);
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sc->sc_curscr = NULL;
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sc->sc_curchip = 0;
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callout_init(&sc->redraw);
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callout_setfunc(&sc->redraw, hlcd_redraw, sc);
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}
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int hd44780_init(sc)
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struct hd44780_chip *sc;
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{
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int ret;
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ret = hd44780_chipinit(sc, 0);
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if (ret != 0 || !(sc->sc_flags & HD_MULTICHIP)) return ret;
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else return hd44780_chipinit(sc, 1);
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}
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/*
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* Initialize 4-bit or 8-bit connected device.
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*/
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int
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hd44780_init(sc)
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hd44780_chipinit(sc, en)
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struct hd44780_chip *sc;
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u_int32_t en;
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{
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u_int8_t cmd, dat;
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sc->sc_flags &= ~(HD_TIMEDOUT|HD_UP);
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sc->sc_dev_ok = 1;
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cmd = cmd_init(sc->sc_flags & HD_8BIT);
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hd44780_ir_write(sc, cmd);
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hd44780_ir_write(sc, en, cmd);
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delay(HD_TIMEOUT_LONG);
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hd44780_ir_write(sc, cmd);
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hd44780_ir_write(sc, cmd);
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hd44780_ir_write(sc, en, cmd);
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hd44780_ir_write(sc, en, cmd);
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cmd = cmd_funcset(
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sc->sc_flags & HD_8BIT,
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@ -430,14 +466,14 @@ hd44780_init(sc)
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sc->sc_flags & HD_BIGFONT);
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if ((sc->sc_flags & HD_8BIT) == 0)
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hd44780_ir_write(sc, cmd);
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hd44780_ir_write(sc, en, cmd);
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sc->sc_flags |= HD_UP;
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hd44780_ir_write(sc, cmd);
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hd44780_ir_write(sc, cmd_dispctl(0, 0, 0));
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hd44780_ir_write(sc, cmd_clear());
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hd44780_ir_write(sc, cmd_modset(1, 0));
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hd44780_ir_write(sc, en, cmd);
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hd44780_ir_write(sc, en, cmd_dispctl(0, 0, 0));
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hd44780_ir_write(sc, en, cmd_clear());
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hd44780_ir_write(sc, en, cmd_modset(1, 0));
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if (sc->sc_flags & HD_TIMEDOUT) {
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sc->sc_flags &= ~HD_UP;
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@ -445,19 +481,19 @@ hd44780_init(sc)
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}
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/* Turn display on and clear it. */
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hd44780_ir_write(sc, cmd_clear());
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hd44780_ir_write(sc, cmd_dispctl(1, 0, 0));
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hd44780_ir_write(sc, en, cmd_clear());
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hd44780_ir_write(sc, en, cmd_dispctl(1, 0, 0));
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/* Attempt a simple probe for presence */
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hd44780_ir_write(sc, cmd_ddramset(0x5));
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hd44780_ir_write(sc, cmd_shift(0, 1));
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hd44780_busy_wait(sc);
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if ((dat = hd44780_ir_read(sc) & 0x7f) != 0x6) {
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hd44780_ir_write(sc, en, cmd_ddramset(0x5));
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hd44780_ir_write(sc, en, cmd_shift(0, 1));
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hd44780_busy_wait(sc, en);
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if ((dat = hd44780_ir_read(sc, en) & 0x7f) != 0x6) {
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sc->sc_dev_ok = 0;
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sc->sc_flags &= ~HD_UP;
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return EIO;
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}
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hd44780_ir_write(sc, cmd_ddramset(0));
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hd44780_ir_write(sc, en, cmd_ddramset(0));
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return 0;
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}
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@ -473,6 +509,7 @@ hd44780_ioctl_subr(sc, cmd, data)
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{
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u_int8_t tmp;
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int error = 0;
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u_int32_t en = sc->sc_curchip;
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#define hd44780_io() ((struct hd44780_io *)data)
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#define hd44780_info() ((struct hd44780_info*)data)
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@ -481,22 +518,22 @@ hd44780_ioctl_subr(sc, cmd, data)
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switch (cmd) {
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/* Clear the LCD. */
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case HLCD_CLEAR:
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hd44780_ir_write(sc, cmd_clear());
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hd44780_ir_write(sc, en, cmd_clear());
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break;
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/* Move the cursor one position to the left. */
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case HLCD_CURSOR_LEFT:
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hd44780_ir_write(sc, cmd_shift(0, 0));
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hd44780_ir_write(sc, en, cmd_shift(0, 0));
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break;
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/* Move the cursor one position to the right. */
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case HLCD_CURSOR_RIGHT:
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hd44780_ir_write(sc, cmd_shift(0, 1));
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hd44780_ir_write(sc, en, cmd_shift(0, 1));
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break;
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/* Control the LCD. */
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case HLCD_DISPCTL:
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hd44780_ir_write(sc, cmd_dispctl(
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hd44780_ir_write(sc, en, cmd_dispctl(
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hd44780_ctrl()->display_on,
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hd44780_ctrl()->cursor_on,
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hd44780_ctrl()->blink_on));
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@ -506,6 +543,8 @@ hd44780_ioctl_subr(sc, cmd, data)
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case HLCD_GET_INFO:
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hd44780_info()->lines
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= (sc->sc_flags & HD_MULTILINE) ? 2 : 1;
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if (sc->sc_flags & HD_MULTICHIP)
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hd44780_info()->lines *= 2;
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hd44780_info()->phys_rows = sc->sc_cols;
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hd44780_info()->virt_rows = sc->sc_vcols;
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hd44780_info()->is_wide = sc->sc_flags & HD_8BIT;
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@ -521,64 +560,74 @@ hd44780_ioctl_subr(sc, cmd, data)
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/* Get the current cursor position. */
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case HLCD_GET_CURSOR_POS:
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hd44780_io()->dat = (hd44780_ir_read(sc) & 0x7f);
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hd44780_io()->dat = (hd44780_ir_read(sc, en) & 0x7f);
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break;
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/* Set the cursor position. */
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case HLCD_SET_CURSOR_POS:
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hd44780_ir_write(sc, cmd_ddramset(hd44780_io()->dat));
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hd44780_ir_write(sc, en, cmd_ddramset(hd44780_io()->dat));
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break;
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/* Get the value at the current cursor position. */
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case HLCD_GETC:
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tmp = (hd44780_ir_read(sc) & 0x7f);
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hd44780_ir_write(sc, cmd_ddramset(tmp));
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hd44780_io()->dat = hd44780_dr_read(sc);
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tmp = (hd44780_ir_read(sc, en) & 0x7f);
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hd44780_ir_write(sc, en, cmd_ddramset(tmp));
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hd44780_io()->dat = hd44780_dr_read(sc, en);
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break;
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/* Set the character at the cursor position + advance cursor. */
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case HLCD_PUTC:
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hd44780_dr_write(sc, hd44780_io()->dat);
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hd44780_dr_write(sc, en, hd44780_io()->dat);
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break;
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/* Shift display left. */
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case HLCD_SHIFT_LEFT:
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hd44780_ir_write(sc, cmd_shift(1, 0));
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hd44780_ir_write(sc, en, cmd_shift(1, 0));
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break;
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/* Shift display right. */
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case HLCD_SHIFT_RIGHT:
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hd44780_ir_write(sc, cmd_shift(1, 1));
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hd44780_ir_write(sc, en, cmd_shift(1, 1));
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break;
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/* Return home. */
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case HLCD_HOME:
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hd44780_ir_write(sc, cmd_rethome());
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hd44780_ir_write(sc, en, cmd_rethome());
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break;
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/* Write a string to the LCD virtual area. */
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case HLCD_WRITE:
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error = hd44780_ddram_io(sc, hd44780_io(), HD_DDRAM_WRITE);
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error = hd44780_ddram_io(sc, en, hd44780_io(), HD_DDRAM_WRITE);
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break;
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/* Read LCD virtual area. */
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case HLCD_READ:
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error = hd44780_ddram_io(sc, hd44780_io(), HD_DDRAM_READ);
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error = hd44780_ddram_io(sc, en, hd44780_io(), HD_DDRAM_READ);
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break;
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/* Write to the LCD visible area. */
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case HLCD_REDRAW:
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hd44780_ddram_redraw(sc, hd44780_io());
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hd44780_ddram_redraw(sc, en, hd44780_io());
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break;
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/* Write raw instruction. */
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case HLCD_WRITE_INST:
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hd44780_ir_write(sc, hd44780_io()->dat);
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hd44780_ir_write(sc, en, hd44780_io()->dat);
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break;
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/* Write raw data. */
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||||
case HLCD_WRITE_DATA:
|
||||
hd44780_dr_write(sc, hd44780_io()->dat);
|
||||
hd44780_dr_write(sc, en, hd44780_io()->dat);
|
||||
break;
|
||||
|
||||
/* Get current chip 0 or 1 (top or bottom) */
|
||||
case HLCD_GET_CHIPNO:
|
||||
*(u_int8_t *)data = sc->sc_curchip;
|
||||
break;
|
||||
|
||||
/* Set current chip 0 or 1 (top or bottom) */
|
||||
case HLCD_SET_CHIPNO:
|
||||
sc->sc_curchip = *(u_int8_t *)data;
|
||||
break;
|
||||
|
||||
default:
|
||||
|
|
@ -595,8 +644,9 @@ hd44780_ioctl_subr(sc, cmd, data)
|
|||
* Read/write particular area of the LCD screen.
|
||||
*/
|
||||
int
|
||||
hd44780_ddram_io(sc, io, dir)
|
||||
hd44780_ddram_io(sc, en, io, dir)
|
||||
struct hd44780_chip *sc;
|
||||
u_int32_t en;
|
||||
struct hd44780_io *io;
|
||||
u_char dir;
|
||||
{
|
||||
|
|
@ -610,11 +660,11 @@ hd44780_ddram_io(sc, io, dir)
|
|||
hi = HD_ROW1_ADDR + sc->sc_vcols;
|
||||
addr = HD_ROW1_ADDR + io->dat;
|
||||
for (; (addr < hi) && (i < io->len); addr++, i++) {
|
||||
hd44780_ir_write(sc, cmd_ddramset(addr));
|
||||
hd44780_ir_write(sc, en, cmd_ddramset(addr));
|
||||
if (dir == HD_DDRAM_READ)
|
||||
io->buf[i] = hd44780_dr_read(sc);
|
||||
io->buf[i] = hd44780_dr_read(sc, en);
|
||||
else
|
||||
hd44780_dr_write(sc, io->buf[i]);
|
||||
hd44780_dr_write(sc, en, io->buf[i]);
|
||||
}
|
||||
}
|
||||
if (io->dat < 2 * sc->sc_vcols) {
|
||||
|
|
@ -624,11 +674,11 @@ hd44780_ddram_io(sc, io, dir)
|
|||
else
|
||||
addr = HD_ROW2_ADDR;
|
||||
for (; (addr < hi) && (i < io->len); addr++, i++) {
|
||||
hd44780_ir_write(sc, cmd_ddramset(addr));
|
||||
hd44780_ir_write(sc, en, cmd_ddramset(addr));
|
||||
if (dir == HD_DDRAM_READ)
|
||||
io->buf[i] = hd44780_dr_read(sc);
|
||||
io->buf[i] = hd44780_dr_read(sc, en);
|
||||
else
|
||||
hd44780_dr_write(sc, io->buf[i]);
|
||||
hd44780_dr_write(sc, en, io->buf[i]);
|
||||
}
|
||||
if (i < io->len)
|
||||
io->len = i;
|
||||
|
|
@ -642,32 +692,34 @@ hd44780_ddram_io(sc, io, dir)
|
|||
* Write to the visible area of the display.
|
||||
*/
|
||||
void
|
||||
hd44780_ddram_redraw(sc, io)
|
||||
hd44780_ddram_redraw(sc, en, io)
|
||||
struct hd44780_chip *sc;
|
||||
u_int32_t en;
|
||||
struct hd44780_io *io;
|
||||
{
|
||||
u_int8_t i;
|
||||
|
||||
hd44780_ir_write(sc, cmd_clear());
|
||||
hd44780_ir_write(sc, cmd_rethome());
|
||||
hd44780_ir_write(sc, en, cmd_clear());
|
||||
hd44780_ir_write(sc, en, cmd_rethome());
|
||||
for (i = 0; (i < io->len) && (i < sc->sc_cols); i++) {
|
||||
hd44780_dr_write(sc, io->buf[i]);
|
||||
hd44780_dr_write(sc, en, io->buf[i]);
|
||||
}
|
||||
hd44780_ir_write(sc, cmd_ddramset(HD_ROW2_ADDR));
|
||||
hd44780_ir_write(sc, en, cmd_ddramset(HD_ROW2_ADDR));
|
||||
for (; (i < io->len); i++)
|
||||
hd44780_dr_write(sc, io->buf[i]);
|
||||
hd44780_dr_write(sc, en, io->buf[i]);
|
||||
}
|
||||
|
||||
void
|
||||
hd44780_busy_wait(sc)
|
||||
hd44780_busy_wait(sc, en)
|
||||
struct hd44780_chip *sc;
|
||||
u_int32_t en;
|
||||
{
|
||||
int nloops = 100;
|
||||
|
||||
if (sc->sc_flags & HD_TIMEDOUT)
|
||||
return;
|
||||
|
||||
while(nloops-- && (hd44780_ir_read(sc) & BUSY_FLAG) == BUSY_FLAG);
|
||||
while(nloops-- && (hd44780_ir_read(sc, en) & BUSY_FLAG) == BUSY_FLAG);
|
||||
|
||||
if (nloops == 0) {
|
||||
sc->sc_flags |= HD_TIMEDOUT;
|
||||
|
|
@ -680,9 +732,9 @@ hd44780_busy_wait(sc)
|
|||
* Standard 8-bit version of 'sc_writereg' (8-bit port, 8-bit access)
|
||||
*/
|
||||
void
|
||||
hd44780_writereg(sc, reg, cmd)
|
||||
hd44780_writereg(sc, en, reg, cmd)
|
||||
struct hd44780_chip *sc;
|
||||
u_int32_t reg;
|
||||
u_int32_t en, reg;
|
||||
u_int8_t cmd;
|
||||
{
|
||||
bus_space_tag_t iot = sc->sc_iot;
|
||||
|
|
@ -704,9 +756,9 @@ hd44780_writereg(sc, reg, cmd)
|
|||
* Standard 8-bit version of 'sc_readreg' (8-bit port, 8-bit access)
|
||||
*/
|
||||
u_int8_t
|
||||
hd44780_readreg(sc, reg)
|
||||
hd44780_readreg(sc, en, reg)
|
||||
struct hd44780_chip *sc;
|
||||
u_int32_t reg;
|
||||
u_int32_t en, reg;
|
||||
{
|
||||
bus_space_tag_t iot = sc->sc_iot;
|
||||
bus_space_handle_t ioh;
|
||||
|
|
@ -727,9 +779,9 @@ hd44780_readreg(sc, reg)
|
|||
* Standard 4-bit version of 'sc_writereg' (4-bit port, 8-bit access)
|
||||
*/
|
||||
void
|
||||
hd44780_writereg(sc, reg, cmd)
|
||||
hd44780_writereg(sc, en, reg, cmd)
|
||||
struct hd44780_chip *sc;
|
||||
u_int32_t reg;
|
||||
u_int32_t en, reg;
|
||||
u_int8_t cmd;
|
||||
{
|
||||
bus_space_tag_t iot = sc->sc_iot;
|
||||
|
|
@ -753,9 +805,9 @@ hd44780_writereg(sc, reg, cmd)
|
|||
* Standard 4-bit version of 'sc_readreg' (4-bit port, 8-bit access)
|
||||
*/
|
||||
u_int8_t
|
||||
hd44780_readreg(sc, reg)
|
||||
hd44780_readreg(sc, en, reg)
|
||||
struct hd44780_chip *sc;
|
||||
u_int32_t reg;
|
||||
u_int32_t en, reg;
|
||||
{
|
||||
bus_space_tag_t iot = sc->sc_iot;
|
||||
bus_space_handle_t ioh;
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: hd44780var.h,v 1.2 2005/02/04 05:58:44 joff Exp $ */
|
||||
/* $NetBSD: hd44780var.h,v 1.3 2005/08/14 02:56:06 joff Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 2002 Dennis I. Chernoivanov
|
||||
|
|
@ -49,14 +49,18 @@
|
|||
#define HLCD_WRITE_INST _IOW('h', 16, struct hd44780_io)
|
||||
#define HLCD_WRITE_DATA _IOW('h', 17, struct hd44780_io)
|
||||
#define HLCD_GET_INFO _IOR('h', 18, struct hd44780_info)
|
||||
#define HLCD_GET_CHIPNO _IOR('h', 19, u_int8_t)
|
||||
#define HLCD_SET_CHIPNO _IOW('h', 20, u_int8_t)
|
||||
|
||||
struct hd44780_dispctl {
|
||||
u_int8_t chip;
|
||||
u_char display_on:1,
|
||||
blink_on:1,
|
||||
cursor_on:1;
|
||||
};
|
||||
|
||||
struct hd44780_io {
|
||||
u_int8_t chip;
|
||||
u_int8_t dat;
|
||||
u_int8_t len;
|
||||
u_int8_t buf[HD_MAX_CHARS];
|
||||
|
|
@ -90,11 +94,13 @@ struct hd44780_chip {
|
|||
#define HD_KEYPAD 0x08 /* if set, keypad is connected */
|
||||
#define HD_UP 0x10 /* if set, lcd has been initialized */
|
||||
#define HD_TIMEDOUT 0x20 /* lcd has recently stopped talking */
|
||||
#define HD_MULTICHIP 0x40 /* two HD44780 controllers (4-line) */
|
||||
u_char sc_flags;
|
||||
|
||||
u_char sc_cols; /* visible columns */
|
||||
u_char sc_vcols; /* virtual columns (normally 40) */
|
||||
u_char sc_dev_ok;
|
||||
u_char sc_curchip;
|
||||
|
||||
bus_space_tag_t sc_iot;
|
||||
|
||||
|
|
@ -107,38 +113,40 @@ struct hd44780_chip {
|
|||
struct callout redraw; /* wsdisplay refresh/redraw timer */
|
||||
|
||||
/* Generic write/read byte entries. */
|
||||
void (* sc_writereg)(struct hd44780_chip *, u_int32_t, u_int8_t);
|
||||
u_int8_t (* sc_readreg)(struct hd44780_chip *, u_int32_t);
|
||||
void (* sc_writereg)(struct hd44780_chip *, u_int32_t, u_int32_t,
|
||||
u_int8_t);
|
||||
u_int8_t (* sc_readreg)(struct hd44780_chip *, u_int32_t, u_int32_t);
|
||||
};
|
||||
|
||||
#define hd44780_ir_write(sc, dat) \
|
||||
#define hd44780_ir_write(sc, en, dat) \
|
||||
do { \
|
||||
hd44780_busy_wait(sc); \
|
||||
(sc)->sc_writereg((sc), 0, (dat)); \
|
||||
hd44780_busy_wait(sc, (en)); \
|
||||
(sc)->sc_writereg((sc), (en), 0, (dat)); \
|
||||
} while(0)
|
||||
|
||||
#define hd44780_ir_read(sc) \
|
||||
(sc)->sc_readreg((sc), 0)
|
||||
#define hd44780_ir_read(sc, en) \
|
||||
(sc)->sc_readreg((sc), (en), 0)
|
||||
|
||||
#define hd44780_dr_write(sc, dat) \
|
||||
(sc)->sc_writereg((sc), 1, (dat))
|
||||
#define hd44780_dr_write(sc, en, dat) \
|
||||
(sc)->sc_writereg((sc), (en), 1, (dat))
|
||||
|
||||
#define hd44780_dr_read(sc) \
|
||||
(sc)->sc_readreg((sc), 1)
|
||||
#define hd44780_dr_read(sc, en) \
|
||||
(sc)->sc_readreg((sc), (en), 1)
|
||||
|
||||
void hd44780_attach_subr(struct hd44780_chip *);
|
||||
void hd44780_busy_wait(struct hd44780_chip *);
|
||||
void hd44780_busy_wait(struct hd44780_chip *, u_int32_t);
|
||||
int hd44780_init(struct hd44780_chip *);
|
||||
int hd44780_chipinit(struct hd44780_chip *, u_int32_t);
|
||||
int hd44780_ioctl_subr(struct hd44780_chip *, u_long, caddr_t);
|
||||
void hd44780_ddram_redraw(struct hd44780_chip *, struct hd44780_io *);
|
||||
void hd44780_ddram_redraw(struct hd44780_chip *, u_int32_t, struct hd44780_io *);
|
||||
|
||||
#define HD_DDRAM_READ 0x0
|
||||
#define HD_DDRAM_WRITE 0x1
|
||||
int hd44780_ddram_io(struct hd44780_chip *, struct hd44780_io *, u_char);
|
||||
int hd44780_ddram_io(struct hd44780_chip *, u_int32_t, struct hd44780_io *, u_char);
|
||||
|
||||
#if defined(HD44780_STD_WIDE) || defined(HD44780_STD_SHORT)
|
||||
void hd44780_writereg(struct hd44780_chip *, u_int32_t, u_int8_t);
|
||||
u_int8_t hd44780_readreg(struct hd44780_chip *, u_int32_t);
|
||||
void hd44780_writereg(struct hd44780_chip *, u_int32_t, u_int32_t, u_int8_t);
|
||||
u_int8_t hd44780_readreg(struct hd44780_chip *, u_int32_t, u_int32_t);
|
||||
#endif
|
||||
|
||||
#endif /* _KERNEL */
|
||||
|
|
|
|||
Loading…
Reference in New Issue