2008-03-11 08:34:01 +03:00
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/* $NetBSD: ubavar.h,v 1.39 2008/03/11 05:34:02 matt Exp $ */
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1999-05-27 20:04:48 +04:00
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/*
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* Copyright (c) 1982, 1986 Regents of the University of California.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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2003-08-07 20:26:28 +04:00
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* 3. Neither the name of the University nor the names of its contributors
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1999-05-27 20:04:48 +04:00
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* @(#)ubavar.h 7.7 (Berkeley) 6/28/90
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*/
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2000-01-24 05:40:28 +03:00
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#ifndef _QBUS_UBAVAR_H
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#define _QBUS_UBAVAR_H
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1999-05-27 20:04:48 +04:00
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/*
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* This file contains definitions related to the kernel structures
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* for dealing with the unibus adapters.
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*
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* Each uba has a uba_softc structure.
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* Each unibus controller which is not a device has a uba_ctlr structure.
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* Each unibus device has a uba_device structure.
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*/
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/*
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* Per-uba structure.
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*
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* This structure holds the interrupt vector for the uba,
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* and its address in physical and virtual space. At boot time
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* we determine the devices attached to the uba's and their
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* interrupt vectors, filling in uh_vec. We free the map
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* register and bdp resources of the uba into the structures
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* defined here.
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*
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* During normal operation, resources are allocated and returned
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* to the structures here. We watch the number of passive releases
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* on each uba, and if the number is excessive may reset the uba.
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2005-02-26 15:45:06 +03:00
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*
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1999-05-27 20:04:48 +04:00
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* When uba resources are needed and not available, or if a device
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* which can tolerate no other uba activity (rk07) gets on the bus,
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* then device drivers may have to wait to get to the bus and are
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* queued here. It is also possible for processes to block in
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* the unibus driver in resource wait (mrwant, bdpwant); these
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* wait states are also recorded here.
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*/
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struct uba_softc {
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2008-03-11 08:34:01 +03:00
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device_t uh_dev; /* Device struct, autoconfig */
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struct evcnt uh_intrcnt; /* interrupt counting */
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1999-05-27 20:04:48 +04:00
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SIMPLEQ_HEAD(, uba_unit) uh_resq; /* resource wait chain */
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2000-04-30 15:46:03 +04:00
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SIMPLEQ_HEAD(, uba_reset) uh_resetq; /* ubareset queue */
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1999-05-27 20:04:48 +04:00
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int uh_lastiv; /* last free interrupt vector */
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2005-02-04 05:10:35 +03:00
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int (*uh_errchk)(struct uba_softc *);
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void (*uh_beforescan)(struct uba_softc *);
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void (*uh_afterscan)(struct uba_softc *);
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void (*uh_ubainit)(struct uba_softc *);
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void (*uh_ubapurge)(struct uba_softc *, int);
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short uh_nr; /* Unibus sequential number */
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2001-05-13 19:23:37 +04:00
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short uh_type; /* Type of bus */
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bus_space_tag_t uh_iot; /* Tag for this Unibus */
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bus_space_handle_t uh_ioh; /* Handle for I/O space */
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1999-06-06 23:14:48 +04:00
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bus_dma_tag_t uh_dmat;
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2003-08-28 18:59:06 +04:00
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char *uh_used; /* I/O addresses used */
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1999-05-27 20:04:48 +04:00
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};
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/*
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* Per-controller structure.
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* The unit struct is common to both the adapter and the controller
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* to which it belongs. It is only used on controllers that handles
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* BDP's, and calls the adapter queueing subroutines.
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*/
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struct uba_unit {
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SIMPLEQ_ENTRY(uba_unit) uu_resq;/* Queue while waiting for resources */
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device_t uu_dev; /* unit's device_t */
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int uu_bdp; /* for controllers that hang on to bdp's */
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2005-02-04 05:10:35 +03:00
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int (*uu_ready)(struct uba_unit *);
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void *uu_ref; /* Buffer this is related to */
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2005-02-26 15:45:06 +03:00
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short uu_xclu; /* want exclusive use of bdp's */
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short uu_keepbdp; /* hang on to bdp's once allocated */
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1999-05-27 20:04:48 +04:00
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};
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2000-04-30 15:46:03 +04:00
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/*
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* Reset structure. All devices that needs to be reinitialized
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* after an ubareset registers with this struct.
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*/
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struct uba_reset {
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SIMPLEQ_ENTRY(uba_reset) ur_resetq;
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2008-03-11 08:34:01 +03:00
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void (*ur_reset)(device_t);
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device_t ur_dev;
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};
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1999-05-27 20:04:48 +04:00
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/*
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* uba_attach_args is used during autoconfiguration. It is sent
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* from ubascan() to each (possible) device.
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*/
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struct uba_attach_args {
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bus_space_tag_t ua_iot; /* Tag for this bus I/O-space */
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bus_addr_t ua_ioh; /* I/O regs addr */
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2000-06-05 04:09:17 +04:00
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bus_dma_tag_t ua_dmat; /* DMA tag for this bus'es dma */
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struct evcnt *ua_evcnt;
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void *ua_icookie; /* Cookie for interrupt establish */
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int ua_iaddr; /* Full CSR address of device */
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int ua_br; /* IPL this dev interrupted on */
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int ua_cvec; /* Vector for this device */
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};
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/*
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* Flags to UBA map/bdp allocation routines
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*/
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#define UBA_NEEDBDP 0x01 /* transfer needs a bdp */
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#define UBA_CANTWAIT 0x02 /* don't block me */
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#define UBA_NEED16 0x04 /* need 16 bit addresses only */
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#define UBA_HAVEBDP 0x08 /* use bdp specified in high bits */
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1999-06-06 23:14:48 +04:00
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#define UBA_DONTQUE 0x10 /* Do not enqueue xfer */
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1999-05-27 20:04:48 +04:00
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2001-05-13 19:23:37 +04:00
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/*
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* Type of adapter.
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*/
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#define UBA_UBA 0 /* Traditional unibus adapter */
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#define UBA_MVI 1 /* MVI direct-mapped unibus */
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#define UBA_QBUS 2 /* Qbus with map registers */
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2001-04-26 23:16:07 +04:00
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/*
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* Struct for unibus allocation.
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*/
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struct ubinfo {
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bus_dmamap_t ui_dmam;
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bus_dma_segment_t ui_seg;
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int ui_rseg;
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2007-03-04 08:59:00 +03:00
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void *ui_vaddr;
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2001-04-26 23:16:07 +04:00
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bus_addr_t ui_baddr;
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bus_size_t ui_size;
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};
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1999-05-27 20:04:48 +04:00
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/*
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1999-06-06 23:14:48 +04:00
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* Some common defines for all subtypes of U/Q-buses/adapters.
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1999-05-27 20:04:48 +04:00
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*/
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1999-06-06 23:14:48 +04:00
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#define MAXUBAXFER (63*1024) /* Max transfer size in bytes */
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#define ubdevreg(addr) ((addr) & 017777)
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1999-05-27 20:04:48 +04:00
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#ifdef _KERNEL
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2000-06-04 06:14:12 +04:00
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void uba_intr_establish(void *, int, void (*)(void *), void *, struct evcnt *);
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2008-03-11 08:34:01 +03:00
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void uba_reset_establish(void (*)(device_t), device_t);
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2000-06-04 06:14:12 +04:00
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void uba_attach(struct uba_softc *, unsigned long);
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void uba_enqueue(struct uba_unit *);
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void uba_done(struct uba_softc *);
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void ubareset(struct uba_softc *);
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2001-04-26 23:16:07 +04:00
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int uballoc(struct uba_softc *, struct ubinfo *, int);
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int ubmemalloc(struct uba_softc *, struct ubinfo *, int);
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void ubfree(struct uba_softc *, struct ubinfo *);
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void ubmemfree(struct uba_softc *, struct ubinfo *);
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1999-05-27 20:04:48 +04:00
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#endif /* _KERNEL */
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2000-01-24 05:40:28 +03:00
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#endif /* _QBUS_UBAVAR_H */
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