68 lines
2.3 KiB
C
68 lines
2.3 KiB
C
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/* $NetBSD: omapl1x_misc.h,v 1.1 2013/10/02 16:48:26 matt Exp $ */
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/*
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* Copyright (c) 2013 Sughosh Ganu
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain this list of conditions
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* and the following disclaimer.
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* 2. Redistributions in binary form must reproduce this list of conditions
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* and the following disclaimer in the documentation and/or other materials
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* provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES,
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* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND
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* FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ANY
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* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
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* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
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* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _ARM_OMAP_OMAPL1X_MISC_H_
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#define _ARM_OMAP_OMAPL1X_MISC_H_
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#ifndef STATHZ
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# define STATHZ 64
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#endif
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#define USB0REF_FREQ 0xf
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#define USB0REF_FREQ_24M 0x2
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#define USB0VBDTCTEN __BIT(4)
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#define USB0SESNDEN __BIT(5)
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#define USB0PHY_PLLON __BIT(6)
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#define USB1SUSPENDM __BIT(7)
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#define USB0OTGPWDN __BIT(9)
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#define USB0PHYPWDN __BIT(10)
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#define USB0PHYCLKMUX __BIT(11)
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#define USB1PHYCLKMUX __BIT(12)
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#define USB0OTGMODE __BITS(13,14)
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#define RESET __BIT(15)
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#define USB0PHYCLKGD __BIT(17)
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#define SYSCFG_KICK0R_KEY 0x83E70B13
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#define SYSCFG_KICK1R_KEY 0x95A4F1E0
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#define PSC1_USB20_MODULE 0x1
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#define PSC1_USB11_MODULE 0x2
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struct omapl1x_syscfg {
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bus_space_tag_t syscfg_iot; /* Bus tag */
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bus_addr_t syscfg_addr; /* Address */
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bus_space_handle_t syscfg_ioh;
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bus_size_t syscfg_size;
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};
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void omapl1x_reset(void);
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uint8_t omapl1x_lpsc_enable(uint32_t module);
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uint8_t omapl1x_usbclk_enable(struct omapl1x_syscfg *syscfg);
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uint64_t omapl1x_get_tc_freq(void);
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#endif /* ARM_OMAP__OMAPL1X_MISC_H_ */
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