117 lines
4.8 KiB
C
117 lines
4.8 KiB
C
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/* $NetBSD: pci_machdep.h,v 1.1 2002/09/28 11:16:36 scw Exp $ */
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/*
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* Copyright (c) 1996 Christopher G. Demetriou. All rights reserved.
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* Copyright (c) 1994 Charles M. Hannum. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Charles M. Hannum.
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* 4. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _SH5_PCI_MACHDEP_H
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#define _SH5_PCI_MACHDEP_H
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/*
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* Types provided to machine-independent PCI code
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*/
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struct pci_attach_args;
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struct sh5_pci_chipset_tag;
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typedef const struct sh5_pci_chipset_tag *pci_chipset_tag_t;
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typedef u_int32_t pcitag_t;
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typedef u_int32_t pci_intr_handle_t;
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/*
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* sh5-specific PCI structure and type definitions.
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* NOT TO BE USED DIRECTLY BY MACHINE INDEPENDENT CODE.
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*/
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/*
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* Chipset tag.
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* The current SH5 silicon has an on-chip PCI bridge.
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* However, on the Cayman, this is supplemented by some resources
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* provided by the SysFPGA chip.
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* Therefore, we abstract the PCI services though a chipset tag
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* which can be set up appropriately by board-specific code.
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*/
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struct sh5_pci_chipset_tag {
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void *ct_cookie;
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void (*ct_attach_hook)(void *, struct device *, struct device *,
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struct pcibus_attach_args *);
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int (*ct_bus_maxdevs)(void *, int);
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pcitag_t (*ct_make_tag)(void *, int, int, int);
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void (*ct_decompose_tag)(void *, pcitag_t, int *, int *, int *);
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pcireg_t (*ct_conf_read)(void *, pcitag_t, int);
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void (*ct_conf_write)(void *, pcitag_t, int, pcireg_t);
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void (*ct_conf_interrupt)(void *, int, int, int, int, int *);
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int (*ct_intr_map)(void *, struct pci_attach_args *,
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pci_intr_handle_t *);
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const char * (*ct_intr_string)(void *, pci_intr_handle_t);
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const struct evcnt * (*ct_intr_evcnt)(void *, pci_intr_handle_t);
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void * (*ct_intr_establish)(void *, pci_intr_handle_t,
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int, int (*)(void *), void *);
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void (*ct_intr_disestablish)(void *, void *);
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};
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/*
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* Functions provided to machine-independent PCI code.
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*/
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#define pci_attach_hook(parent, self, pba) \
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(*(pba)->pba_pc->ct_attach_hook)((pba)->pba_pc->ct_cookie, \
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(parent), (self), (pba))
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#define pci_bus_maxdevs(ct, busno) \
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(*(ct)->ct_bus_maxdevs)((ct)->ct_cookie, (busno))
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#define pci_make_tag(ct, bus, dev, func) \
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(*(ct)->ct_make_tag)((ct)->ct_cookie, (bus), (dev), (func))
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#define pci_decompose_tag(ct, tag, bp, dp, fp) \
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(*(ct)->ct_decompose_tag)((ct)->ct_cookie, (tag), (bp), (dp), (fp))
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#define pci_conf_read(ct, tag, reg) \
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(*(ct)->ct_conf_read)((ct)->ct_cookie, (tag), (reg))
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#define pci_conf_write(ct, tag, reg, data) \
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(*(ct)->ct_conf_write)((ct)->ct_cookie, (tag), (reg), (data))
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#define pci_conf_interrupt(ct, bn, dv, pn, swz, lp) \
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(*(ct)->ct_conf_interrupt)((ct)->ct_cookie, (bn), (dv), \
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(pn), (swz), (lp))
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#define pci_intr_map(pa, ih) \
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(*(pa)->pa_pc->ct_intr_map)((pa)->pa_pc->ct_cookie, (pa), (ih))
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#define pci_intr_string(ct, ih) \
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(*(ct)->ct_intr_string)((ct)->ct_cookie, (ih))
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#define pci_intr_evcnt(ct, ih) \
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(*(ct)->ct_intr_evcnt)((ct)->ct_cookie, (ih))
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#define pci_intr_establish(ct, ih, l, fn, arg) \
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(*(ct)->ct_intr_establish)((ct)->ct_cookie, (ih), (l), (fn), (arg))
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#define pci_intr_disestablish(ct, cookie) \
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(*(ct)->ct_intr_disestablish)((ct)->ct_cookie, (cookie))
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/*
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* Use the generic PCIbus enumeration code
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*/
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#define pci_enumerate_bus(sc, m, p) \
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pci_enumerate_bus_generic((sc), (m), (p))
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#endif /* _SH5_PCI_MACHDEP_H */
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