57 lines
2.7 KiB
C
57 lines
2.7 KiB
C
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/* $NetBSD: qecreg.h,v 1.1 1998/07/27 19:27:19 pk Exp $ */
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/*
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* Copyright (c) 1998 Theo de Raadt. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/* QEC registers */
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struct qecregs {
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volatile u_int32_t ctrl; /* control */
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volatile u_int32_t stat; /* status */
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volatile u_int32_t psize; /* packet size */
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volatile u_int32_t msize; /* local-mem size (64K) */
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volatile u_int32_t rsize; /* receive partition size */
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volatile u_int32_t tsize; /* transmit partition size */
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};
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#define QEC_CTRL_MMODE 0x40000000 /* MACE qec mode */
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#define QEC_CTRL_BMODE 0x10000000 /* BE qec mode */
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#define QEC_CTRL_EPAR 0x00000020 /* enable parity */
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#define QEC_CTRL_ACNTRL 0x00000018 /* sbus arbitration control */
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#define QEC_CTRL_B64 0x00000004 /* 64 byte dvma bursts */
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#define QEC_CTRL_B32 0x00000002 /* 32 byte dvma bursts */
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#define QEC_CTRL_B16 0x00000000 /* 16 byte dvma bursts */
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#define QEC_CTRL_RESET 0x00000001 /* reset the qec */
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#define QEC_STAT_TX 0x00000008 /* bigmac transmit irq */
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#define QEC_STAT_RX 0x00000004 /* bigmac receive irq */
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#define QEC_STAT_BM 0x00000002 /* bigmac qec irq */
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#define QEC_STAT_ER 0x00000001 /* bigmac error irq */
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#define QEC_PSIZE_2048 0x00 /* 2k packet size */
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#define QEC_PSIZE_4096 0x01 /* 4k packet size */
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#define QEC_PSIZE_6144 0x10 /* 6k packet size */
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#define QEC_PSIZE_8192 0x11 /* 8k packet size */
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