2001-07-06 20:20:07 +04:00
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/* $NetBSD: dp83932var.h,v 1.3 2001/07/06 16:20:07 thorpej Exp $ */
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2001-07-05 18:37:41 +04:00
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/*-
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* Copyright (c) 2001 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Jason R. Thorpe.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _DEV_IC_DP83932VAR_H_
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#define _DEV_IC_DP83932VAR_H_
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/*
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* Data structure definitions for the National Semiconductor DP83932
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* Systems-Oriented Network Interface Controller (SONIC).
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*/
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/*
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* NOTE: The control data for the SONIC must not cross a 64k boundary,
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* so we have to be careful about how we size things.
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*
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* Also, since the SONIC is only a 10Mb/s chip, and systems on which
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* it is present tend to be low on memory, we try to keep the data
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* structure sizes small.
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*/
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/*
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* Transmit descriptor list size.
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*/
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#define SONIC_NTXDESC 32
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#define SONIC_NTXDESC_MASK (SONIC_NTXDESC - 1)
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#define SONIC_NEXTTX(x) (((x) + 1) & SONIC_NTXDESC_MASK)
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/*
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* Receive descriptor list size.
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*/
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#define SONIC_NRXDESC 32
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#define SONIC_NRXDESC_MASK (SONIC_NRXDESC - 1)
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#define SONIC_NEXTRX(x) (((x) + 1) & SONIC_NRXDESC_MASK)
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#define SONIC_PREVRX(x) (((x) - 1) & SONIC_NRXDESC_MASK)
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#define SONIC_RXSEQ_TO_DESC(x) ((x) & SONIC_NRXDESC_MASK)
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/*
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* Control structures are DMA'd to the SONIC chip. We allocate them in
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* a single clump that maps to a single DMA segment to make several things
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* easier.
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*/
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struct sonic_control_data16 {
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/*
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* The transmit descriptors.
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*/
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struct sonic_tda16 scd_txdescs[SONIC_NTXDESC];
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/*
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* The receive descriptors.
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*/
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struct sonic_rda16 scd_rxdescs[SONIC_NRXDESC];
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/*
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* The receive resource descriptors.
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*/
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struct sonic_rra16 scd_rxbufs[SONIC_NRXDESC];
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/*
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* The CAM descriptors.
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*/
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struct sonic_cda16 scd_cam[16];
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};
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#define SONIC_CDOFF16(x) offsetof(struct sonic_control_data16, x)
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#define SONIC_CDTXOFF16(x) SONIC_CDOFF16(scd_txdescs[(x)])
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#define SONIC_CDRXOFF16(x) SONIC_CDOFF16(scd_rxdescs[(x)])
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#define SONIC_CDRROFF16(x) SONIC_CDOFF16(scd_rxbufs[(x)])
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#define SONIC_CDCAMOFF16 SONIC_CDOFF16(scd_cam)
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struct sonic_control_data32 {
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/*
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* The transmit descriptors.
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*/
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struct sonic_tda32 scd_txdescs[SONIC_NTXDESC];
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/*
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* The receive descriptors.
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*/
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struct sonic_rda32 scd_rxdescs[SONIC_NRXDESC];
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/*
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* The receive resource descriptors.
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*/
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struct sonic_rra32 scd_rxbufs[SONIC_NRXDESC];
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/*
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* The CAM descriptors.
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*/
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struct sonic_cda32 scd_cam[16];
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};
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#define SONIC_CDOFF32(x) offsetof(struct sonic_control_data32, x)
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#define SONIC_CDTXOFF32(x) SONIC_CDOFF32(scd_txdescs[(x)])
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#define SONIC_CDRXOFF32(x) SONIC_CDOFF32(scd_rxdescs[(x)])
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#define SONIC_CDRROFF32(x) SONIC_CDOFF32(scd_rxbufs[(x)])
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#define SONIC_CDCAMOFF32 SONIC_CDOFF32(scd_cam)
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/*
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* Software state for transmit and receive descriptors.
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*/
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struct sonic_descsoft {
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struct mbuf *ds_mbuf; /* head of mbuf chain */
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bus_dmamap_t ds_dmamap; /* our DMA map */
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};
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/*
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* Software state per device.
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*/
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struct sonic_softc {
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struct device sc_dev; /* generic device information */
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bus_space_tag_t sc_st; /* bus space tag */
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bus_space_handle_t sc_sh; /* bus space handle */
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bus_dma_tag_t sc_dmat; /* bus DMA tag */
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struct ethercom sc_ethercom; /* ethernet common data */
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void *sc_sdhook; /* shutdown hook */
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int sc_32bit; /* use 32-bit mode */
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int sc_bigendian; /* BMODE -> Vcc */
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/* Our register map. */
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bus_addr_t sc_regmap[SONIC_NREGS];
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bus_dmamap_t sc_cddmamap; /* control data DMA map */
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#define sc_cddma sc_cddmamap->dm_segs[0].ds_addr
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/*
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* Software state for transmit and receive descriptors.
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*/
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struct sonic_descsoft sc_txsoft[SONIC_NTXDESC];
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struct sonic_descsoft sc_rxsoft[SONIC_NRXDESC];
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/*
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* Control data structures.
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*/
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union {
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struct sonic_control_data16 *cdun_16;
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struct sonic_control_data32 *cdun_32;
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} sc_cdun;
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#define sc_cdata16 sc_cdun.cdun_16
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#define sc_cdata32 sc_cdun.cdun_32
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#define sc_tda16 sc_cdun.cdun_16->scd_txdescs
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#define sc_rda16 sc_cdun.cdun_16->scd_rxdescs
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#define sc_rra16 sc_cdun.cdun_16->scd_rxbufs
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#define sc_cda16 sc_cdun.cdun_16->scd_cam
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#define sc_tda32 sc_cdun.cdun_32->scd_txdescs
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#define sc_rda32 sc_cdun.cdun_32->scd_rxdescs
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#define sc_rra32 sc_cdun.cdun_32->scd_rxbufs
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#define sc_cda32 sc_cdun.cdun_32->scd_cam
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int sc_txpending; /* number of Tx requests pending */
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int sc_txdirty; /* first dirty Tx descriptor */
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int sc_txlast; /* last used Tx descriptor */
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int sc_rxptr; /* next ready Rx descriptor */
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uint16_t sc_imr; /* prototype IMR */
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uint16_t sc_dcr; /* prototype DCR */
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uint16_t sc_dcr2; /* prototype DCR2 */
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};
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#define CSR_READ(sc, reg) \
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bus_space_read_2((sc)->sc_st, (sc)->sc_sh, \
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(sc)->sc_regmap[(reg)])
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#define CSR_WRITE(sc, reg, val) \
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bus_space_write_2((sc)->sc_st, (sc)->sc_sh, \
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(sc)->sc_regmap[(reg)], (val))
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2001-07-05 19:02:27 +04:00
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#define SONIC_CDTXADDR16(sc, x) \
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((sc)->sc_cddma + SONIC_CDTXOFF16((x)))
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#define SONIC_CDTXADDR32(sc, x) \
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((sc)->sc_cddma + SONIC_CDTXOFF32((x)))
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2001-07-05 18:37:41 +04:00
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#define SONIC_CDTXADDR(sc, x) \
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2001-07-05 19:02:27 +04:00
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((sc)->sc_32bit ? SONIC_CDTXADDR32((sc), (x)) : \
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SONIC_CDTXADDR16((sc), (x)))
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#define SONIC_CDRXADDR16(sc, x) \
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((sc)->sc_cddma + SONIC_CDRXOFF16((x)))
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#define SONIC_CDRXADDR32(sc, x) \
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((sc)->sc_cddma + SONIC_CDRXOFF32((x)))
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2001-07-05 18:37:41 +04:00
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#define SONIC_CDRXADDR(sc, x) \
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2001-07-05 19:02:27 +04:00
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((sc)->sc_32bit ? SONIC_CDRXADDR32((sc), (x)) : \
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SONIC_CDRXADDR16((sc), (x)))
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2001-07-05 18:37:41 +04:00
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#define SONIC_CDRRADDR(sc, x) \
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((sc)->sc_cddma + \
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((sc)->sc_32bit ? SONIC_CDRROFF32((x)) : SONIC_CDRROFF16((x))))
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#define SONIC_CDCAMADDR(sc) \
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((sc)->sc_cddma + \
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((sc)->sc_32bit ? SONIC_CDCAMOFF32 : SONIC_CDCAMOFF32))
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2001-07-05 19:02:27 +04:00
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#define SONIC_CDTXSYNC16(sc, x, ops) \
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bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_cddmamap, \
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SONIC_CDTXOFF16((x)), sizeof(struct sonic_tda16), (ops))
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2001-07-05 18:37:41 +04:00
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2001-07-05 19:02:27 +04:00
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#define SONIC_CDTXSYNC32(sc, x, ops) \
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bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_cddmamap, \
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SONIC_CDTXOFF32((x)), sizeof(struct sonic_tda32), (ops))
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2001-07-05 18:37:41 +04:00
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2001-07-05 19:02:27 +04:00
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#define SONIC_CDRXSYNC16(sc, x, ops) \
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bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_cddmamap, \
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SONIC_CDRXOFF16((x)), sizeof(struct sonic_rda16), (ops))
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#define SONIC_CDRXSYNC32(sc, x, ops) \
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bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_cddmamap, \
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SONIC_CDRXOFF32((x)), sizeof(struct sonic_rda32), (ops))
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#define SONIC_CDRRSYNC16(sc, x, ops) \
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bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_cddmamap, \
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SONIC_CDRROFF16((x)), sizeof(struct sonic_rra16), (ops))
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#define SONIC_CDRRSYNC32(sc, x, ops) \
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bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_cddmamap, \
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SONIC_CDRROFF32((x)), sizeof(struct sonic_rra32), (ops))
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2001-07-05 18:37:41 +04:00
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#define SONIC_CDCAMSYNC(sc, ops) \
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do { \
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if ((sc)->sc_32bit) \
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bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_cddmamap, \
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SONIC_CDCAMOFF32, sizeof(struct sonic_cda32) * 16, \
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(ops)); \
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else \
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bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_cddmamap, \
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SONIC_CDCAMOFF16, sizeof(struct sonic_cda16) * 16, \
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(ops)); \
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} while (/*CONSTCOND*/0)
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#define SONIC_INIT_RXDESC(sc, x) \
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do { \
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struct sonic_descsoft *__ds = &(sc)->sc_rxsoft[(x)]; \
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struct mbuf *__m = __ds->ds_mbuf; \
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\
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if ((sc)->sc_32bit) { \
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/* \
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* Unfortuantely, in 32-bit mode, the Rx buffer must \
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* be 32-bit aligned. \
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*/ \
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struct sonic_rda32 *__rda = &(sc)->sc_rda32[(x)]; \
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struct sonic_rda32 *__prda = \
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&(sc)->sc_rda32[SONIC_PREVRX((x))]; \
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struct sonic_rra32 *__rra = &(sc)->sc_rra32[(x)]; \
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\
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__m->m_data = __m->m_ext.ext_buf; \
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\
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__rra->rra_ptr1 = \
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__ds->ds_dmamap->dm_segs[0].ds_addr >> 16; \
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__rra->rra_ptr0 = \
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__ds->ds_dmamap->dm_segs[0].ds_addr & 0xffff; \
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__rra->rra_wc1 = 0; \
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__rra->rra_wc0 = (ETHER_MAX_LEN + 6) / 2; \
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\
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__rda->rda_link = \
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2001-07-05 19:02:27 +04:00
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(SONIC_CDRXADDR32((sc), SONIC_NEXTRX((x))) & 0xffff) |\
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2001-07-05 18:37:41 +04:00
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RDA_LINK_EOL; \
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__rda->rda_inuse = 1; \
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\
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2001-07-05 19:02:27 +04:00
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__prda->rda_link = SONIC_CDRXADDR32((sc), (x)); \
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\
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SONIC_CDRRSYNC32((sc), (x), BUS_DMASYNC_PREWRITE); \
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SONIC_CDRXSYNC32((sc), (x), \
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BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); \
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SONIC_CDRXSYNC32((sc), SONIC_PREVRX(x), \
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BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); \
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2001-07-05 18:37:41 +04:00
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} else { \
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/* \
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* In 16-bit mode, we scoot the packet forward 2 bytes \
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* so that the payload after the Ethernet header is \
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* suitably aligned. \
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*/ \
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struct sonic_rda16 *__rda = &(sc)->sc_rda16[(x)]; \
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struct sonic_rda16 *__prda = \
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&(sc)->sc_rda16[SONIC_PREVRX((x))]; \
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struct sonic_rra16 *__rra = &(sc)->sc_rra16[(x)]; \
|
|
|
|
\
|
|
|
|
__m->m_data = __m->m_ext.ext_buf + 2; \
|
|
|
|
\
|
|
|
|
__rra->rra_ptr1 = \
|
|
|
|
__ds->ds_dmamap->dm_segs[0].ds_addr >> 16; \
|
|
|
|
__rra->rra_ptr0 = \
|
|
|
|
(__ds->ds_dmamap->dm_segs[0].ds_addr + 2) & 0xffff; \
|
|
|
|
__rra->rra_wc1 = 0; \
|
|
|
|
__rra->rra_wc0 = (ETHER_MAX_LEN + 2) / 2; \
|
|
|
|
\
|
|
|
|
__rda->rda_link = \
|
2001-07-05 19:02:27 +04:00
|
|
|
(SONIC_CDRXADDR16((sc), SONIC_NEXTRX((x))) & 0xffff) |\
|
2001-07-05 18:37:41 +04:00
|
|
|
RDA_LINK_EOL; \
|
|
|
|
__rda->rda_inuse = 1; \
|
|
|
|
\
|
2001-07-05 19:02:27 +04:00
|
|
|
__prda->rda_link = SONIC_CDRXADDR16((sc), (x)); \
|
2001-07-05 18:37:41 +04:00
|
|
|
\
|
2001-07-05 19:02:27 +04:00
|
|
|
SONIC_CDRRSYNC16((sc), (x), BUS_DMASYNC_PREWRITE); \
|
|
|
|
SONIC_CDRXSYNC16((sc), (x), \
|
|
|
|
BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); \
|
|
|
|
SONIC_CDRXSYNC16((sc), SONIC_PREVRX(x), \
|
|
|
|
BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); \
|
|
|
|
} \
|
2001-07-05 18:37:41 +04:00
|
|
|
} while (/*CONSTCOND*/0)
|
|
|
|
|
|
|
|
static __inline uint16_t __attribute__((__unused__))
|
|
|
|
htosonic16(struct sonic_softc *sc, uint16_t val)
|
|
|
|
{
|
|
|
|
|
|
|
|
if (sc->sc_bigendian)
|
|
|
|
return (htobe16(val));
|
|
|
|
return (htole16(val));
|
|
|
|
}
|
|
|
|
|
|
|
|
static __inline uint16_t __attribute__((__unused__))
|
|
|
|
sonic16toh(struct sonic_softc *sc, uint16_t val)
|
|
|
|
{
|
|
|
|
|
|
|
|
if (sc->sc_bigendian)
|
|
|
|
return (be16toh(val));
|
|
|
|
return (le16toh(val));
|
|
|
|
}
|
|
|
|
|
|
|
|
static __inline uint32_t __attribute__((__unused__))
|
|
|
|
htosonic32(struct sonic_softc *sc, uint32_t val)
|
|
|
|
{
|
|
|
|
|
|
|
|
if (sc->sc_bigendian)
|
|
|
|
return (htobe32(val));
|
2001-07-06 20:20:07 +04:00
|
|
|
return (htole32(val));
|
2001-07-05 18:37:41 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
static __inline uint32_t __attribute__((__unused__))
|
|
|
|
sonic32toh(struct sonic_softc *sc, uint32_t val)
|
|
|
|
{
|
|
|
|
|
|
|
|
if (sc->sc_bigendian)
|
|
|
|
return (be32toh(val));
|
|
|
|
return (le32toh(val));
|
|
|
|
}
|
|
|
|
|
|
|
|
#ifdef _KERNEL
|
|
|
|
void sonic_attach(struct sonic_softc *, const uint8_t *);
|
|
|
|
int sonic_intr(void *);
|
|
|
|
#endif /* _KERNEL */
|
|
|
|
|
|
|
|
#endif /* _DEV_IC_DP83932VAR_H_ */
|