2005-02-01 19:16:22 +03:00
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/* $NetBSD: ds1687reg.h,v 1.5 2005/02/01 16:16:22 he Exp $ */
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2003-01-19 01:07:21 +03:00
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/*
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* Copyright (c) 2003 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Rafal K. Boni.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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2003-01-19 01:13:18 +03:00
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/*
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* Originally based on mc146818reg.h, with the following license:
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*
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* Copyright (c) 1995 Carnegie-Mellon University.
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* All rights reserved.
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*
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* Permission to use, copy, modify and distribute this software and
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* its documentation is hereby granted, provided that both the copyright
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* notice and this permission notice appear in all copies of the
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* software, derivative works or modified versions, and any portions
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* thereof, and that both notices appear in supporting documentation.
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*
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* CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
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* CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
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* FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
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*
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* Carnegie Mellon requests users of this software to return to
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*
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* Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
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* School of Computer Science
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* Carnegie Mellon University
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* Pittsburgh PA 15213-3890
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*
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* any improvements or extensions that they make and grant Carnegie the
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* rights to redistribute these changes.
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*/
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2003-01-19 01:07:21 +03:00
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/*
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* Definitions for the Dallas Semiconductor DS1687 Real Time Clock.
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*
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* The DS1687 and follow-on RTC chips are Y2k-compliant successors to the
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* DS1287, which in turn is register-compatible with the MC146818 and/or
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* MC146818A RTCs.
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*
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* Plucked right from the Dallas Semicomductor specs available at:
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* http://pdfserv.maxim-ic.com/arpdf/DS1685-DS1687.pdf
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*
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* The DS1686 contains 14 basic clock-related registers and 50 bytes of
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* user RAM laid out for compatibility with the register layout of the
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* DS1287/MC14818 chips. It also includes an extended mode which allows
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* access to these same basic registers as well an an extended register
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* set and NVRAM area; this extended register set includes a century
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* register for Y2k compliant date storage.
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*
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* Since the locations of these ports and the method used to access them
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* can be machine-dependent, the low-level details of reading and writing
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* writing the RTC's registers are handled by machine-specific functions.
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*
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* The Dallas chip can store time-of-day and alarm data in BCD or binary;
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* this setting applies to *all* values stored in the clock chip and a
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* change from one mode to the other requires *all* of the clock data to
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* be re-written. The "hours" time-of-year and alarm registers can be
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* stored either in an AM/PM or a 24-hour format; the format is set
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* globally and changing it requires re-writing both the hours time-of-
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* year and alarm registers. In AM/PM mode, the hour must be in the
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* range of 1-12 (and stored as either BCD or binary), with the high-
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* bit cleared to indicate AM and set to indicate PM. In 24-hour mode,
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* hours must be in the range 0-23.
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*
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* In order to support extended features like the century register and
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* an embedded silicon serial number while keeping backwards compatibility
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* with the DS1287/MC146818, the DS1687 provides a bank-switching method
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* which allows the user to switch the RTC between a "compatible" mode in
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* bank 0 and an extended mode in bank 1.
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*
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* Both banks provide access to the 14 timekeeping/alarm registers and
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* to 50 bytes of user RAM. In addition, bank 0 provides access to an
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* additional 64 bytes of user RAM in the upper half of the RTC address
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* space.
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*
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* Bank 1, on the other hand, provides access to an extended register set,
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* including a silicon serial number -- including a model ID byte, century
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* register for Y2k compatibility and memory address/data registers which
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* allow indirect access to a larger extended user RAM address space. It
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* is worth noting that the extended user RAM is distinct from the "basic"
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* 114 bytes of user RAM which are accesible in bank 0.
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*/
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/*
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* The registers, and the bits within each register.
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*/
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#define DS1687_SEC 0x00 /* Time of year: seconds (0-59) */
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#define DS1687_ASEC 0x01 /* Alarm: seconds */
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#define DS1687_MIN 0x02 /* Time of year: minutes (0-59) */
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#define DS1687_AMIN 0x03 /* Alarm: minutes */
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#define DS1687_HOUR 0x04 /* Time of year: hour (see above) */
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#define DS1687_AHOUR 0x05 /* Alarm: hour (see above) */
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#define DS1687_DOW 0x06 /* Time of year: day of week (1-7, 1 = Sun) */
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#define DS1687_DOM 0x07 /* Time of year: day of month (1-31) */
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#define DS1687_MONTH 0x08 /* Time of year: month (1-12) */
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#define DS1687_YEAR 0x09 /* Time of year: year in century (0-99) */
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#define DS1687_CONTROLA 0x0a /* Control Register A */
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#define DS1687_UIP 0x80 /* Update in progress: RO */
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#define DS1687_DV2 0x40 /* Countdown chain: 0 = on, 1 = reset if DV1 */
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#define DS1687_DV1 0x20 /* Oscillator enable */
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#define DS1687_BANK1 0x10 /* Bank select: 0 = bank0, 1 = bank1 */
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#define DS1687_RATEMASK 0x0f /* Rate select bits for sq. wave and PIE */
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#define DS1687_CONTROLB 0x0b /* Control Register B */
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#define DS1687_SET 0x80 /* Clock update control: 1 = disable update */
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#define DS1687_PIE 0x40 /* Periodic interrupt enable */
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#define DS1687_AIE 0x20 /* Alarm interrupt enable */
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#define DS1687_UIE 0x10 /* Update-ended interrupt enable */
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#define DS1687_SQWE 0x08 /* Enable sq. wave output on SQW pin */
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#define DS1687_BINARY 0x04 /* Data mode: 0 = BCD, 1 = binary data */
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#define DS1687_24HRS 0x02 /* Hour format: 1 = 24hrs, 0 = 12hrs */
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#define DS1687_DSE 0x01 /* Daylight savings enable */
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#define DS1687_CONTROLC 0x0c /* Control register C: Read-only */
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/* Note: PF, AF, UF cleared on read */
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#define DS1687_IRQF 0x80 /* IRQ present: set when any IRQ is active */
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#define DS1687_PF 0x40 /* Periodic interrupt: independent of PIE */
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#define DS1687_AF 0x20 /* Alarm reached: independent of AIE */
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#define DS1687_UF 0x10 /* Update ended: independent of UIE */
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#define DS1687_CONTROLD 0x0d /* Control register D: Read-only */
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#define DS1687_VRT 0x80 /* Valid RAM and time: battery bad if 0 */
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#define DS1687_NVRAM_START 0x0e /* Start of user ram: offset 14 */
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#define DS1687_NVRAM_SIZE 0x72 /* 114 bytes of user RAM */
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#define DS1687_BANK1_START 0x40 /* BANK1: Start of BANK1 registers */
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#define DS1687_BANK1_CENTURY 0x48 /* BANK1: Time of yr: Century (0-99) */
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#define DS1687_BANK1_ADATE 0x49 /* BANK1: Alarm: Date (1-31) */
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#define DS1687_NBASEREGS 0x0d /* 14 registers; CMOS follows */
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/* Layout of software shadow copy of TOD registers */
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#define DS1687_NHDW_TODREGS 0x0a /* 10 basic TOD registers */
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#define DS1687_NSOFT_TODREGS 0x0c /* ...plus shadow CENTURY, ADATE */
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#define DS1687_SOFT_SEC 0x00
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#define DS1687_SOFT_ASEC 0x01
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#define DS1687_SOFT_MIN 0x02
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#define DS1687_SOFT_AMIN 0x03
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#define DS1687_SOFT_HOUR 0x04
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#define DS1687_SOFT_AHOUR 0x05
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#define DS1687_SOFT_DOW 0x06
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#define DS1687_SOFT_DOM 0x07
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#define DS1687_SOFT_MONTH 0x08
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#define DS1687_SOFT_YEAR 0x09
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#define DS1687_SOFT_CENTURY 0x0a
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#define DS1687_SOFT_ADATE 0x0b
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/*
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* RTC register/NVRAM read and write functions -- machine-dependent.
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* Appropriately manipulate RTC registers to get/put data values.
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*/
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2003-07-08 14:06:28 +04:00
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u_int ds1687_read __P((void *, u_int));
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void ds1687_write __P((void *, u_int, u_int));
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2003-01-19 01:07:21 +03:00
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/*
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* A collection of TOD/Alarm registers.
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*/
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typedef u_int ds1687_todregs[DS1687_NSOFT_TODREGS];
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/*
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* Get all of the TOD/Alarm registers
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* Must be called at splhigh(), and with the RTC properly set up.
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*/
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#define DS1687_GETTOD(sc, regs) \
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do { \
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int i; \
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u_int ctl; \
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\
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/* turn off update for now */ \
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ctl = ds1687_read(sc, DS1687_CONTROLB); \
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ds1687_write(sc, DS1687_CONTROLB, ctl | DS1687_SET); \
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\
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/* read all of the tod/alarm regs */ \
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for (i = 0; i < DS1687_NHDW_TODREGS; i++) \
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(*regs)[i] = ds1687_read(sc, i); \
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\
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(*regs)[DS1687_SOFT_CENTURY] = \
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ds1687_read(sc, DS1687_BANK1_CENTURY); \
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(*regs)[DS1687_SOFT_ADATE] = \
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ds1687_read(sc, DS1687_BANK1_ADATE); \
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\
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/* turn update back on */ \
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ds1687_write(sc, DS1687_CONTROLB, ctl); \
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} while (0);
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/*
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* Set all of the TOD/Alarm registers
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* Must be called at splhigh(), and with the RTC properly set up.
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*/
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#define DS1687_PUTTOD(sc, regs) \
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do { \
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int i; \
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u_int ctl; \
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\
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/* turn off update for now */ \
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ctl = ds1687_read(sc, DS1687_CONTROLB); \
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ds1687_write(sc, DS1687_CONTROLB, ctl | DS1687_SET); \
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\
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/* write all of the tod/alarm regs */ \
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for (i = 0; i < DS1687_NHDW_TODREGS; i++) \
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ds1687_write(sc, i, (*regs)[i]); \
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\
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ds1687_write(sc, DS1687_BANK1_CENTURY, \
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(*regs)[DS1687_SOFT_CENTURY]); \
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ds1687_write(sc, DS1687_BANK1_ADATE, \
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(*regs)[DS1687_SOFT_ADATE]); \
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\
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/* turn update back on */ \
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ds1687_write(sc, DS1687_CONTROLB, ctl); \
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} while (0);
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