2000-07-18 15:07:20 +04:00
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/* $NetBSD: opti82c700reg.h,v 1.2 2000/07/18 11:07:21 soda Exp $ */
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1999-11-17 04:21:20 +03:00
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/*
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* Copyright (c) 1999, by UCHIYAMA Yasushi
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. The name of the developer may NOT be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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/*
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* Register definitions for the Opti 82c700 PCI-ISA bridge interrupt
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* controller.
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*/
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#define FIRESTAR_CFG_INTR_IRQ 0xb0 /* PCI configuration space */
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#define FIRESTAR_CFG_INTR_PIRQ 0xb8 /* PCI configuration space */
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#define FIRESTAR_PIRQ_NONE 0
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#define FIRESTAR_PIRQ_MASK 0xdffa
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#define FIRESTAR_LEGAL_IRQ(irq) ((irq) >= 0 && (irq) <= 15 && \
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((1 << (irq)) & FIRESTAR_PIRQ_MASK) != 0)
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#define FIRESTAR_CFG_PIRQ_MASK 0x0f
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#define FIRESTAR_TRIGGER_MASK 0x01
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#define FIRESTAR_TRIGGER_SHIFT 4
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/*
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* Opti's suggested Link values.
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*/
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#define FIRESTAR_PIR_REGOFS_MASK 0x07
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#define FIRESTAR_PIR_REGOFS_SHIFT 4
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#define FIRESTAR_PIR_REGOFS(link) \
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(((link) >> FIRESTAR_PIR_REGOFS_SHIFT) & FIRESTAR_PIR_REGOFS_MASK)
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#define FIRESTAR_PIR_SELECTSRC_MASK 0x07
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#define FIRESTAR_PIR_SELECTSRC_SHIFT 0
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#define FIRESTAR_PIR_SELECTSRC(link) \
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(((link) >> FIRESTAR_PIR_SELECTSRC_SHIFT) & FIRESTAR_PIR_SELECTSRC_MASK)
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#define FIRESTAR_PIR_SELECT_NONE 0
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#define FIRESTAR_PIR_SELECT_IRQ 1
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#define FIRESTAR_PIR_SELECT_PIRQ 2
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#define FIRESTAR_PIR_SELECT_BRIDGE 3
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#define FIRESTAR_PIR_MAKELINK(src, ofs) \
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(((src) << FIRESTAR_PIR_SELECTSRC_SHIFT) | \
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((ofs) << FIRESTAR_PIR_REGOFS_SHIFT))
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