2006-04-05 05:13:50 +04:00
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/* $NetBSD: igsfbvar.h,v 1.16 2006/04/05 01:13:50 uwe Exp $ */
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2002-03-30 22:48:55 +03:00
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/*
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2003-05-10 05:51:56 +04:00
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* Copyright (c) 2002, 2003 Valeriy E. Ushakov
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2002-03-30 22:48:55 +03:00
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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2002-07-21 06:56:35 +04:00
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* Integraphics Systems IGA 168x and CyberPro series.
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2002-03-30 22:48:55 +03:00
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*/
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#ifndef _DEV_IC_IGSFBVAR_H_
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#define _DEV_IC_IGSFBVAR_H_
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#define IGS_CMAP_SIZE 256 /* 256 R/G/B entries */
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struct igs_hwcmap {
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2004-11-27 01:29:36 +03:00
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uint8_t r[IGS_CMAP_SIZE];
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uint8_t g[IGS_CMAP_SIZE];
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uint8_t b[IGS_CMAP_SIZE];
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2002-03-30 22:48:55 +03:00
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};
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#define IGS_CURSOR_MAX_SIZE 64 /* 64x64 sprite */
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struct igs_hwcursor {
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struct wsdisplay_curpos cc_pos;
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struct wsdisplay_curpos cc_hot;
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struct wsdisplay_curpos cc_size;
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2004-11-27 01:29:36 +03:00
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uint8_t cc_image[512]; /* save copy of image for GCURSOR */
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uint8_t cc_mask[512]; /* save copy of mask for GCURSOR */
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uint16_t cc_sprite[512]; /* sprite in device 2bpp format */
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uint8_t cc_color[6]; /* 2 colors, 3 rgb components */
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2002-03-30 22:48:55 +03:00
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};
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2003-05-10 05:51:56 +04:00
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struct igsfb_devconfig {
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/* io space, may be memory mapped */
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bus_space_tag_t dc_iot;
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bus_addr_t dc_iobase;
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int dc_ioflags;
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2002-03-30 22:48:55 +03:00
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/* io registers */
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2003-05-10 05:51:56 +04:00
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bus_space_handle_t dc_ioh;
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2002-03-30 22:48:55 +03:00
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2003-06-01 03:22:26 +04:00
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/* graphic coprocessor */
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bus_space_handle_t dc_coph;
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2002-03-30 22:48:55 +03:00
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/* linear memory */
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2003-05-10 05:51:56 +04:00
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bus_space_tag_t dc_memt;
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bus_addr_t dc_memaddr;
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bus_size_t dc_memsz; /* size of linear address space including mmio */
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int dc_memflags;
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2003-06-01 03:22:26 +04:00
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/* video memory size */
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2003-05-10 05:51:56 +04:00
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bus_size_t dc_vmemsz;
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2003-05-10 05:51:56 +04:00
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/* resolution */
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2006-04-05 03:43:40 +04:00
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int dc_width, dc_height, dc_depth, dc_stride;
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2002-07-21 06:56:35 +04:00
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2003-05-10 05:51:56 +04:00
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/* part of video memory mapped for wsscreen */
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bus_space_handle_t dc_fbh;
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bus_size_t dc_fbsz;
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2002-03-30 22:48:55 +03:00
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2003-05-10 05:51:56 +04:00
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/* 1KB of cursor sprite data */
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bus_space_handle_t dc_crh;
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2002-03-30 22:48:55 +03:00
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2003-05-10 05:51:56 +04:00
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/* product id: IGA 168x, CyberPro 2k &c */
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int dc_id;
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/* flags that control driver operation */
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int dc_hwflags;
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#define IGSFB_HW_BSWAP 0x1 /* endianness mismatch */
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#define IGSFB_HW_BE_SELECT 0x2 /* big endian magic (cyberpro) */
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2003-05-11 07:20:09 +04:00
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#define IGSFB_HW_TEXT_CURSOR 0x4 /* do text cursor in hardware */
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2002-03-30 22:48:55 +03:00
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2003-05-10 05:51:56 +04:00
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/* do we need to do bswap in software? */
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#define IGSFB_HW_SOFT_BSWAP(dc) \
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((((dc)->dc_hwflags) & (IGSFB_HW_BSWAP | IGSFB_HW_BE_SELECT)) \
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== IGSFB_HW_BSWAP)
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2002-03-30 22:48:55 +03:00
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2003-05-11 07:20:09 +04:00
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int dc_blanked; /* screen is currently blanked */
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int dc_curenb; /* cursor sprite enabled */
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int dc_mapped; /* currently in mapped mode */
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2003-06-01 03:22:26 +04:00
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/* saved dc_ri.ri_ops.putchar */
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void (*dc_ri_putchar)(void *, int, int, u_int, long);
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2003-05-10 05:51:56 +04:00
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struct igs_hwcmap dc_cmap; /* software copy of colormap */
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struct igs_hwcursor dc_cursor; /* software copy of cursor sprite */
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2002-03-30 22:48:55 +03:00
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2003-05-10 20:20:23 +04:00
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/* precomputed bit table for cursor sprite 1bpp -> 2bpp conversion */
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2004-11-27 01:29:36 +03:00
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uint16_t dc_bexpand[256];
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2006-04-05 05:13:50 +04:00
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2006-02-23 11:01:59 +03:00
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/* virtual console support */
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struct vcons_data dc_vd;
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struct vcons_screen dc_console;
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2002-03-30 22:48:55 +03:00
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};
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2003-05-10 05:51:56 +04:00
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struct igsfb_softc {
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struct device sc_dev;
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struct igsfb_devconfig *sc_dc;
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};
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2002-07-21 06:56:35 +04:00
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/*
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* Access sugar for indexed registers
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*/
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2002-03-30 22:48:55 +03:00
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2006-02-16 23:17:12 +03:00
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static __inline uint8_t
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2004-11-27 01:29:36 +03:00
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igs_idx_read(bus_space_tag_t, bus_space_handle_t, u_int, uint8_t);
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2006-02-16 23:17:12 +03:00
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static __inline void
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2004-11-27 01:29:36 +03:00
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igs_idx_write(bus_space_tag_t, bus_space_handle_t, u_int, uint8_t, uint8_t);
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2002-07-21 06:56:35 +04:00
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2006-02-16 23:17:12 +03:00
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static __inline uint8_t
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2006-04-05 05:05:50 +04:00
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igs_idx_read(bus_space_tag_t t, bus_space_handle_t h,
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u_int idxport, uint8_t idx)
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{
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bus_space_write_1(t, h, idxport, idx);
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return (bus_space_read_1(t, h, idxport + 1));
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}
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2006-02-16 23:17:12 +03:00
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static __inline void
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2006-04-05 05:05:50 +04:00
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igs_idx_write(bus_space_tag_t t, bus_space_handle_t h,
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u_int idxport, uint8_t idx, uint8_t val)
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2002-07-21 06:56:35 +04:00
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{
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bus_space_write_1(t, h, idxport, idx);
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bus_space_write_1(t, h, idxport + 1, val);
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}
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2002-09-24 22:17:24 +04:00
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/* sugar for sequencer controller */
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#define igs_seq_read(t,h,x) \
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(igs_idx_read((t),(h),IGS_SEQ_IDX,(x)))
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#define igs_seq_write(t,h,x,v) \
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(igs_idx_write((t),(h),IGS_SEQ_IDX,(x),(v)))
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/* sugar for CRT controller */
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#define igs_crtc_read(t,h,x) \
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(igs_idx_read((t),(h),IGS_CRTC_IDX,(x)))
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#define igs_crtc_write(t,h,x,v) \
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(igs_idx_write((t),(h),IGS_CRTC_IDX,(x),(v)))
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/* sugar for attribute controller */
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#define igs_attr_flip_flop(t,h) \
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((void)bus_space_read_1((t),(h),IGS_INPUT_STATUS1));
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#define igs_attr_read(t,h,x) \
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(igs_idx_read((t),(h),IGS_ATTR_IDX,(x)))
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2006-02-16 23:17:12 +03:00
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static __inline void
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2004-11-27 01:29:36 +03:00
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igs_attr_write(bus_space_tag_t, bus_space_handle_t, uint8_t, uint8_t);
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2002-09-24 22:17:24 +04:00
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2006-02-16 23:17:12 +03:00
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static __inline void
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2006-04-05 05:05:50 +04:00
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igs_attr_write(bus_space_tag_t t, bus_space_handle_t h,
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uint8_t idx, uint8_t val)
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2002-09-24 22:17:24 +04:00
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{
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bus_space_write_1(t, h, IGS_ATTR_IDX, idx);
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bus_space_write_1(t, h, IGS_ATTR_IDX, val); /* sic, same register */
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}
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/* sugar for graphics controller registers */
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#define igs_grfx_read(t,h,x) (igs_idx_read((t),(h),IGS_GRFX_IDX,(x)))
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#define igs_grfx_write(t,h,x,v) (igs_idx_write((t),(h),IGS_GRFX_IDX,(x),(v)))
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/* sugar for extended registers */
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2002-07-21 06:56:35 +04:00
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#define igs_ext_read(t,h,x) (igs_idx_read((t),(h),IGS_EXT_IDX,(x)))
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#define igs_ext_write(t,h,x,v) (igs_idx_write((t),(h),IGS_EXT_IDX,(x),(v)))
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2002-09-24 22:17:24 +04:00
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/* igsfb_subr.c */
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2003-05-10 05:51:56 +04:00
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int igsfb_enable(bus_space_tag_t, bus_addr_t, int);
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void igsfb_hw_setup(struct igsfb_devconfig *);
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void igsfb_1024x768_8bpp_60Hz(struct igsfb_devconfig *);
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2002-09-24 22:17:24 +04:00
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/* igsfb.c */
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2003-05-10 05:51:56 +04:00
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int igsfb_cnattach_subr(struct igsfb_devconfig *);
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void igsfb_attach_subr(struct igsfb_softc *, int);
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extern struct igsfb_devconfig igsfb_console_dc;
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2002-03-30 22:48:55 +03:00
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#endif /* _DEV_IC_IGSFBVAR_H_ */
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