2008-04-29 10:53:00 +04:00
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/* $NetBSD: i128reg.h,v 1.3 2008/04/29 06:53:02 martin Exp $ */
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2007-08-26 04:34:34 +04:00
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/*-
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* Copyright (c) 2007 Michael Lorenz
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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2008-04-29 10:53:00 +04:00
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__KERNEL_RCSID(0, "$NetBSD: i128reg.h,v 1.3 2008/04/29 06:53:02 martin Exp $");
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2007-08-26 04:34:34 +04:00
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/*
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* register definition for Number Nine Imagine 128 graphics controllers
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*
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* adapted from XFree86's i128 driver source
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*/
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#ifndef I128REG_H
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#define I128REG_H
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#define INTP 0x4000
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#define INTP_DD_INT 0x01 /* drawing op completed */
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#define INTP_CL_INT 0x02
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#define INTM 0x4004
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#define INTM_DD_MSK 0x01
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#define INTM_CL_MSK 0x02
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#define FLOW 0x4008
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#define FLOW_DEB 0x01 /* drawing engine busy */
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#define FLOW_MCB 0x02 /* mem controller busy */
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#define FLOW_CLP 0x04
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#define FLOW_PRV 0x08 /* prev cmd still running or cache ready */
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#define BUSY 0x400C
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#define BUSY_BUSY 0x01 /* command pipeline busy */
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#define XYW_AD 0x4010
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#define Z_CTRL 0x4018
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#define BUF_CTRL 0x4020
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#define BC_AMV 0x02
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#define BC_MP 0x04
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#define BC_AMD 0x08
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#define BC_SEN_MSK 0x0300
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#define BC_SEN_DB 0x0000
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#define BC_SEN_VB 0x0100
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#define BC_SEN_MB 0x0200
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#define BC_SEN_CB 0x0300
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#define BC_DEN_MSK 0x0C00
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#define BC_DEN_DB 0x0000
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#define BC_DEN_VB 0x0400
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#define BC_DEN_MB 0x0800
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#define BC_DEN_CB 0x0C00
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#define BC_DSE 0x1000
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#define BC_VSE 0x2000
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#define BC_MSE 0x4000
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#define BC_PS_MSK 0x001F0000
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#define BC_MDM_MSK 0x00600000
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#define BC_MDM_KEY 0x00200000
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#define BC_MDM_PLN 0x00400000
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#define BC_BLK_ENA 0x00800000
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#define BC_PSIZ_MSK 0x03000000
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#define BC_PSIZ_8B 0x00000000
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#define BC_PSIZ_16B 0x01000000
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#define BC_PSIZ_32B 0x02000000
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#define BC_PSIZ_NOB 0x03000000
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#define BC_CO 0x40000000
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#define BC_CR 0x80000000
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#define DE_PGE 0x4024
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#define DP_DVP_MSK 0x0000001F
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#define DP_MP_MSK 0x000F0000
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#define DE_SORG 0x4028
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#define DE_DORG 0x402C
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#define DE_MSRC 0x4030
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#define DE_WKEY 0x4038
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#define DE_KYDAT 0x403C
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#define DE_ZPTCH 0x403C
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#define DE_SPTCH 0x4040
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#define DE_DPTCH 0x4044
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#define CMD 0x4048
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#define CMD_OPC_MSK 0x000000FF
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#define CMD_ROP_MSK 0x0000FF00
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#define CMD_STL_MSK 0x001F0000
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#define CMD_CLP_MSK 0x00E00000
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#define CMD_PAT_MSK 0x0F000000
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#define CMD_HDF_MSK 0x70000000
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#define CMD_OPC 0x4050
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#define CO_NOOP 0x00
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#define CO_BITBLT 0x01
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#define CO_LINE 0x02
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#define CO_ELINE 0x03
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#define CO_TRIAN 0x04
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#define CO_RXFER 0x06
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#define CO_WXFER 0x07
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#define CMD_ROP 0x4054
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#define CR_CLEAR 0x00
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#define CR_NOR 0x01
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#define CR_AND_INV 0x02
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#define CR_COPY_INV 0x03
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#define CR_AND_REV 0x04
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#define CR_INVERT 0x05
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#define CR_XOR 0x06
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#define CR_NAND 0x07
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#define CR_AND 0x08
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#define CR_EQUIV 0x09
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#define CR_NOOP 0x0A
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#define CR_OR_INV 0x0B
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#define CR_COPY 0x0C
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#define CR_OR_REV 0x0D
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#define CR_OR 0x0E
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#define CR_SET 0x0F
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#define CMD_STYLE 0x4058
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#define CS_SOLID 0x01
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#define CS_TRNSP 0x02
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#define CS_STP_NO 0x00
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#define CS_STP_PL 0x04
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#define CS_STP_PA32 0x08
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#define CS_STP_PA8 0x0C
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#define CS_EDI 0x10
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#define CMD_PATRN 0x405C
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#define CP_APAT_NO 0x00
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#define CP_APAT_8X 0x01
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#define CP_APAT_32X 0x02
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#define CP_NLST 0x04
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#define CP_PRST 0x08
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#define CMD_CLP 0x4060
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#define CC_NOCLP 0x00
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#define CC_CLPRECI 0x02
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#define CC_CLPRECO 0x03
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#define CC_CLPSTOP 0x04
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#define CMD_HDF 0x4064
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#define CH_BIT_SWP 0x01
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#define CH_BYT_SWP 0x02
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#define CH_WRD_SWP 0x04
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#define FORE 0x4068
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#define BACK 0x406C
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#define MASK 0x4070
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#define RMSK 0x4074
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#define LPAT 0x4078
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#define PCTRL 0x407C
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#define PC_PLEN_MSK 0x0000001F
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#define PC_PSCL_MSK 0x000000E0
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#define PC_SPTR_MSK 0x00001F00
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#define PC_SSCL_MSK 0x0000E000
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#define PC_STATE_MSK 0xFFFF0000
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2007-08-26 11:24:58 +04:00
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#define CLPTL 0x4080 /* clipping top/left */
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2007-08-26 04:34:34 +04:00
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#define CLPTLY_MSK 0x0000FFFF
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#define CLPTLX_MSK 0xFFFF0000
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2007-08-26 11:24:58 +04:00
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#define CLPBR 0x4084 /* clipping bottom/right */
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2007-08-26 04:34:34 +04:00
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#define CLPBRY_MSK 0x0000FFFF
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#define CLPBRX_MSK 0xFFFF0000
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#define XY0_SRC 0x4088
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#define XY1_DST 0x408C /* trigger */
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#define XY2_WH 0x4090
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#define XY3_DIR 0x4094
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#define DIR_LR_TB 0x00000000
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#define DIR_LR_BT 0x00000001
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#define DIR_RL_TB 0x00000002
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#define DIR_RL_BT 0x00000003
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#define DIR_BT 0x00000001
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#define DIR_RL 0x00000002
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#define XY4_ZM 0x4098
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#define ZOOM_NONE 0x00000000
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#define XY_Y_DATA 0x0000FFFF
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#define XY_X_DATA 0xFFFF0000
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#define XY_I_DATA1 0x0000FFFF
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#define XY_I_DATA2 0xFFFF0000
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#define DL_ADR 0x40F8
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#define DL_CNTRL 0x40FC
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#define ACNTRL 0x416C
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/* wait until the blitter can accept another command */
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#define I128_READY(tag, regh) \
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do {} while ((bus_space_read_4(tag, regh, BUSY) & BUSY_BUSY) != 0);
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/* wait until it's safe to access video memory */
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#define I128_DONE(tag, regh) \
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do {} while ((bus_space_read_4(tag, regh, FLOW) & 0x0f) != 0);
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#endif /* I128REG_H */
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