84 lines
3.6 KiB
C
84 lines
3.6 KiB
C
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/* $NetBSD: amd756reg.h,v 1.1 2001/04/19 17:32:40 uch Exp $ */
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/*-
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* Copyright (c) 2001 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Register definitions for the AMD756 Peripheral Bus Controller.
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*/
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/*
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* Edge Triggered Interrupt Select register. (0x54)
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* bits 7-4: reserved
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* bit 3: Edge Triggered Interrupt Select for PCI Interrupt D
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* bit 2: Edge Triggered Interrupt Select for PCI Interrupt C
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* bit 1: Edge Triggered Interrupt Select for PCI Interrupt B
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* bit 0: Edge Triggered Interrupt Select for PCI Interrupt A
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* 0 = active Low and level triggered
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* 1 = active High and edge triggered
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*
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* PIRQ Select register. (0x56-57)
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* bits 15-12: PIRQD# Select
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* bits 11-8: PIRQD# Select
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* bits 7-4: PIRQD# Select
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* bits 3-0: PIRQD# Select
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* 0000: Reserved 0100: IRQ4 1000: Reserved 1100: IRQ12
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* 0001: IRQ1 0101: IRQ5 1001: IRQ9 1101: Reserved
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* 0010: Reserved 0110: IRQ6 1010: IRQ10 1110: IRQ14
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* 0011: IRQ3 0111: IRQ7 1011: IRQ11 1111: IRQ15
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*/
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#define AMD756_CFG_PIR 0x54
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#define AMD756_GET_EDGESEL(ph) \
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(pci_conf_read((ph)->ph_pc, (ph)->ph_tag, AMD756_CFG_PIR) \
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& 0xff)
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#define AMD756_GET_PIIRQSEL(ph) \
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(pci_conf_read((ph)->ph_pc, (ph)->ph_tag, AMD756_CFG_PIR) \
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>> 16)
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#define AMD756_SET_EDGESEL(ph, n) \
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pci_conf_write((ph)->ph_pc, (ph)->ph_tag, AMD756_CFG_PIR, \
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(pci_conf_read((ph)->ph_pc, (ph)->ph_tag, AMD756_CFG_PIR) \
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& 0xffff0000) | (n))
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#define AMD756_SET_PIIRQSEL(ph, n) \
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pci_conf_write((ph)->ph_pc, (ph)->ph_tag, AMD756_CFG_PIR, \
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(pci_conf_read((ph)->ph_pc, (ph)->ph_tag, AMD756_CFG_PIR) \
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& 0x000000ff) | ((n) << 16))
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#define AMD756_PIRQ_MASK 0xdefa
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#define AMD756_LEGAL_LINK(link) ((link) >= 0 && (link) <= 3)
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#define AMD756_LEGAL_IRQ(irq) ((irq) >= 0 && (irq) <= 15 && \
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((1 << (irq)) & AMD756_PIRQ_MASK) != 0)
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