1999-09-28 03:19:12 +04:00
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/* $NetBSD: ne2000.c,v 1.23 1999/09/27 23:19:12 enami Exp $ */
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1997-10-15 02:54:09 +04:00
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/*-
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1998-01-26 23:30:06 +03:00
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* Copyright (c) 1997, 1998 The NetBSD Foundation, Inc.
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1997-10-15 02:54:09 +04:00
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
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* NASA Ames Research Center.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Device driver for National Semiconductor DS8390/WD83C690 based ethernet
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* adapters.
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*
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* Copyright (c) 1994, 1995 Charles M. Hannum. All rights reserved.
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*
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* Copyright (C) 1993, David Greenman. This software may be used, modified,
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* copied, distributed, and sold, in both source and binary form provided that
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* the above copyright and these terms are retained. Under no circumstances is
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* the author responsible for the proper functioning of this software, nor does
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* the author assume any responsibility for damages incurred with its use.
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*/
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/*
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* Common code shared by all NE2000-compatible Ethernet interfaces.
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/device.h>
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#include <sys/socket.h>
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#include <sys/mbuf.h>
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#include <sys/syslog.h>
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#include <net/if.h>
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#include <net/if_dl.h>
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#include <net/if_types.h>
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1997-11-02 03:25:11 +03:00
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#include <net/if_media.h>
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1997-10-15 02:54:09 +04:00
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#include <net/if_ether.h>
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1999-01-18 14:51:43 +03:00
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#include <machine/bswap.h>
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1997-10-15 02:54:09 +04:00
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#include <machine/bus.h>
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1998-02-04 17:13:40 +03:00
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#ifndef __BUS_SPACE_HAS_STREAM_METHODS
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1998-02-03 07:26:45 +03:00
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#define bus_space_write_stream_2 bus_space_write_2
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#define bus_space_write_multi_stream_2 bus_space_write_multi_2
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#define bus_space_read_multi_stream_2 bus_space_read_multi_2
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1998-02-04 17:13:40 +03:00
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#endif /* __BUS_SPACE_HAS_STREAM_METHODS */
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1998-02-03 07:26:45 +03:00
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1997-10-15 02:54:09 +04:00
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#include <dev/ic/dp8390reg.h>
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#include <dev/ic/dp8390var.h>
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#include <dev/ic/ne2000reg.h>
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#include <dev/ic/ne2000var.h>
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1999-01-18 22:17:00 +03:00
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#if BYTE_ORDER == BIG_ENDIAN
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#include <machine/bswap.h>
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#endif
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1997-10-15 02:54:09 +04:00
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int ne2000_write_mbuf __P((struct dp8390_softc *, struct mbuf *, int));
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int ne2000_ring_copy __P((struct dp8390_softc *, int, caddr_t, u_short));
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void ne2000_read_hdr __P((struct dp8390_softc *, int, struct dp8390_ring *));
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int ne2000_test_mem __P((struct dp8390_softc *));
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void ne2000_writemem __P((bus_space_tag_t, bus_space_handle_t,
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1998-12-19 00:50:16 +03:00
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bus_space_tag_t, bus_space_handle_t, u_int8_t *, int, size_t,
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int, int));
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1997-10-15 02:54:09 +04:00
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void ne2000_readmem __P((bus_space_tag_t, bus_space_handle_t,
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bus_space_tag_t, bus_space_handle_t, int, u_int8_t *, size_t, int));
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void
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1998-10-28 03:13:47 +03:00
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ne2000_attach(nsc, myea, media, nmedia, defmedia)
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1997-10-15 02:54:09 +04:00
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struct ne2000_softc *nsc;
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u_int8_t *myea;
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1998-10-28 03:13:47 +03:00
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int *media, nmedia, defmedia;
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1997-10-15 02:54:09 +04:00
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{
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struct dp8390_softc *dsc = &nsc->sc_dp8390;
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bus_space_tag_t nict = dsc->sc_regt;
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bus_space_handle_t nich = dsc->sc_regh;
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bus_space_tag_t asict = nsc->sc_asict;
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bus_space_handle_t asich = nsc->sc_asich;
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u_int8_t romdata[16];
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int memsize, i, useword;
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/*
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1999-09-27 08:07:24 +04:00
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* Detect it again unless caller specified it; this gives us
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* the memory size.
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1997-10-15 02:54:09 +04:00
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*/
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if (nsc->sc_type == 0) {
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1999-09-27 08:07:24 +04:00
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nsc->sc_type = ne2000_detect(nict, nich, asict, asich);
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if (nsc->sc_type == 0) {
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printf("%s: where did the card go?\n",
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dsc->sc_dev.dv_xname);
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return;
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}
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1997-10-15 02:54:09 +04:00
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}
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1999-09-27 09:25:44 +04:00
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useword = NE2000_USE_WORD(nsc);
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1997-10-15 02:54:09 +04:00
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dsc->cr_proto = ED_CR_RD2;
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/*
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* DCR gets:
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*
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* FIFO threshold to 8, No auto-init Remote DMA,
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* byte order=80x86.
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*
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* NE1000 gets byte-wide DMA, NE2000 gets word-wide DMA.
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*/
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1999-09-27 08:52:19 +04:00
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dsc->dcr_reg = ED_DCR_FT1 | ED_DCR_LS | (useword ? ED_DCR_WTS : 0);
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1997-10-15 02:54:09 +04:00
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dsc->test_mem = ne2000_test_mem;
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dsc->ring_copy = ne2000_ring_copy;
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dsc->write_mbuf = ne2000_write_mbuf;
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dsc->read_hdr = ne2000_read_hdr;
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/* Registers are linear. */
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for (i = 0; i < 16; i++)
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dsc->sc_reg_map[i] = i;
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/*
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1999-09-28 03:19:12 +04:00
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* 8k of memory for NE1000, 16k for NE2000 and 24k for the
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* card uses DL10019.
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1997-10-15 02:54:09 +04:00
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*/
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1999-09-28 03:19:12 +04:00
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switch (nsc->sc_type) {
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case NE2000_TYPE_NE1000:
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memsize = 8192;
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break;
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case NE2000_TYPE_NE2000:
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memsize = 8192 * 2;
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break;
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case NE2000_TYPE_DL10019:
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memsize = 8192 * 3;
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break;
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}
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1997-10-15 02:54:09 +04:00
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/*
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* NIC memory doens't start at zero on an NE board.
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* The start address is tied to the bus width.
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* (It happens to be computed the same way as mem size.)
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*/
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dsc->mem_start = memsize;
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#ifdef GWETHER
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{
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int x, mstart = 0;
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int8_t pbuf0[ED_PAGE_SIZE], pbuf[ED_PAGE_SIZE],
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tbuf[ED_PAGE_SIZE];
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for (i = 0; i < ED_PAGE_SIZE; i++)
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pbuf0[i] = 0;
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/* Search for the start of RAM. */
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for (x = 1; x < 256; x++) {
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ne2000_writemem(nict, nich, asict, asich, pbuf0,
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1998-12-19 00:50:16 +03:00
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x << ED_PAGE_SHIFT, ED_PAGE_SIZE, useword, 0);
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1997-10-15 02:54:09 +04:00
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ne2000_readmem(nict, nich, asict, asich,
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x << ED_PAGE_SHIFT, tbuf, ED_PAGE_SIZE, useword);
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if (bcmp(pbuf0, tbuf, ED_PAGE_SIZE) == 0) {
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for (i = 0; i < ED_PAGE_SIZE; i++)
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pbuf[i] = 255 - x;
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ne2000_writemem(nict, nich, asict, asich,
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pbuf, x << ED_PAGE_SHIFT, ED_PAGE_SIZE,
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1998-12-19 00:50:16 +03:00
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useword, 0);
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1997-10-15 02:54:09 +04:00
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ne2000_readmem(nict, nich, asict, asich,
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x << ED_PAGE_SHIFT, tbuf, ED_PAGE_SIZE,
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useword);
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if (bcmp(pbuf, tbuf, ED_PAGE_SIZE) == 0) {
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mstart = x << ED_PAGE_SHIFT;
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memsize = ED_PAGE_SIZE;
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break;
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}
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}
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}
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if (mstart == 0) {
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printf("%s: cannot find start of RAM\n",
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dsc->sc_dev.dv_xname);
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return;
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}
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/* Search for the end of RAM. */
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for (++x; x < 256; x++) {
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ne2000_writemem(nict, nich, asict, asich, pbuf0,
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1998-12-19 00:50:16 +03:00
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x << ED_PAGE_SHIFT, ED_PAGE_SIZE, useword, 0);
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1997-10-15 02:54:09 +04:00
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ne2000_readmem(nict, nich, asict, asich,
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x << ED_PAGE_SHIFT, tbuf, ED_PAGE_SIZE, useword);
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if (bcmp(pbuf0, tbuf, ED_PAGE_SIZE) == 0) {
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for (i = 0; i < ED_PAGE_SIZE; i++)
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pbuf[i] = 255 - x;
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ne2000_writemem(nict, nich, asict, asich,
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pbuf, x << ED_PAGE_SHIFT, ED_PAGE_SIZE,
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1998-12-19 00:50:16 +03:00
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useword, 0);
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1997-10-15 02:54:09 +04:00
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ne2000_readmem(nict, nich, asict, asich,
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1998-10-13 12:33:05 +04:00
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x << ED_PAGE_SHIFT, tbuf, ED_PAGE_SIZE,
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1997-10-15 02:54:09 +04:00
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useword);
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if (bcmp(pbuf, tbuf, ED_PAGE_SIZE) == 0)
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memsize += ED_PAGE_SIZE;
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else
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break;
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} else
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break;
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}
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printf("%s: RAM start 0x%x, size %d\n",
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1998-10-13 12:33:05 +04:00
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dsc->sc_dev.dv_xname, mstart, memsize);
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1997-10-15 02:54:09 +04:00
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dsc->mem_start = mstart;
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}
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#endif /* GWETHER */
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dsc->mem_size = memsize;
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if (myea == NULL) {
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/* Read the station address. */
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ne2000_readmem(nict, nich, asict, asich, 0, romdata,
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sizeof(romdata), useword);
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for (i = 0; i < ETHER_ADDR_LEN; i++)
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dsc->sc_enaddr[i] = romdata[i * (useword ? 2 : 1)];
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} else
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bcopy(myea, dsc->sc_enaddr, sizeof(dsc->sc_enaddr));
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/* Clear any pending interrupts that might have occurred above. */
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bus_space_write_1(nict, nich, ED_P0_ISR, 0xff);
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1998-10-28 03:13:47 +03:00
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if (dp8390_config(dsc, media, nmedia, defmedia)) {
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1997-10-15 02:54:09 +04:00
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printf("%s: setup failed\n", dsc->sc_dev.dv_xname);
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return;
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}
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/*
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* We need to compute mem_ring a bit differently; override the
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* value set up in dp8390_config().
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*/
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dsc->mem_ring =
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dsc->mem_start + ((dsc->txb_cnt * ED_TXBUF_SIZE) << ED_PAGE_SHIFT);
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}
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/*
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* Detect an NE-2000 or compatible. Returns a model code.
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*/
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int
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ne2000_detect(nict, nich, asict, asich)
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bus_space_tag_t nict;
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bus_space_handle_t nich;
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bus_space_tag_t asict;
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bus_space_handle_t asich;
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{
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static u_int8_t test_pattern[32] = "THIS is A memory TEST pattern";
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u_int8_t test_buffer[32], tmp;
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int i, rv = 0;
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/* Reset the board. */
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#ifdef GWETHER
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bus_space_write_1(asict, asich, NE2000_ASIC_RESET, 0);
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delay(200);
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#endif /* GWETHER */
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tmp = bus_space_read_1(asict, asich, NE2000_ASIC_RESET);
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delay(10000);
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/*
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* I don't know if this is necessary; probably cruft leftover from
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* Clarkson packet driver code. Doesn't do a thing on the boards I've
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* tested. -DG [note that a outb(0x84, 0) seems to work here, and is
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* non-invasive...but some boards don't seem to reset and I don't have
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* complete documentation on what the 'right' thing to do is...so we do
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* the invasive thing for now. Yuck.]
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*/
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bus_space_write_1(asict, asich, NE2000_ASIC_RESET, tmp);
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delay(5000);
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/*
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* This is needed because some NE clones apparently don't reset the
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* NIC properly (or the NIC chip doesn't reset fully on power-up).
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* XXX - this makes the probe invasive! Done against my better
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* judgement. -DLG
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*/
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bus_space_write_1(nict, nich, ED_P0_CR,
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ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STP);
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delay(5000);
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1997-10-29 10:57:53 +03:00
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/*
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|
|
* Generic probe routine for testing for the existance of a DS8390.
|
|
|
|
* Must be performed after the NIC has just been reset. This
|
|
|
|
* works by looking at certain register values that are guaranteed
|
|
|
|
* to be initialized a certain way after power-up or reset.
|
|
|
|
*
|
|
|
|
* Specifically:
|
|
|
|
*
|
|
|
|
* Register reset bits set bits
|
|
|
|
* -------- ---------- --------
|
|
|
|
* CR TXP, STA RD2, STP
|
|
|
|
* ISR RST
|
|
|
|
* IMR <all>
|
|
|
|
* DCR LAS
|
|
|
|
* TCR LB1, LB0
|
|
|
|
*
|
|
|
|
* We only look at CR and ISR, however, since looking at the others
|
|
|
|
* would require changing register pages, which would be intrusive
|
|
|
|
* if this isn't an 8390.
|
|
|
|
*/
|
|
|
|
|
1997-10-15 02:54:09 +04:00
|
|
|
tmp = bus_space_read_1(nict, nich, ED_P0_CR);
|
|
|
|
if ((tmp & (ED_CR_RD2 | ED_CR_TXP | ED_CR_STA | ED_CR_STP)) !=
|
|
|
|
(ED_CR_RD2 | ED_CR_STP))
|
|
|
|
goto out;
|
|
|
|
|
1997-10-29 10:57:53 +03:00
|
|
|
tmp = bus_space_read_1(nict, nich, ED_P0_ISR);
|
|
|
|
if ((tmp & ED_ISR_RST) != ED_ISR_RST)
|
|
|
|
goto out;
|
|
|
|
|
1997-10-15 02:54:09 +04:00
|
|
|
bus_space_write_1(nict, nich,
|
|
|
|
ED_P0_CR, ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STA);
|
|
|
|
|
|
|
|
for (i = 0; i < 100; i++) {
|
|
|
|
if ((bus_space_read_1(nict, nich, ED_P0_ISR) & ED_ISR_RST) ==
|
|
|
|
ED_ISR_RST) {
|
|
|
|
/* Ack the reset bit. */
|
|
|
|
bus_space_write_1(nict, nich, ED_P0_ISR, ED_ISR_RST);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
delay(100);
|
|
|
|
}
|
|
|
|
|
|
|
|
#if 0
|
|
|
|
/* XXX */
|
|
|
|
if (i == 100)
|
|
|
|
goto out;
|
|
|
|
#endif
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Test the ability to read and write to the NIC memory. This has
|
|
|
|
* the side effect of determining if this is an NE1000 or an NE2000.
|
|
|
|
*/
|
|
|
|
|
|
|
|
/*
|
|
|
|
* This prevents packets from being stored in the NIC memory when
|
|
|
|
* the readmem routine turns on the start bit in the CR.
|
|
|
|
*/
|
|
|
|
bus_space_write_1(nict, nich, ED_P0_RCR, ED_RCR_MON);
|
|
|
|
|
|
|
|
/* Temporarily initialize DCR for byte operations. */
|
|
|
|
bus_space_write_1(nict, nich, ED_P0_DCR, ED_DCR_FT1 | ED_DCR_LS);
|
|
|
|
|
|
|
|
bus_space_write_1(nict, nich, ED_P0_PSTART, 8192 >> ED_PAGE_SHIFT);
|
|
|
|
bus_space_write_1(nict, nich, ED_P0_PSTOP, 16384 >> ED_PAGE_SHIFT);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Write a test pattern in byte mode. If this fails, then there
|
|
|
|
* probably isn't any memory at 8k - which likely means that the
|
|
|
|
* board is an NE2000.
|
|
|
|
*/
|
|
|
|
ne2000_writemem(nict, nich, asict, asich, test_pattern, 8192,
|
1998-12-19 00:50:16 +03:00
|
|
|
sizeof(test_pattern), 0, 1);
|
1997-10-15 02:54:09 +04:00
|
|
|
ne2000_readmem(nict, nich, asict, asich, 8192, test_buffer,
|
|
|
|
sizeof(test_buffer), 0);
|
|
|
|
|
|
|
|
if (bcmp(test_pattern, test_buffer, sizeof(test_pattern))) {
|
|
|
|
/* not an NE1000 - try NE2000 */
|
|
|
|
bus_space_write_1(nict, nich, ED_P0_DCR,
|
|
|
|
ED_DCR_WTS | ED_DCR_FT1 | ED_DCR_LS);
|
|
|
|
bus_space_write_1(nict, nich, ED_P0_PSTART,
|
|
|
|
16384 >> ED_PAGE_SHIFT);
|
|
|
|
bus_space_write_1(nict, nich, ED_P0_PSTOP,
|
|
|
|
32768 >> ED_PAGE_SHIFT);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Write the test pattern in word mode. If this also fails,
|
|
|
|
* then we don't know what this board is.
|
|
|
|
*/
|
|
|
|
ne2000_writemem(nict, nich, asict, asich, test_pattern, 16384,
|
1998-12-19 00:50:16 +03:00
|
|
|
sizeof(test_pattern), 1, 0);
|
1997-10-15 02:54:09 +04:00
|
|
|
ne2000_readmem(nict, nich, asict, asich, 16384, test_buffer,
|
|
|
|
sizeof(test_buffer), 1);
|
|
|
|
|
|
|
|
if (bcmp(test_pattern, test_buffer, sizeof(test_pattern)))
|
|
|
|
goto out; /* not an NE2000 either */
|
|
|
|
|
|
|
|
rv = NE2000_TYPE_NE2000;
|
|
|
|
} else {
|
|
|
|
/* We're an NE1000. */
|
|
|
|
rv = NE2000_TYPE_NE1000;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Clear any pending interrupts that might have occurred above. */
|
|
|
|
bus_space_write_1(nict, nich, ED_P0_ISR, 0xff);
|
|
|
|
|
|
|
|
out:
|
|
|
|
return (rv);
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Write an mbuf chain to the destination NIC memory address using programmed
|
|
|
|
* I/O.
|
|
|
|
*/
|
|
|
|
int
|
|
|
|
ne2000_write_mbuf(sc, m, buf)
|
|
|
|
struct dp8390_softc *sc;
|
|
|
|
struct mbuf *m;
|
|
|
|
int buf;
|
|
|
|
{
|
|
|
|
struct ne2000_softc *nsc = (struct ne2000_softc *)sc;
|
|
|
|
bus_space_tag_t nict = sc->sc_regt;
|
|
|
|
bus_space_handle_t nich = sc->sc_regh;
|
|
|
|
bus_space_tag_t asict = nsc->sc_asict;
|
|
|
|
bus_space_handle_t asich = nsc->sc_asich;
|
|
|
|
int savelen;
|
|
|
|
int maxwait = 100; /* about 120us */
|
|
|
|
|
|
|
|
savelen = m->m_pkthdr.len;
|
|
|
|
|
|
|
|
/* Select page 0 registers. */
|
1997-10-15 05:15:51 +04:00
|
|
|
bus_space_write_1(nict, nich, ED_P0_CR,
|
|
|
|
ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STA);
|
1997-10-15 02:54:09 +04:00
|
|
|
|
|
|
|
/* Reset remote DMA complete flag. */
|
1997-10-15 05:15:51 +04:00
|
|
|
bus_space_write_1(nict, nich, ED_P0_ISR, ED_ISR_RDC);
|
1997-10-15 02:54:09 +04:00
|
|
|
|
|
|
|
/* Set up DMA byte count. */
|
1997-10-15 05:15:51 +04:00
|
|
|
bus_space_write_1(nict, nich, ED_P0_RBCR0, savelen);
|
|
|
|
bus_space_write_1(nict, nich, ED_P0_RBCR1, savelen >> 8);
|
1997-10-15 02:54:09 +04:00
|
|
|
|
|
|
|
/* Set up destination address in NIC mem. */
|
1997-10-15 05:15:51 +04:00
|
|
|
bus_space_write_1(nict, nich, ED_P0_RSAR0, buf);
|
|
|
|
bus_space_write_1(nict, nich, ED_P0_RSAR1, buf >> 8);
|
1997-10-15 02:54:09 +04:00
|
|
|
|
|
|
|
/* Set remote DMA write. */
|
1997-10-15 05:15:51 +04:00
|
|
|
bus_space_write_1(nict, nich,
|
|
|
|
ED_P0_CR, ED_CR_RD1 | ED_CR_PAGE_0 | ED_CR_STA);
|
1997-10-15 02:54:09 +04:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Transfer the mbuf chain to the NIC memory. NE2000 cards
|
|
|
|
* require that data be transferred as words, and only words,
|
|
|
|
* so that case requires some extra code to patch over odd-length
|
|
|
|
* mbufs.
|
|
|
|
*/
|
|
|
|
if (nsc->sc_type == NE2000_TYPE_NE1000) {
|
|
|
|
/* NE1000s are easy. */
|
|
|
|
for (; m != 0; m = m->m_next) {
|
|
|
|
if (m->m_len) {
|
|
|
|
bus_space_write_multi_1(asict, asich,
|
|
|
|
NE2000_ASIC_DATA, mtod(m, u_int8_t *),
|
|
|
|
m->m_len);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
/* NE2000s are a bit trickier. */
|
1998-06-10 05:15:50 +04:00
|
|
|
u_int8_t *data, savebyte[2];
|
|
|
|
int l, leftover;
|
|
|
|
#ifdef DIAGNOSTIC
|
|
|
|
u_int8_t *lim;
|
|
|
|
#endif
|
|
|
|
/* Start out with no leftover data. */
|
|
|
|
leftover = 0;
|
|
|
|
savebyte[0] = savebyte[1] = 0;
|
1997-10-15 02:54:09 +04:00
|
|
|
|
|
|
|
for (; m != 0; m = m->m_next) {
|
|
|
|
l = m->m_len;
|
|
|
|
if (l == 0)
|
|
|
|
continue;
|
|
|
|
data = mtod(m, u_int8_t *);
|
1998-06-10 05:15:50 +04:00
|
|
|
#ifdef DIAGNOSTIC
|
|
|
|
lim = data + l;
|
|
|
|
#endif
|
|
|
|
while (l > 0) {
|
|
|
|
if (leftover) {
|
|
|
|
/*
|
|
|
|
* Data left over (from mbuf or
|
|
|
|
* realignment). Buffer the next
|
|
|
|
* byte, and write it and the
|
|
|
|
* leftover data out.
|
|
|
|
*/
|
|
|
|
savebyte[1] = *data++;
|
|
|
|
l--;
|
|
|
|
bus_space_write_stream_2(asict, asich,
|
|
|
|
NE2000_ASIC_DATA,
|
|
|
|
*(u_int16_t *)savebyte);
|
|
|
|
leftover = 0;
|
1999-03-24 00:41:07 +03:00
|
|
|
} else if (BUS_SPACE_ALIGNED_POINTER(data,
|
1998-06-10 05:15:50 +04:00
|
|
|
u_int16_t) == 0) {
|
|
|
|
/*
|
|
|
|
* Unaligned data; buffer the next
|
|
|
|
* byte.
|
|
|
|
*/
|
|
|
|
savebyte[0] = *data++;
|
|
|
|
l--;
|
|
|
|
leftover = 1;
|
|
|
|
} else {
|
|
|
|
/*
|
|
|
|
* Aligned data; output contiguous
|
|
|
|
* words as much as we can, then
|
|
|
|
* buffer the remaining byte, if any.
|
|
|
|
*/
|
|
|
|
leftover = l & 1;
|
|
|
|
l &= ~1;
|
|
|
|
bus_space_write_multi_stream_2(asict,
|
|
|
|
asich, NE2000_ASIC_DATA,
|
|
|
|
(u_int16_t *)data, l >> 1);
|
|
|
|
data += l;
|
|
|
|
if (leftover)
|
|
|
|
savebyte[0] = *data++;
|
|
|
|
l = 0;
|
|
|
|
}
|
1997-10-15 02:54:09 +04:00
|
|
|
}
|
1998-06-10 05:15:50 +04:00
|
|
|
if (l < 0)
|
|
|
|
panic("ne2000_write_mbuf: negative len");
|
|
|
|
#ifdef DIAGNOSTIC
|
|
|
|
if (data != lim)
|
|
|
|
panic("ne2000_write_mbuf: data != lim");
|
|
|
|
#endif
|
1997-10-15 02:54:09 +04:00
|
|
|
}
|
1998-06-10 05:15:50 +04:00
|
|
|
if (leftover) {
|
1997-10-15 02:54:09 +04:00
|
|
|
savebyte[1] = 0;
|
1998-02-03 07:26:45 +03:00
|
|
|
bus_space_write_stream_2(asict, asich, NE2000_ASIC_DATA,
|
1997-10-15 02:54:09 +04:00
|
|
|
*(u_int16_t *)savebyte);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Wait for remote DMA to complete. This is necessary because on the
|
|
|
|
* transmit side, data is handled internally by the NIC in bursts, and
|
|
|
|
* we can't start another remote DMA until this one completes. Not
|
|
|
|
* waiting causes really bad things to happen - like the NIC wedging
|
|
|
|
* the bus.
|
|
|
|
*/
|
|
|
|
while (((bus_space_read_1(nict, nich, ED_P0_ISR) & ED_ISR_RDC) !=
|
|
|
|
ED_ISR_RDC) && --maxwait);
|
|
|
|
|
|
|
|
if (maxwait == 0) {
|
|
|
|
log(LOG_WARNING,
|
|
|
|
"%s: remote transmit DMA failed to complete\n",
|
|
|
|
sc->sc_dev.dv_xname);
|
|
|
|
dp8390_reset(sc);
|
|
|
|
}
|
|
|
|
|
|
|
|
return (savelen);
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Given a source and destination address, copy 'amout' of a packet from
|
|
|
|
* the ring buffer into a linear destination buffer. Takes into account
|
|
|
|
* ring-wrap.
|
|
|
|
*/
|
|
|
|
int
|
|
|
|
ne2000_ring_copy(sc, src, dst, amount)
|
|
|
|
struct dp8390_softc *sc;
|
|
|
|
int src;
|
|
|
|
caddr_t dst;
|
|
|
|
u_short amount;
|
|
|
|
{
|
|
|
|
struct ne2000_softc *nsc = (struct ne2000_softc *)sc;
|
|
|
|
bus_space_tag_t nict = sc->sc_regt;
|
|
|
|
bus_space_handle_t nich = sc->sc_regh;
|
|
|
|
bus_space_tag_t asict = nsc->sc_asict;
|
|
|
|
bus_space_handle_t asich = nsc->sc_asich;
|
|
|
|
u_short tmp_amount;
|
1999-09-27 09:25:44 +04:00
|
|
|
int useword = NE2000_USE_WORD(nsc);
|
1997-10-15 02:54:09 +04:00
|
|
|
|
|
|
|
/* Does copy wrap to lower addr in ring buffer? */
|
|
|
|
if (src + amount > sc->mem_end) {
|
|
|
|
tmp_amount = sc->mem_end - src;
|
|
|
|
|
|
|
|
/* Copy amount up to end of NIC memory. */
|
|
|
|
ne2000_readmem(nict, nich, asict, asich, src,
|
|
|
|
(u_int8_t *)dst, tmp_amount, useword);
|
|
|
|
|
|
|
|
amount -= tmp_amount;
|
|
|
|
src = sc->mem_ring;
|
|
|
|
dst += tmp_amount;
|
|
|
|
}
|
|
|
|
|
|
|
|
ne2000_readmem(nict, nich, asict, asich, src, (u_int8_t *)dst,
|
|
|
|
amount, useword);
|
|
|
|
|
|
|
|
return (src + amount);
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
|
|
|
ne2000_read_hdr(sc, buf, hdr)
|
|
|
|
struct dp8390_softc *sc;
|
|
|
|
int buf;
|
|
|
|
struct dp8390_ring *hdr;
|
|
|
|
{
|
|
|
|
struct ne2000_softc *nsc = (struct ne2000_softc *)sc;
|
|
|
|
|
|
|
|
ne2000_readmem(sc->sc_regt, sc->sc_regh, nsc->sc_asict, nsc->sc_asich,
|
|
|
|
buf, (u_int8_t *)hdr, sizeof(struct dp8390_ring),
|
1999-09-27 09:25:44 +04:00
|
|
|
NE2000_USE_WORD(nsc));
|
1998-01-26 22:21:36 +03:00
|
|
|
#if BYTE_ORDER == BIG_ENDIAN
|
|
|
|
hdr->count = bswap16(hdr->count);
|
|
|
|
#endif
|
1997-10-15 02:54:09 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
int
|
|
|
|
ne2000_test_mem(sc)
|
|
|
|
struct dp8390_softc *sc;
|
|
|
|
{
|
|
|
|
|
|
|
|
/* Noop. */
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Given a NIC memory source address and a host memory destination address,
|
|
|
|
* copy 'amount' from NIC to host using programmed i/o. The 'amount' is
|
|
|
|
* rounded up to a word - ok as long as mbufs are word sized.
|
|
|
|
*/
|
|
|
|
void
|
|
|
|
ne2000_readmem(nict, nich, asict, asich, src, dst, amount, useword)
|
|
|
|
bus_space_tag_t nict;
|
|
|
|
bus_space_handle_t nich;
|
|
|
|
bus_space_tag_t asict;
|
|
|
|
bus_space_handle_t asich;
|
|
|
|
int src;
|
|
|
|
u_int8_t *dst;
|
|
|
|
size_t amount;
|
|
|
|
int useword;
|
|
|
|
{
|
|
|
|
|
|
|
|
/* Select page 0 registers. */
|
|
|
|
bus_space_write_1(nict, nich, ED_P0_CR,
|
|
|
|
ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STA);
|
|
|
|
|
|
|
|
/* Round up to a word. */
|
|
|
|
if (amount & 1)
|
|
|
|
++amount;
|
|
|
|
|
|
|
|
/* Set up DMA byte count. */
|
|
|
|
bus_space_write_1(nict, nich, ED_P0_RBCR0, amount);
|
|
|
|
bus_space_write_1(nict, nich, ED_P0_RBCR1, amount >> 8);
|
|
|
|
|
|
|
|
/* Set up source address in NIC mem. */
|
|
|
|
bus_space_write_1(nict, nich, ED_P0_RSAR0, src);
|
|
|
|
bus_space_write_1(nict, nich, ED_P0_RSAR1, src >> 8);
|
|
|
|
|
|
|
|
bus_space_write_1(nict, nich, ED_P0_CR,
|
|
|
|
ED_CR_RD0 | ED_CR_PAGE_0 | ED_CR_STA);
|
|
|
|
|
|
|
|
if (useword)
|
1998-02-03 07:26:45 +03:00
|
|
|
bus_space_read_multi_stream_2(asict, asich, NE2000_ASIC_DATA,
|
1997-10-15 02:54:09 +04:00
|
|
|
(u_int16_t *)dst, amount >> 1);
|
|
|
|
else
|
|
|
|
bus_space_read_multi_1(asict, asich, NE2000_ASIC_DATA,
|
|
|
|
dst, amount);
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Stripped down routine for writing a linear buffer to NIC memory. Only
|
|
|
|
* used in the probe routine to test the memory. 'len' must be even.
|
|
|
|
*/
|
|
|
|
void
|
1998-12-19 00:50:16 +03:00
|
|
|
ne2000_writemem(nict, nich, asict, asich, src, dst, len, useword, quiet)
|
1997-10-15 02:54:09 +04:00
|
|
|
bus_space_tag_t nict;
|
|
|
|
bus_space_handle_t nich;
|
|
|
|
bus_space_tag_t asict;
|
|
|
|
bus_space_handle_t asich;
|
|
|
|
u_int8_t *src;
|
|
|
|
int dst;
|
|
|
|
size_t len;
|
|
|
|
int useword;
|
1998-12-19 00:50:16 +03:00
|
|
|
int quiet;
|
1997-10-15 02:54:09 +04:00
|
|
|
{
|
|
|
|
int maxwait = 100; /* about 120us */
|
|
|
|
|
|
|
|
/* Select page 0 registers. */
|
|
|
|
bus_space_write_1(nict, nich, ED_P0_CR,
|
|
|
|
ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STA);
|
|
|
|
|
|
|
|
/* Reset remote DMA complete flag. */
|
|
|
|
bus_space_write_1(nict, nich, ED_P0_ISR, ED_ISR_RDC);
|
|
|
|
|
|
|
|
/* Set up DMA byte count. */
|
|
|
|
bus_space_write_1(nict, nich, ED_P0_RBCR0, len);
|
|
|
|
bus_space_write_1(nict, nich, ED_P0_RBCR1, len >> 8);
|
|
|
|
|
|
|
|
/* Set up destination address in NIC mem. */
|
|
|
|
bus_space_write_1(nict, nich, ED_P0_RSAR0, dst);
|
|
|
|
bus_space_write_1(nict, nich, ED_P0_RSAR1, dst >> 8);
|
|
|
|
|
|
|
|
/* Set remote DMA write. */
|
|
|
|
bus_space_write_1(nict, nich, ED_P0_CR,
|
|
|
|
ED_CR_RD1 | ED_CR_PAGE_0 | ED_CR_STA);
|
|
|
|
|
|
|
|
if (useword)
|
1998-02-03 07:26:45 +03:00
|
|
|
bus_space_write_multi_stream_2(asict, asich, NE2000_ASIC_DATA,
|
1997-10-15 02:54:09 +04:00
|
|
|
(u_int16_t *)src, len >> 1);
|
|
|
|
else
|
|
|
|
bus_space_write_multi_1(asict, asich, NE2000_ASIC_DATA,
|
|
|
|
src, len);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Wait for remote DMA to complete. This is necessary because on the
|
|
|
|
* transmit side, data is handled internally by the NIC in bursts, and
|
|
|
|
* we can't start another remote DMA until this one completes. Not
|
|
|
|
* waiting causes really bad things to happen - like the NIC wedging
|
|
|
|
* the bus.
|
|
|
|
*/
|
|
|
|
while (((bus_space_read_1(nict, nich, ED_P0_ISR) & ED_ISR_RDC) !=
|
|
|
|
ED_ISR_RDC) && --maxwait);
|
|
|
|
|
1998-12-19 00:50:16 +03:00
|
|
|
if (!quiet && maxwait == 0)
|
1997-10-15 02:54:09 +04:00
|
|
|
printf("ne2000_writemem: failed to complete\n");
|
|
|
|
}
|