2002-10-01 01:57:46 +04:00
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/* $NetBSD: osiop_pcctwo.c,v 1.3 2002/09/30 22:04:03 thorpej Exp $ */
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2002-02-12 23:38:43 +03:00
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/*-
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* Copyright (c) 1999, 2002 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Steve C. Woodford.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Front-end attachment code for the ncr53c710 SCSI controller
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* on mvme68k/mvme88k boards.
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/device.h>
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#include <dev/scsipi/scsi_all.h>
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#include <dev/scsipi/scsipi_all.h>
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#include <dev/scsipi/scsiconf.h>
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#include <machine/cpu.h>
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#include <machine/bus.h>
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#include <machine/autoconf.h>
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#include <dev/ic/osiopreg.h>
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#include <dev/ic/osiopvar.h>
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#include <dev/mvme/pcctworeg.h>
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#include <dev/mvme/pcctwovar.h>
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int osiop_pcctwo_match __P((struct device *, struct cfdata *, void *));
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void osiop_pcctwo_attach __P((struct device *, struct device *, void *));
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struct osiop_pcctwo_softc {
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struct osiop_softc sc_osiop;
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struct evcnt sc_evcnt;
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};
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2002-10-01 01:57:46 +04:00
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CFATTACH_DECL(osiop_pcctwo, sizeof(struct osiop_pcctwo_softc),
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osiop_pcctwo_match, osiop_pcctwo_attach, NULL, NULL)
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2002-02-12 23:38:43 +03:00
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static int osiop_pcctwo_intr __P((void *));
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extern struct cfdriver osiop_cd;
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/* ARGSUSED */
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int
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osiop_pcctwo_match(parent, cf, args)
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struct device *parent;
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struct cfdata *cf;
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void *args;
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{
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struct pcctwo_attach_args *pa;
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pa = args;
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if (strcmp(pa->pa_name, osiop_cd.cd_name))
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return (0);
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pa->pa_ipl = cf->pcctwocf_ipl;
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return (1);
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}
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/* ARGSUSED */
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void
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osiop_pcctwo_attach(parent, self, args)
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struct device *parent;
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struct device *self;
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void *args;
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{
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struct pcctwo_attach_args *pa;
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struct osiop_pcctwo_softc *sc;
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int clk, ctest7;
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pa = (struct pcctwo_attach_args *) args;
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sc = (struct osiop_pcctwo_softc *) self;
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/*
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* On the '17x the siop's clock is the same as the cpu clock.
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* On the other boards, the siop runs at twice the cpu clock.
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* Also, the 17x cannot do proper bus-snooping (the 68060 is
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* lame in this repspect) so don't enable it on that board.
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*/
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#ifdef MVME68K
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if (machineid == MVME_172 || machineid == MVME_177) {
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clk = cpuspeed;
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ctest7 = 0;
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} else {
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clk = cpuspeed * 2;
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ctest7 = OSIOP_CTEST7_SC0;
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}
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#else
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#error Set up siop clock speed for mvme187
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#endif
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sc->sc_osiop.sc_bst = pa->pa_bust;
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sc->sc_osiop.sc_dmat = pa->pa_dmat;
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(void) bus_space_map(sc->sc_osiop.sc_bst, pa->pa_offset, OSIOP_NREGS,
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0, &sc->sc_osiop.sc_reg);
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sc->sc_osiop.sc_clock_freq = clk;
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sc->sc_osiop.sc_ctest7 = ctest7 | OSIOP_CTEST7_TT1;
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sc->sc_osiop.sc_dcntl = OSIOP_DCNTL_EA;
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sc->sc_osiop.sc_id = 7; /* XXX: Could use NVRAM setting */
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/* Attach main MI driver */
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osiop_attach(&sc->sc_osiop);
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/* Register the event counter */
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evcnt_attach_dynamic(&sc->sc_evcnt, EVCNT_TYPE_INTR,
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pcctwointr_evcnt(pa->pa_ipl), "disk", sc->sc_osiop.sc_dev.dv_xname);
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/* Hook the chip's interrupt */
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pcctwointr_establish(PCCTWOV_SCSI, osiop_pcctwo_intr, pa->pa_ipl, sc,
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&sc->sc_evcnt);
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}
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static int
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osiop_pcctwo_intr(arg)
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void *arg;
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{
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struct osiop_pcctwo_softc *sc = (struct osiop_pcctwo_softc *) arg;
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u_char istat;
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/*
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* Catch any errors which can happen when the SIOP is
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* local bus master...
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*/
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istat = pcc2_reg_read(sys_pcctwo, PCC2REG_SCSI_ERR_STATUS);
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if ((istat & PCCTWO_ERR_SR_MASK) != 0) {
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printf("%s: Local bus error: 0x%02x\n",
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sc->sc_osiop.sc_dev.dv_xname, istat);
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istat |= PCCTWO_ERR_SR_SCLR;
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pcc2_reg_write(sys_pcctwo, PCC2REG_SCSI_ERR_STATUS, istat);
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}
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/* This is potentially nasty, since the IRQ is level triggered... */
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if (sc->sc_osiop.sc_flags & OSIOP_INTSOFF)
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return (0);
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istat = osiop_read_1(&sc->sc_osiop, OSIOP_ISTAT);
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if ((istat & (OSIOP_ISTAT_SIP | OSIOP_ISTAT_DIP)) == 0)
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return (0);
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/* Save interrupt details for the back-end interrupt handler */
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sc->sc_osiop.sc_sstat0 = osiop_read_1(&sc->sc_osiop, OSIOP_SSTAT0);
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sc->sc_osiop.sc_istat = istat;
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sc->sc_osiop.sc_dstat = osiop_read_1(&sc->sc_osiop, OSIOP_DSTAT);
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/* Deal with the interrupt */
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osiop_intr(&sc->sc_osiop);
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return (1);
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}
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