2002-10-01 00:54:25 +04:00
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/* $NetBSD: cs4231_ebus.c,v 1.8 2002/09/30 20:54:25 thorpej Exp $ */
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2002-03-12 07:48:28 +03:00
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/*
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* Copyright (c) 2002 Valeriy E. Ushakov
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/errno.h>
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#include <sys/device.h>
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#include <sys/malloc.h>
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#include <machine/autoconf.h>
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#include <machine/cpu.h>
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#include <dev/ebus/ebusreg.h>
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#include <dev/ebus/ebusvar.h>
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#include <sys/audioio.h>
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#include <dev/audio_if.h>
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#include <dev/ic/ad1848reg.h>
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#include <dev/ic/cs4231reg.h>
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#include <dev/ic/ad1848var.h>
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#include <dev/ic/cs4231var.h>
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#ifdef AUDIO_DEBUG
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int cs4231_ebus_debug = 0;
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2002-03-12 09:00:42 +03:00
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#define DPRINTF(x) if (cs4231_ebus_debug) printf x
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2002-03-12 07:48:28 +03:00
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#else
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#define DPRINTF(x)
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#endif
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struct cs4231_ebus_softc {
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struct cs4231_softc sc_cs4231;
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2002-03-21 07:09:27 +03:00
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bus_space_tag_t sc_bt;
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bus_space_handle_t sc_pdmareg; /* playback DMA */
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bus_space_handle_t sc_cdmareg; /* record DMA */
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2002-03-12 07:48:28 +03:00
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};
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void cs4231_ebus_attach(struct device *, struct device *, void *);
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int cs4231_ebus_match(struct device *, struct cfdata *, void *);
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2002-10-01 00:54:25 +04:00
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CFATTACH_DECL(audiocs_ebus, sizeof(struct cs4231_ebus_softc),
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cs4231_ebus_match, cs4231_ebus_attach, NULL, NULL)
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2002-03-12 07:48:28 +03:00
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/* audio_hw_if methods specific to ebus dma */
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static int cs4231_ebus_trigger_output(void *, void *, void *, int,
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void (*)(void *), void *,
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struct audio_params *);
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static int cs4231_ebus_trigger_input(void *, void *, void *, int,
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void (*)(void *), void *,
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struct audio_params *);
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static int cs4231_ebus_halt_output(void *);
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static int cs4231_ebus_halt_input(void *);
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struct audio_hw_if audiocs_ebus_hw_if = {
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cs4231_open,
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cs4231_close,
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NULL, /* drain */
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ad1848_query_encoding,
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ad1848_set_params,
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cs4231_round_blocksize,
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ad1848_commit_settings,
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NULL, /* init_output */
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NULL, /* init_input */
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NULL, /* start_output */
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NULL, /* start_input */
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cs4231_ebus_halt_output,
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cs4231_ebus_halt_input,
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NULL, /* speaker_ctl */
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cs4231_getdev,
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NULL, /* setfd */
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cs4231_set_port,
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cs4231_get_port,
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cs4231_query_devinfo,
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cs4231_malloc,
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cs4231_free,
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cs4231_round_buffersize,
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2002-03-12 09:00:42 +03:00
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NULL, /* mappage */
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2002-03-12 07:48:28 +03:00
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cs4231_get_props,
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cs4231_ebus_trigger_output,
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cs4231_ebus_trigger_input,
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NULL, /* dev_ioctl */
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};
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#ifdef AUDIO_DEBUG
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static void cs4231_ebus_regdump(char *, struct cs4231_ebus_softc *);
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#endif
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2002-03-21 07:09:27 +03:00
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static int cs4231_ebus_dma_reset(bus_space_tag_t, bus_space_handle_t);
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2002-03-12 07:48:28 +03:00
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static int cs4231_ebus_trigger_transfer(struct cs4231_softc *,
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2002-03-21 07:09:27 +03:00
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struct cs_transfer *,
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bus_space_tag_t, bus_space_handle_t,
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2002-03-12 07:48:28 +03:00
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int, void *, void *, int, void (*)(void *), void *,
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struct audio_params *);
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static void cs4231_ebus_dma_advance(struct cs_transfer *,
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2002-03-21 07:09:27 +03:00
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bus_space_tag_t, bus_space_handle_t);
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2002-03-12 07:48:28 +03:00
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static int cs4231_ebus_dma_intr(struct cs_transfer *,
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2002-03-21 07:09:27 +03:00
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bus_space_tag_t, bus_space_handle_t);
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2002-03-12 07:48:28 +03:00
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static int cs4231_ebus_intr(void *);
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int
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cs4231_ebus_match(parent, cf, aux)
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struct device *parent;
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struct cfdata *cf;
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void *aux;
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{
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struct ebus_attach_args *ea = aux;
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if (strcmp(ea->ea_name, AUDIOCS_PROM_NAME) == 0)
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return (1);
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#ifdef __sparc__ /* XXX: Krups */
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if (strcmp(ea->ea_name, "sound") == 0)
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return (1);
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#endif
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return (0);
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}
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void
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cs4231_ebus_attach(parent, self, aux)
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struct device *parent, *self;
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void *aux;
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{
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struct cs4231_ebus_softc *ebsc = (struct cs4231_ebus_softc *)self;
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struct cs4231_softc *sc = &ebsc->sc_cs4231;
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struct ebus_attach_args *ea = aux;
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bus_space_handle_t bh;
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int i;
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2002-03-21 07:09:27 +03:00
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sc->sc_bustag = ebsc->sc_bt = ea->ea_bustag;
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2002-03-12 07:48:28 +03:00
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sc->sc_dmatag = ea->ea_dmatag;
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/*
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* These are the register we get from the prom:
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* - CS4231 registers
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* - Playback EBus DMA controller
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* - Capture EBus DMA controller
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* - AUXIO audio register (codec powerdown)
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*
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* Map my registers in, if they aren't already in virtual
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* address space.
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*/
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2002-03-22 00:33:57 +03:00
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if (bus_space_map(ea->ea_bustag, EBUS_ADDR_FROM_REG(&ea->ea_reg[0]),
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ea->ea_reg[0].size, 0, &bh) != 0) {
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2002-04-04 21:41:09 +04:00
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printf(": unable to map registers\n");
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2002-03-22 00:33:57 +03:00
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return;
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2002-03-12 07:48:28 +03:00
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}
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2002-03-22 00:33:57 +03:00
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2002-03-12 07:48:28 +03:00
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/* XXX: map playback DMA registers (we just know where they are) */
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if (bus_space_map(ea->ea_bustag,
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BUS_ADDR(0x14, 0x702000), /* XXX: magic num */
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2002-03-21 07:09:27 +03:00
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EBUS_DMAC_SIZE,
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0, &ebsc->sc_pdmareg) != 0)
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2002-03-12 07:48:28 +03:00
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{
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2002-04-04 21:41:09 +04:00
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printf(": unable to map playback DMA registers\n");
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2002-03-12 09:00:42 +03:00
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return;
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2002-03-12 07:48:28 +03:00
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}
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/* XXX: map capture DMA registers (we just know where they are) */
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if (bus_space_map(ea->ea_bustag,
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BUS_ADDR(0x14, 0x704000), /* XXX: magic num */
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2002-03-21 07:09:27 +03:00
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EBUS_DMAC_SIZE,
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0, &ebsc->sc_cdmareg) != 0)
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2002-03-12 07:48:28 +03:00
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{
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2002-04-04 21:41:09 +04:00
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printf(": unable to map capture DMA registers\n");
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2002-03-12 09:00:42 +03:00
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return;
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2002-03-12 07:48:28 +03:00
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}
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/* establish interrupt channels */
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for (i = 0; i < ea->ea_nintr; ++i)
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bus_intr_establish(ea->ea_bustag,
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ea->ea_intr[i], IPL_AUDIO, 0,
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cs4231_ebus_intr, ebsc);
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cs4231_common_attach(sc, bh);
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printf("\n");
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/* XXX: todo: move to cs4231_common_attach, pass hw_if as arg? */
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audio_attach_mi(&audiocs_ebus_hw_if, sc, &sc->sc_ad1848.sc_dev);
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}
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#ifdef AUDIO_DEBUG
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static void
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cs4231_ebus_regdump(label, ebsc)
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char *label;
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struct cs4231_ebus_softc *ebsc;
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{
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/* char bits[128]; */
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printf("cs4231regdump(%s): regs:", label);
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/* XXX: dump ebus dma and aux registers */
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ad1848_dump_regs(&ebsc->sc_cs4231.sc_ad1848);
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}
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#endif /* AUDIO_DEBUG */
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/* XXX: nothing CS4231-specific in this code... */
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static int
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2002-03-21 07:09:27 +03:00
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cs4231_ebus_dma_reset(dt, dh)
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bus_space_tag_t dt;
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bus_space_handle_t dh;
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2002-03-12 07:48:28 +03:00
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{
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2002-03-21 07:09:27 +03:00
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u_int32_t csr;
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2002-03-12 07:48:28 +03:00
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int timo;
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2002-03-21 07:09:27 +03:00
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/* reset, also clear TC, just in case */
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bus_space_write_4(dt, dh, EBUS_DMAC_DCSR, EBDMA_RESET | EBDMA_TC);
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2002-03-12 07:48:28 +03:00
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2002-03-21 07:09:27 +03:00
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for (timo = 50000; timo != 0; --timo) {
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csr = bus_space_read_4(dt, dh, EBUS_DMAC_DCSR);
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if ((csr & (EBDMA_CYC_PEND | EBDMA_DRAIN)) == 0)
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2002-03-12 07:48:28 +03:00
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break;
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2002-03-21 07:09:27 +03:00
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}
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2002-03-12 07:48:28 +03:00
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if (timo == 0) {
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2002-03-21 07:09:27 +03:00
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char bits[128];
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printf("cs4231_ebus_dma_reset: timed out: csr=%s\n",
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bitmask_snprintf(csr, EBUS_DCSR_BITS,
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bits, sizeof(bits)));
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2002-03-12 07:48:28 +03:00
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return (ETIMEDOUT);
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}
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2002-03-21 07:09:27 +03:00
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bus_space_write_4(dt, dh, EBUS_DMAC_DCSR, csr & ~EBDMA_RESET);
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2002-03-12 07:48:28 +03:00
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return (0);
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}
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static void
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2002-03-21 07:09:27 +03:00
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cs4231_ebus_dma_advance(t, dt, dh)
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2002-03-12 07:48:28 +03:00
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struct cs_transfer *t;
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2002-03-21 07:09:27 +03:00
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bus_space_tag_t dt;
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bus_space_handle_t dh;
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2002-03-12 07:48:28 +03:00
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{
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bus_addr_t dmaaddr;
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bus_size_t dmasize;
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cs4231_transfer_advance(t, &dmaaddr, &dmasize);
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2002-03-21 07:09:27 +03:00
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bus_space_write_4(dt, dh, EBUS_DMAC_DNBR, (u_int32_t)dmasize);
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bus_space_write_4(dt, dh, EBUS_DMAC_DNAR, (u_int32_t)dmaaddr);
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2002-03-12 07:48:28 +03:00
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}
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/*
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* Trigger transfer "t" using DMA controller "dmac".
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* "iswrite" defines direction of the transfer.
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*/
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static int
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2002-03-21 07:09:27 +03:00
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cs4231_ebus_trigger_transfer(sc, t, dt, dh, iswrite,
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2002-03-12 07:48:28 +03:00
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start, end, blksize,
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intr, arg, param)
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struct cs4231_softc *sc;
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struct cs_transfer *t;
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2002-03-21 07:09:27 +03:00
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bus_space_tag_t dt;
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bus_space_handle_t dh;
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2002-03-12 07:48:28 +03:00
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int iswrite;
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void *start, *end;
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int blksize;
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void (*intr)(void *);
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void *arg;
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struct audio_params *param;
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{
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2002-03-21 07:09:27 +03:00
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u_int32_t csr;
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2002-03-12 07:48:28 +03:00
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bus_addr_t dmaaddr;
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bus_size_t dmasize;
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int ret;
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ret = cs4231_transfer_init(sc, t, &dmaaddr, &dmasize,
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start, end, blksize, intr, arg);
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if (ret != 0)
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return (ret);
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2002-03-21 07:09:27 +03:00
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ret = cs4231_ebus_dma_reset(dt, dh);
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2002-03-12 07:48:28 +03:00
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if (ret != 0)
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return (ret);
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2002-03-22 14:52:07 +03:00
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csr = bus_space_read_4(dt, dh, EBUS_DMAC_DCSR);
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bus_space_write_4(dt, dh, EBUS_DMAC_DCSR,
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2002-03-21 07:09:27 +03:00
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csr | EBDMA_EN_NEXT | (iswrite ? EBDMA_WRITE : 0)
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| EBDMA_EN_DMA | EBDMA_EN_CNT | EBDMA_INT_EN);
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2002-03-12 07:48:28 +03:00
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2002-03-21 07:09:27 +03:00
|
|
|
/* first load: propagated to DACR/DBCR */
|
|
|
|
bus_space_write_4(dt, dh, EBUS_DMAC_DNBR, (u_int32_t)dmasize);
|
|
|
|
bus_space_write_4(dt, dh, EBUS_DMAC_DNAR, (u_int32_t)dmaaddr);
|
2002-03-12 07:48:28 +03:00
|
|
|
|
|
|
|
/* next load: goes to DNAR/DNBR */
|
2002-03-21 07:09:27 +03:00
|
|
|
cs4231_ebus_dma_advance(t, dt, dh);
|
2002-03-12 07:48:28 +03:00
|
|
|
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
static int
|
|
|
|
cs4231_ebus_trigger_output(addr, start, end, blksize, intr, arg, param)
|
|
|
|
void *addr;
|
|
|
|
void *start, *end;
|
|
|
|
int blksize;
|
|
|
|
void (*intr)(void *);
|
|
|
|
void *arg;
|
|
|
|
struct audio_params *param;
|
|
|
|
{
|
|
|
|
struct cs4231_ebus_softc *ebsc = addr;
|
|
|
|
struct cs4231_softc *sc = &ebsc->sc_cs4231;
|
2002-03-21 07:09:27 +03:00
|
|
|
int cfg, ret;
|
2002-03-12 07:48:28 +03:00
|
|
|
|
2002-03-21 07:09:27 +03:00
|
|
|
ret = cs4231_ebus_trigger_transfer(sc, &sc->sc_playback,
|
|
|
|
ebsc->sc_bt, ebsc->sc_pdmareg,
|
|
|
|
0, /* iswrite */
|
2002-03-12 07:48:28 +03:00
|
|
|
start, end, blksize,
|
2002-03-21 07:09:27 +03:00
|
|
|
intr, arg, param);
|
2002-03-12 07:48:28 +03:00
|
|
|
if (ret != 0)
|
|
|
|
return (ret);
|
|
|
|
|
|
|
|
ad_write(&sc->sc_ad1848, SP_LOWER_BASE_COUNT, 0xff);
|
|
|
|
ad_write(&sc->sc_ad1848, SP_UPPER_BASE_COUNT, 0xff);
|
|
|
|
|
|
|
|
cfg = ad_read(&sc->sc_ad1848, SP_INTERFACE_CONFIG);
|
2002-03-21 07:09:27 +03:00
|
|
|
ad_write(&sc->sc_ad1848, SP_INTERFACE_CONFIG, cfg | PLAYBACK_ENABLE);
|
2002-03-12 07:48:28 +03:00
|
|
|
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
static int
|
|
|
|
cs4231_ebus_trigger_input(addr, start, end, blksize, intr, arg, param)
|
|
|
|
void *addr;
|
|
|
|
void *start, *end;
|
|
|
|
int blksize;
|
|
|
|
void (*intr)(void *);
|
|
|
|
void *arg;
|
|
|
|
struct audio_params *param;
|
|
|
|
{
|
|
|
|
struct cs4231_ebus_softc *ebsc = addr;
|
|
|
|
struct cs4231_softc *sc = &ebsc->sc_cs4231;
|
2002-03-21 07:09:27 +03:00
|
|
|
int cfg, ret;
|
2002-03-12 07:48:28 +03:00
|
|
|
|
2002-03-21 07:09:27 +03:00
|
|
|
ret = cs4231_ebus_trigger_transfer(sc, &sc->sc_capture,
|
|
|
|
ebsc->sc_bt, ebsc->sc_cdmareg,
|
|
|
|
1, /* iswrite */
|
2002-03-12 07:48:28 +03:00
|
|
|
start, end, blksize,
|
2002-03-21 07:09:27 +03:00
|
|
|
intr, arg, param);
|
2002-03-12 07:48:28 +03:00
|
|
|
if (ret != 0)
|
|
|
|
return (ret);
|
|
|
|
|
|
|
|
ad_write(&sc->sc_ad1848, CS_LOWER_REC_CNT, 0xff);
|
|
|
|
ad_write(&sc->sc_ad1848, CS_UPPER_REC_CNT, 0xff);
|
|
|
|
|
|
|
|
cfg = ad_read(&sc->sc_ad1848, SP_INTERFACE_CONFIG);
|
2002-03-21 07:09:27 +03:00
|
|
|
ad_write(&sc->sc_ad1848, SP_INTERFACE_CONFIG, cfg | CAPTURE_ENABLE);
|
2002-03-12 07:48:28 +03:00
|
|
|
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
static int
|
|
|
|
cs4231_ebus_halt_output(addr)
|
|
|
|
void *addr;
|
|
|
|
{
|
2002-03-21 07:09:27 +03:00
|
|
|
struct cs4231_ebus_softc *ebsc = addr;
|
2002-03-12 07:48:28 +03:00
|
|
|
struct cs4231_softc *sc = &ebsc->sc_cs4231;
|
2002-03-21 07:09:27 +03:00
|
|
|
u_int32_t csr;
|
2002-03-12 07:48:28 +03:00
|
|
|
int cfg;
|
|
|
|
|
|
|
|
sc->sc_playback.t_active = 0;
|
2002-03-21 07:09:27 +03:00
|
|
|
|
|
|
|
csr = bus_space_read_4(ebsc->sc_bt, ebsc->sc_pdmareg, EBUS_DMAC_DCSR);
|
|
|
|
bus_space_write_4(ebsc->sc_bt, ebsc->sc_pdmareg, EBUS_DMAC_DCSR,
|
|
|
|
csr & ~EBDMA_EN_DMA);
|
2002-03-12 07:48:28 +03:00
|
|
|
|
|
|
|
cfg = ad_read(&sc->sc_ad1848, SP_INTERFACE_CONFIG);
|
2002-03-21 07:09:27 +03:00
|
|
|
ad_write(&sc->sc_ad1848, SP_INTERFACE_CONFIG,
|
|
|
|
cfg & ~PLAYBACK_ENABLE);
|
2002-03-12 07:48:28 +03:00
|
|
|
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
static int
|
|
|
|
cs4231_ebus_halt_input(addr)
|
|
|
|
void *addr;
|
|
|
|
{
|
2002-03-21 07:09:27 +03:00
|
|
|
struct cs4231_ebus_softc *ebsc = addr;
|
2002-03-12 07:48:28 +03:00
|
|
|
struct cs4231_softc *sc = &ebsc->sc_cs4231;
|
2002-03-21 07:09:27 +03:00
|
|
|
u_int32_t csr;
|
2002-03-12 07:48:28 +03:00
|
|
|
int cfg;
|
|
|
|
|
|
|
|
sc->sc_capture.t_active = 0;
|
2002-03-21 07:09:27 +03:00
|
|
|
|
|
|
|
csr = bus_space_read_4(ebsc->sc_bt, ebsc->sc_cdmareg, EBUS_DMAC_DCSR);
|
|
|
|
bus_space_write_4(ebsc->sc_bt, ebsc->sc_cdmareg, EBUS_DMAC_DCSR,
|
|
|
|
csr & ~EBDMA_EN_DMA);
|
2002-03-12 07:48:28 +03:00
|
|
|
|
|
|
|
cfg = ad_read(&sc->sc_ad1848, SP_INTERFACE_CONFIG);
|
2002-03-21 07:09:27 +03:00
|
|
|
ad_write(&sc->sc_ad1848, SP_INTERFACE_CONFIG,
|
|
|
|
cfg & ~CAPTURE_ENABLE);
|
2002-03-12 07:48:28 +03:00
|
|
|
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
static int
|
2002-03-21 07:09:27 +03:00
|
|
|
cs4231_ebus_dma_intr(t, dt, dh)
|
2002-03-12 07:48:28 +03:00
|
|
|
struct cs_transfer *t;
|
2002-03-21 07:09:27 +03:00
|
|
|
bus_space_tag_t dt;
|
|
|
|
bus_space_handle_t dh;
|
2002-03-12 07:48:28 +03:00
|
|
|
{
|
|
|
|
u_int32_t csr;
|
|
|
|
#ifdef AUDIO_DEBUG
|
|
|
|
char bits[128];
|
|
|
|
#endif
|
|
|
|
|
|
|
|
/* read DMA status, clear TC bit by writing it back */
|
2002-03-21 07:09:27 +03:00
|
|
|
csr = bus_space_read_4(dt, dh, EBUS_DMAC_DCSR);
|
|
|
|
bus_space_write_4(dt, dh, EBUS_DMAC_DCSR, csr);
|
2002-03-12 07:48:28 +03:00
|
|
|
DPRINTF(("audiocs: %s dcsr=%s\n", t->t_name,
|
|
|
|
bitmask_snprintf(csr, EBUS_DCSR_BITS, bits, sizeof(bits))));
|
|
|
|
|
|
|
|
if (csr & EBDMA_ERR_PEND) {
|
|
|
|
++t->t_ierrcnt.ev_count;
|
|
|
|
printf("audiocs: %s DMA error, resetting\n", t->t_name);
|
2002-03-21 07:09:27 +03:00
|
|
|
cs4231_ebus_dma_reset(dt, dh);
|
2002-03-12 07:48:28 +03:00
|
|
|
/* how to notify audio(9)??? */
|
|
|
|
return (1);
|
|
|
|
}
|
|
|
|
|
|
|
|
if ((csr & EBDMA_INT_PEND) == 0)
|
|
|
|
return (0);
|
|
|
|
|
|
|
|
++t->t_intrcnt.ev_count;
|
|
|
|
|
|
|
|
if ((csr & EBDMA_TC) == 0) { /* can this happen? */
|
|
|
|
printf("audiocs: %s INT_PEND but !TC\n", t->t_name);
|
|
|
|
return (1);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (!t->t_active)
|
|
|
|
return (1);
|
|
|
|
|
2002-03-21 07:09:27 +03:00
|
|
|
cs4231_ebus_dma_advance(t, dt, dh);
|
2002-03-12 07:48:28 +03:00
|
|
|
|
|
|
|
/* call audio(9) framework while dma is chugging along */
|
|
|
|
if (t->t_intr != NULL)
|
|
|
|
(*t->t_intr)(t->t_arg);
|
|
|
|
return (1);
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
static int
|
|
|
|
cs4231_ebus_intr(arg)
|
|
|
|
void *arg;
|
|
|
|
{
|
2002-03-21 07:09:27 +03:00
|
|
|
struct cs4231_ebus_softc *ebsc = arg;
|
2002-03-12 07:48:28 +03:00
|
|
|
struct cs4231_softc *sc = &ebsc->sc_cs4231;
|
|
|
|
int status;
|
|
|
|
int ret;
|
|
|
|
#ifdef AUDIO_DEBUG
|
|
|
|
char bits[128];
|
|
|
|
#endif
|
|
|
|
|
|
|
|
status = ADREAD(&sc->sc_ad1848, AD1848_STATUS);
|
|
|
|
|
|
|
|
#ifdef AUDIO_DEBUG
|
|
|
|
if (cs4231_ebus_debug > 1)
|
|
|
|
cs4231_ebus_regdump("audiointr", ebsc);
|
|
|
|
|
|
|
|
DPRINTF(("%s: status: %s\n", sc->sc_ad1848.sc_dev.dv_xname,
|
|
|
|
bitmask_snprintf(status, AD_R2_BITS, bits, sizeof(bits))));
|
|
|
|
#endif
|
|
|
|
|
|
|
|
if (status & INTERRUPT_STATUS) {
|
|
|
|
#ifdef AUDIO_DEBUG
|
2002-03-12 09:00:42 +03:00
|
|
|
int reason;
|
2002-03-12 07:48:28 +03:00
|
|
|
|
|
|
|
reason = ad_read(&sc->sc_ad1848, CS_IRQ_STATUS);
|
|
|
|
DPRINTF(("%s: i24: %s\n", sc->sc_ad1848.sc_dev.dv_xname,
|
|
|
|
bitmask_snprintf(reason, CS_I24_BITS, bits, sizeof(bits))));
|
|
|
|
#endif
|
|
|
|
/* clear interrupt from ad1848 */
|
|
|
|
ADWRITE(&sc->sc_ad1848, AD1848_STATUS, 0);
|
|
|
|
}
|
|
|
|
|
|
|
|
ret = 0;
|
|
|
|
|
2002-03-21 07:09:27 +03:00
|
|
|
if (cs4231_ebus_dma_intr(&sc->sc_capture,
|
|
|
|
ebsc->sc_bt, ebsc->sc_cdmareg) != 0)
|
|
|
|
{
|
2002-03-12 09:00:42 +03:00
|
|
|
++sc->sc_intrcnt.ev_count;
|
|
|
|
ret = 1;
|
2002-03-12 07:48:28 +03:00
|
|
|
}
|
|
|
|
|
2002-03-21 07:09:27 +03:00
|
|
|
if (cs4231_ebus_dma_intr(&sc->sc_playback,
|
|
|
|
ebsc->sc_bt, ebsc->sc_pdmareg) != 0)
|
|
|
|
{
|
2002-03-12 09:00:42 +03:00
|
|
|
++sc->sc_intrcnt.ev_count;
|
|
|
|
ret = 1;
|
2002-03-12 07:48:28 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
return (ret);
|
|
|
|
}
|