2002-12-18 07:09:31 +03:00
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/* $NetBSD: sa1111_reg.h,v 1.3 2002/12/18 04:09:31 bsh Exp $ */
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2001-07-09 03:37:52 +04:00
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/*-
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* Copyright (c) 2001 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by IWAMOTO Toshihiro.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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2002-12-18 07:09:31 +03:00
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#ifndef _ARM_SA11X0_SA1111_REG_H
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#define _ARM_SA11X0_SA1111_REG_H
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2001-07-09 03:37:52 +04:00
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/* Interrupt Controller */
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/* number of interrupt bits */
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#define SACCIC_LEN 55
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/* System Bus Interface */
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2002-01-08 14:36:52 +03:00
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#define SACCSBI_SKCR 0x0000
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2002-12-18 07:09:31 +03:00
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#define SKCR_PLLBYPASS (1<<0)
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#define SKCR_RCLKEN (1<<1)
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#define SKCR_SLEEP (1<<2)
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#define SKCR_DOZE (1<<3)
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#define SKCR_VCOOFF (1<<4)
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#define SKCR_RDYEN (1<<7)
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#define SKCR_SELAC (1<<8) /* AC Link or I2S */
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#define SKCR_NOEEN (1<<12) /* Enable nOE */
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2002-01-08 14:36:52 +03:00
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#define SACCSBI_SMCR 0x0004
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2001-07-09 03:37:52 +04:00
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#define SACCSBI_SKID 0x0008
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2002-01-08 14:36:52 +03:00
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/* System Controller */
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#define SACCSC_SKPCR 0x0200
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/* USB Host Controller */
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#define SACCUSB_REVISION 0x0400
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#define SACCUSB_CONTROL 0x0404
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#define SACCUSB_STATUS 0x0408
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#define SACCUSB_RESET 0x051C
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2001-07-09 03:37:52 +04:00
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/* Interrupt Controller */
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#define SACCIC_INTTEST0 0x1600
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#define SACCIC_INTTEST1 0x1604
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#define SACCIC_INTEN0 0x1608
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#define SACCIC_INTEN1 0x160C
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#define SACCIC_INTPOL0 0x1610
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#define SACCIC_INTPOL1 0x1614
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#define SACCIC_INTTSTSEL 0x1618
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#define SACCIC_INTSTATCLR0 0x161C
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#define SACCIC_INTSTATCLR1 0x1620
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#define SACCIC_INTSET0 0x1624
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#define SACCIC_INTSET1 0x1628
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#define SACCIC_WAKE_EN0 0x162C
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#define SACCIC_WAKE_EN1 0x1630
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#define SACCIC_WAKE_POL0 0x1634
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#define SACCIC_WAKE_POL1 0x1638
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/* GPIO registers */
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#define SACCGPIOA_DDR 0x1000 /* data direction */
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#define SACCGPIOA_DVR 0x1004 /* data value */
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#define SACCGPIOA_SDR 0x1008 /* sleep direction */
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#define SACCGPIOA_SSR 0x100C /* sleep state */
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#define SACCGPIOB_DDR 0x1010
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#define SACCGPIOB_DVR 0x1014
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#define SACCGPIOB_SDR 0x1018
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#define SACCGPIOB_SSR 0x101C
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#define SACCGPIOC_DDR 0x1020
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#define SACCGPIOC_DVR 0x1024
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#define SACCGPIOC_SDR 0x1028
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#define SACCGPIOC_SSR 0x102C
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2002-01-08 14:36:52 +03:00
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2002-12-18 07:09:31 +03:00
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#define SACC_KBD0 0x0a00
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#define SACC_KBD1 0x0c00
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#define SACCKBD_CR 0x00
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#define KBDCR_FKC (1<<0) /* Force MSCLK/TPCLK low */
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#define KBDCR_FKD (1<<1) /* Force MSDATA/TPDATA low */
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#define KBDCR_ENA (1<<3) /* Enable */
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#define SACCKBD_STAT 0x04
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#define KBDSTAT_KBC (1<<0) /* KBCLK pin value */
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#define KBDSTAT_KBD (1<<1) /* KBDATA pin value */
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#define KBDSTAT_RXP (1<<2) /* Parity */
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#define KBDSTAT_ENA (1<<3) /* Enable */
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#define KBDSTAT_RXB (1<<4) /* Rx busy */
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#define KBDSTAT_RXF (1<<5) /* Rx full */
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#define KBDSTAT_TXB (1<<6) /* Tx busy */
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#define KBDSTAT_TXE (1<<7) /* Tx empty */
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#define KBDSTAT_STP (1<<8) /* Stop bit error */
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#define SACCKBD_DATA 0x08
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#define SACCKBD_CLKDIV 0x0c
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#define KBDCLKDIV_DIV8 0
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#define KBDCLKDIV_DIV4 1
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#define KBDCLKDIV_DIV2 2
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#define SACCKBD_CLKPRECNT 0x10
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#define SACCKBD_KBDITR 0x14 /* Interrupt test */
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#define SACCKBD_SIZE 0x18
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#endif /* _ARM_SA11X0_SA1111_REG_H */
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