2008-04-29 00:22:51 +04:00
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/* $NetBSD: cmsreg.h,v 1.4 2008/04/28 20:23:52 martin Exp $ */
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2000-05-02 02:48:33 +04:00
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/*
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* Copyright (c) 2000 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#define CMS_NVOICES 12
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#define CMS_FIRST_NOTE 30
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/* direct registers */
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#define CMS_DATA0 0x00 /* for chip 0, voices 0-5 */
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#define CMS_ADDR0 0x01
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#define CMS_DATA1 0x02 /* for chip 1, voices 6-11 */
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#define CMS_ADDR1 0x03
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#define CMS_MREG 0x04 /* always returns 0x7f */
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#define CMS_WREG 0x07 /* writable register */
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#define CMS_RREG 0x0b /* readable register */
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#define CMS_IOSIZE 16
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/*
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* Note that for each register, if ports CMS_DATA1/CMS_ADDR1 are used
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* then the first voice is modified. If ports CMS_DATA2/CMS_ADDR2 are
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2005-02-27 03:26:58 +03:00
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* used then the second voice is modified.
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2000-05-02 02:48:33 +04:00
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*/
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2005-02-27 03:26:58 +03:00
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/*
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2000-05-02 02:48:33 +04:00
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* Each voice can have a volume between 0 and 15 on both left and
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* right channels. The high-order nibble is the right channel volume,
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2005-02-27 03:26:58 +03:00
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* and the low-order nibble is the left channel volume.
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2000-05-02 02:48:33 +04:00
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*/
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#define CMS_IREG_VOL0 0x00
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#define CMS_IREG_VOL1 0x01
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#define CMS_IREG_VOL2 0x02
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#define CMS_IREG_VOL3 0x03
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#define CMS_IREG_VOL4 0x04
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#define CMS_IREG_VOL5 0x05
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/* Frequency registers */
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#define CMS_IREG_FREQ0 0x08
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#define CMS_IREG_FREQ1 0x09
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#define CMS_IREG_FREQ2 0x0a
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#define CMS_IREG_FREQ3 0x0b
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#define CMS_IREG_FREQ4 0x0c
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#define CMS_IREG_FREQ5 0x0d
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/*
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* Octave Registers: To get tones in higher octaves the octave
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* register for the voice must be set. Each octave register stores
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* the octave number for two voices. The high-order nibble is for
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2005-02-27 03:26:58 +03:00
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* first voice and the low-order nibble is for the second voice.
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*/
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#define CMS_IREG_OCTAVE_1_0 0x10
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#define CMS_IREG_OCTAVE_3_2 0x11
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#define CMS_IREG_OCTAVE_5_4 0x12
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#define CMS_IREG_FREQ_CTL 0x14 /* voice frequencies */
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#define CMS_IREG_FREQ_ENBL0 0x01 /* setting the bit enables the voice */
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#define CMS_IREG_FREQ_ENBL1 0x02 /* clearing the bit disables the voice */
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#define CMS_IREG_FREQ_ENBL2 0x04
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#define CMS_IREG_FREQ_ENBL3 0x08
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#define CMS_IREG_FREQ_ENBL4 0x10
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#define CMS_IREG_FREQ_ENBL5 0x20
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/*
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* There are 4 noise generators, each noise generator can be connected
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* up to any of three voices:
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*
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* Noise generator 0: connected to voices 0,1,2
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* 1: connected to voices 3,4,5
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* 2: connected to voices 6,7,8
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* 3: connected to voices 0,10,11
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*
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* CMS_DATA1/CMS_ADDR1 access noise generators 0 and 1. Each noise
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* generator has two bits which control the noise generator rate.
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*/
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#define CMS_IREG_NOISE_CTL 0x15 /* noises */
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#define CMS_IREG_NOISE_ENBL0 0x01
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#define CMS_IREG_NOISE_ENBL1 0x02
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#define CMS_IREG_NOISE_ENBL2 0x04
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#define CMS_IREG_NOISE_ENBL3 0x08
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#define CMS_IREG_NOISE_ENBL4 0x10
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#define CMS_IREG_NOISE_ENBL5 0x20
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#define CMS_IREG_NOISE_BW 0x16
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#define CMS_IREG_NOISE_MASK0 0x03 /* bits for noise generator 0 */
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#define CMS_IREG_NOISE_MASK1 0x30 /* bits for noise generator 1 */
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/* the bits in the mask have the following meaning */
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#define CMS_IREG_NOISE_MASK_28k 0 /* 28kHz */
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#define CMS_IREG_NOISE_MASK_14k 1 /* 14kHz */
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#define CMS_IREG_NOISE_MASK_7k 2 /* 6.8kHz */
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#define CMS_IREG_SYS_CTL 0x1c
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#define CMS_IREG_SYS_ENBL 0x01 /* enable all channels */
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#define CMS_IREG_SYS_RESET 0x02 /* reset and synchronise generators */
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/*
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* Some useful macros
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*/
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#define CMS_WRITE(sc, chip, reg, val) \
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do { \
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(sc)->sc_shadowregs[((chip)<<5) + (reg)] = val; \
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bus_space_write_1((sc)->sc_iot, (sc)->sc_ioh, \
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CMS_ADDR0 + ((chip)<<1), (reg)); \
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bus_space_write_1((sc)->sc_iot, (sc)->sc_ioh, \
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CMS_DATA0 + ((chip)<<1), (val)); \
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} while (0)
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#define CMS_READ(sc, chip, reg) ((sc)->sc_shadowregs[((chip)<<5) + (reg)])
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#define CHAN_TO_CHIP(chan) ((chan)>5)
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#define CHAN_TO_VOICE(chan) ((chan)%6)
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#define OCTAVE_OFFSET(voice) ((voice)>>1)
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#define OCTAVE_SHIFT(voice) (((voice)&1)<<2)
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