Add preliminary support for the MVME162-LX 200/300 series of boards.
Currently, the major onboard devices are supported (disk, network,
rs232 and VMEbus). However, work is still need to support the remaining
devices (eg. IndustryPack sites).
These boards are available with a dazzling array of build options. At
this time, the following options are *required*:
o Real floating point hardware (the 68LC040 model isn't tested),
o The VMEchip2 must be present,
o If offboard VMEbus RAM is not present, at least 8MB of onboard
RAM is required.
o Even if offboard VMEbus RAM *is* present, at least 4MB of onboard
RAM is required. (Boards with 1 or 2MB onboard RAM *can* be
supported with offboard RAM, but not without some funky values in
the VMEbus Master mapping registers.)
There is no support for boards other than those in the -LX 200/300 series.
2000-09-06 23:51:42 +04:00
|
|
|
/* $NetBSD: clock_pcctwo.c,v 1.4 2000/09/06 19:51:43 scw Exp $ */
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1999-02-14 20:54:27 +03:00
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/*-
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* Copyright (c) 1999 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Steve C. Woodford.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
|
Add preliminary support for the MVME162-LX 200/300 series of boards.
Currently, the major onboard devices are supported (disk, network,
rs232 and VMEbus). However, work is still need to support the remaining
devices (eg. IndustryPack sites).
These boards are available with a dazzling array of build options. At
this time, the following options are *required*:
o Real floating point hardware (the 68LC040 model isn't tested),
o The VMEchip2 must be present,
o If offboard VMEbus RAM is not present, at least 8MB of onboard
RAM is required.
o Even if offboard VMEbus RAM *is* present, at least 4MB of onboard
RAM is required. (Boards with 1 or 2MB onboard RAM *can* be
supported with offboard RAM, but not without some funky values in
the VMEbus Master mapping registers.)
There is no support for boards other than those in the -LX 200/300 series.
2000-09-06 23:51:42 +04:00
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* Glue for the Peripheral Channel Controller Two (PCCChip2) timers,
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* the Memory Controller ASIC (MCchip, and the Mostek clock chip found
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* on the MVME-1[67]7 and MVME-162 series of boards.
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1999-02-14 20:54:27 +03:00
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*/
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#include <sys/param.h>
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#include <sys/kernel.h>
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#include <sys/systm.h>
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#include <sys/device.h>
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#include <machine/psl.h>
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2000-03-19 01:33:02 +03:00
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#include <machine/bus.h>
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1999-02-14 20:54:27 +03:00
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#include <mvme68k/mvme68k/clockreg.h>
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#include <mvme68k/mvme68k/clockvar.h>
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2000-03-19 01:33:02 +03:00
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#include <mvme68k/dev/pcctwovar.h>
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1999-02-14 20:54:27 +03:00
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#include <mvme68k/dev/pcctworeg.h>
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2000-03-19 01:33:02 +03:00
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int clock_pcctwo_match __P((struct device *, struct cfdata *, void *));
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void clock_pcctwo_attach __P((struct device *, struct device *, void *));
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1999-02-14 20:54:27 +03:00
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2000-03-19 01:33:02 +03:00
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struct clock_pcctwo_softc {
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struct device sc_dev;
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struct clock_attach_args sc_clock_args;
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u_char sc_clock_lvl;
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};
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1999-02-14 20:54:27 +03:00
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struct cfattach clock_pcctwo_ca = {
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sizeof(struct device), clock_pcctwo_match, clock_pcctwo_attach
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};
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extern struct cfdriver clock_cd;
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2000-03-19 01:33:02 +03:00
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static int clock_pcctwo_profintr __P((void *));
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static int clock_pcctwo_statintr __P((void *));
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static void clock_pcctwo_initclocks __P((void *, int, int));
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static void clock_pcctwo_shutdown __P((void *));
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static struct clock_pcctwo_softc *clock_pcctwo_sc;
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/* ARGSUSED */
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1999-02-14 20:54:27 +03:00
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int
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clock_pcctwo_match(parent, cf, aux)
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struct device *parent;
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struct cfdata *cf;
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void *aux;
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{
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2000-03-19 01:33:02 +03:00
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struct pcctwo_attach_args *pa = aux;
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1999-02-14 20:54:27 +03:00
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/* Only one clock, please. */
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2000-03-19 01:33:02 +03:00
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if (clock_pcctwo_sc)
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1999-02-14 20:54:27 +03:00
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return (0);
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if (strcmp(pa->pa_name, clock_cd.cd_name))
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return (0);
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2000-03-19 01:33:02 +03:00
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pa->pa_ipl = cf->pcctwocf_ipl;
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1999-02-14 20:54:27 +03:00
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return (1);
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}
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2000-03-19 01:33:02 +03:00
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/* ARGSUSED */
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1999-02-14 20:54:27 +03:00
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void
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clock_pcctwo_attach(parent, self, aux)
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2000-03-19 01:33:02 +03:00
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struct device *parent;
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struct device *self;
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1999-02-14 20:54:27 +03:00
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void *aux;
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{
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2000-03-19 01:33:02 +03:00
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struct clock_pcctwo_softc *sc;
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struct pcctwo_attach_args *pa;
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sc = clock_pcctwo_sc = (struct clock_pcctwo_softc *) self;
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pa = aux;
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1999-02-14 20:54:27 +03:00
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if (pa->pa_ipl != CLOCK_LEVEL)
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panic("clock_pcctwo_attach: wrong interrupt level");
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2000-03-19 01:33:02 +03:00
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/* Map the RTC's registers */
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sc->sc_clock_args.ca_bust = pa->pa_bust;
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bus_space_map(pa->pa_bust, pa->pa_offset,
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MK48T_REGSIZE, 0, &sc->sc_clock_args.ca_bush);
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sc->sc_clock_args.ca_arg = sc;
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sc->sc_clock_args.ca_initfunc = clock_pcctwo_initclocks;
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1999-02-14 20:54:27 +03:00
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/* Do common portions of clock config. */
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2000-03-19 01:33:02 +03:00
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clock_config(self, &sc->sc_clock_args);
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1999-02-14 20:54:27 +03:00
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/* Ensure our interrupts get disabled at shutdown time. */
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2000-03-19 01:33:02 +03:00
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(void) shutdownhook_establish(clock_pcctwo_shutdown, NULL);
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1999-02-14 20:54:27 +03:00
|
|
|
|
Add preliminary support for the MVME162-LX 200/300 series of boards.
Currently, the major onboard devices are supported (disk, network,
rs232 and VMEbus). However, work is still need to support the remaining
devices (eg. IndustryPack sites).
These boards are available with a dazzling array of build options. At
this time, the following options are *required*:
o Real floating point hardware (the 68LC040 model isn't tested),
o The VMEchip2 must be present,
o If offboard VMEbus RAM is not present, at least 8MB of onboard
RAM is required.
o Even if offboard VMEbus RAM *is* present, at least 4MB of onboard
RAM is required. (Boards with 1 or 2MB onboard RAM *can* be
supported with offboard RAM, but not without some funky values in
the VMEbus Master mapping registers.)
There is no support for boards other than those in the -LX 200/300 series.
2000-09-06 23:51:42 +04:00
|
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|
sc->sc_clock_lvl = (pa->pa_ipl & PCCTWO_ICR_LEVEL_MASK) |
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PCCTWO_ICR_ICLR | PCCTWO_ICR_IEN;
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1999-02-14 20:54:27 +03:00
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/* Attach the interrupt handlers. */
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pcctwointr_establish(PCCTWOV_TIMER1, clock_pcctwo_profintr,
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2000-03-19 01:33:02 +03:00
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pa->pa_ipl, NULL);
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1999-02-14 20:54:27 +03:00
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pcctwointr_establish(PCCTWOV_TIMER2, clock_pcctwo_statintr,
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2000-03-19 01:33:02 +03:00
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pa->pa_ipl, NULL);
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1999-02-14 20:54:27 +03:00
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}
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void
|
2000-03-19 01:33:02 +03:00
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clock_pcctwo_initclocks(arg, proftick, stattick)
|
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void *arg;
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int proftick;
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int stattick;
|
1999-02-14 20:54:27 +03:00
|
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|
{
|
2000-03-19 01:33:02 +03:00
|
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struct clock_pcctwo_softc *sc;
|
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sc = arg;
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pcc2_reg_write(sys_pcctwo, PCC2REG_TIMER1_CONTROL, PCCTWO_TT_CTRL_COVF);
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pcc2_reg_write32(sys_pcctwo, PCC2REG_TIMER1_COUNTER, 0);
|
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pcc2_reg_write32(sys_pcctwo, PCC2REG_TIMER1_COMPARE,
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PCCTWO_US2LIM(proftick));
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pcc2_reg_write(sys_pcctwo, PCC2REG_TIMER1_CONTROL,
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PCCTWO_TT_CTRL_CEN | PCCTWO_TT_CTRL_COC);
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pcc2_reg_write(sys_pcctwo, PCC2REG_TIMER1_ICSR, sc->sc_clock_lvl);
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pcc2_reg_write(sys_pcctwo, PCC2REG_TIMER2_CONTROL, PCCTWO_TT_CTRL_COVF);
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pcc2_reg_write32(sys_pcctwo, PCC2REG_TIMER2_COUNTER, 0);
|
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|
pcc2_reg_write32(sys_pcctwo, PCC2REG_TIMER2_COMPARE,
|
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|
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PCCTWO_US2LIM(stattick));
|
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|
|
pcc2_reg_write(sys_pcctwo, PCC2REG_TIMER2_CONTROL,
|
|
|
|
PCCTWO_TT_CTRL_CEN | PCCTWO_TT_CTRL_COC);
|
|
|
|
pcc2_reg_write(sys_pcctwo, PCC2REG_TIMER2_ICSR, sc->sc_clock_lvl);
|
1999-02-14 20:54:27 +03:00
|
|
|
}
|
|
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|
|
int
|
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|
|
clock_pcctwo_profintr(frame)
|
|
|
|
void *frame;
|
|
|
|
{
|
2000-03-19 01:33:02 +03:00
|
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|
|
|
pcc2_reg_write(sys_pcctwo, PCC2REG_TIMER1_ICSR,
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|
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clock_pcctwo_sc->sc_clock_lvl);
|
1999-02-14 20:54:27 +03:00
|
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|
hardclock(frame);
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|
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clock_profcnt.ev_count++;
|
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|
|
return (1);
|
|
|
|
}
|
|
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|
|
int
|
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|
|
clock_pcctwo_statintr(frame)
|
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|
|
void *frame;
|
|
|
|
{
|
2000-03-19 01:33:02 +03:00
|
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|
|
1999-02-14 20:54:27 +03:00
|
|
|
/* Disable the timer interrupt while we handle it. */
|
2000-03-19 01:33:02 +03:00
|
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|
pcc2_reg_write(sys_pcctwo, PCC2REG_TIMER2_ICSR, 0);
|
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|
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|
|
statclock((struct clockframe *) frame);
|
1999-02-14 20:54:27 +03:00
|
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|
|
2000-03-19 01:33:02 +03:00
|
|
|
pcc2_reg_write(sys_pcctwo, PCC2REG_TIMER2_CONTROL, PCCTWO_TT_CTRL_COVF);
|
|
|
|
pcc2_reg_write32(sys_pcctwo, PCC2REG_TIMER2_COUNTER, 0);
|
|
|
|
pcc2_reg_write32(sys_pcctwo, PCC2REG_TIMER2_COMPARE,
|
|
|
|
PCCTWO_US2LIM(CLOCK_NEWINT(clock_statvar, clock_statmin)));
|
|
|
|
pcc2_reg_write(sys_pcctwo, PCC2REG_TIMER2_CONTROL,
|
|
|
|
PCCTWO_TT_CTRL_CEN | PCCTWO_TT_CTRL_COC);
|
1999-02-14 20:54:27 +03:00
|
|
|
|
2000-03-19 01:33:02 +03:00
|
|
|
pcc2_reg_write(sys_pcctwo, PCC2REG_TIMER2_ICSR,
|
|
|
|
clock_pcctwo_sc->sc_clock_lvl);
|
1999-02-14 20:54:27 +03:00
|
|
|
|
|
|
|
clock_statcnt.ev_count++;
|
|
|
|
return (1);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* ARGSUSED */
|
|
|
|
void
|
|
|
|
clock_pcctwo_shutdown(arg)
|
|
|
|
void *arg;
|
|
|
|
{
|
2000-03-19 01:33:02 +03:00
|
|
|
|
1999-02-14 20:54:27 +03:00
|
|
|
/* Make sure the timer interrupts are turned off. */
|
2000-03-19 01:33:02 +03:00
|
|
|
pcc2_reg_write(sys_pcctwo, PCC2REG_TIMER1_CONTROL, PCCTWO_TT_CTRL_COVF);
|
|
|
|
pcc2_reg_write(sys_pcctwo, PCC2REG_TIMER1_ICSR, 0);
|
|
|
|
pcc2_reg_write(sys_pcctwo, PCC2REG_TIMER2_CONTROL, PCCTWO_TT_CTRL_COVF);
|
|
|
|
pcc2_reg_write(sys_pcctwo, PCC2REG_TIMER2_ICSR, 0);
|
1999-02-14 20:54:27 +03:00
|
|
|
}
|